| /external/llvm/include/llvm/Target/ |
| CostTable.h | 52 TypeTy Src;
61 CompareTy Src) {
63 if (ISD == Tbl[i].ISD && Src == Tbl[i].Src && Dst == Tbl[i].Dst)
74 int ISD, CompareTy Dst, CompareTy Src) {
75 return ConvertCostTableLookup(Tbl, N, ISD, Dst, Src);
|
| /external/llvm/unittests/Support/ |
| ConvertUTFTest.cpp | 19 // Src is the look of disapproval.
20 static const char Src[] = "\xff\xfe\xa0\x0c_\x00\xa0\x0c";
21 ArrayRef<char> Ref(Src, sizeof(Src) - 1);
30 // Src is the look of disapproval.
31 static const char Src[] = "\xfe\xff\x0c\xa0\x00_\x0c\xa0";
32 ArrayRef<char> Ref(Src, sizeof(Src) - 1);
[all...] |
| /external/llvm/lib/Support/ |
| ConvertUTFWrapper.cpp | 95 const UTF16 *Src = reinterpret_cast<const UTF16 *>(SrcBytes.begin());
100 if (Src[0] == UNI_UTF16_BYTE_ORDER_MARK_SWAPPED) {
101 ByteSwapped.insert(ByteSwapped.end(), Src, SrcEnd);
104 Src = &ByteSwapped[0];
109 if (Src[0] == UNI_UTF16_BYTE_ORDER_MARK_NATIVE)
110 Src++;
118 ConvertUTF16toUTF8(&Src, SrcEnd, &Dst, DstEnd, strictConversion);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_dataflow.h | 59 struct rc_src_register * src);
65 struct rc_pair_instruction_source * src);
79 struct rc_src_register * Src;
83 struct rc_pair_instruction_source * Src;
|
| radeon_program_pair.h | 54 * {RGB,Alpha}.Src[RC_PAIR_PRESUB_SRC].File will be set to RC_FILE_PRESUB.
81 struct rc_pair_instruction_source Src[4];
122 struct rc_pair_instruction_source * src);
|
| radeon_emulate_loops.c | 44 struct rc_src_register * Src;
92 if(value->Src->File != file ||
93 value->Src->Index != index ||
94 !(1 << GET_SWZ(value->Src->Swizzle, 0) & mask)){
215 counter_value.Src = counter;
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_dataflow.h | 59 struct rc_src_register * src);
65 struct rc_pair_instruction_source * src);
79 struct rc_src_register * Src;
83 struct rc_pair_instruction_source * Src;
|
| radeon_program_pair.h | 54 * {RGB,Alpha}.Src[RC_PAIR_PRESUB_SRC].File will be set to RC_FILE_PRESUB.
81 struct rc_pair_instruction_source Src[4];
122 struct rc_pair_instruction_source * src);
|
| radeon_emulate_loops.c | 44 struct rc_src_register * Src;
92 if(value->Src->File != file ||
93 value->Src->Index != index ||
94 !(1 << GET_SWZ(value->Src->Swizzle, 0) & mask)){
215 counter_value.Src = counter;
|
| /external/llvm/lib/CodeGen/ |
| MachineCopyPropagation.cpp | 114 static bool isNopCopy(MachineInstr *CopyMI, unsigned Def, unsigned Src,
124 return SubIdx == TRI->getSubRegIndex(SrcDef, Src);
141 SourceMap SrcMap; // Src -> Def map
152 unsigned Src = MI->getOperand(1).getReg();
155 TargetRegisterInfo::isVirtualRegister(Src))
159 DenseMap<unsigned, MachineInstr*>::iterator CI = AvailCopyMap.find(Src);
163 (!MRI->isReserved(Src) || NoInterveningSideEffect(CopyMI, MI)) &&
164 isNopCopy(CopyMI, Def, Src, TRI)) {
193 // If Src is defined by a previous copy, it cannot be eliminated.
194 for (MCRegAliasIterator AI(Src, TRI, true); AI.isValid(); ++AI)
[all...] |
| IntrinsicLowering.cpp | 405 Value *Src = CI->getArgOperand(0);
406 Value *NotSrc = Builder.CreateNot(Src);
407 NotSrc->setName(Src->getName() + ".not");
408 Value *SrcM1 = ConstantInt::get(Src->getType(), 1);
409 SrcM1 = Builder.CreateSub(Src, SrcM1);
410 Src = LowerCTPOP(Context, Builder.CreateAnd(NotSrc, SrcM1), CI);
411 CI->replaceAllUsesWith(Src);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonPeephole.cpp | 104 void ChangeOpInto(MachineOperand &Dst, MachineOperand &Src);
141 MachineOperand &Src = MI->getOperand(1);
143 unsigned SrcReg = Src.getReg();
192 MachineOperand &Src = MI->getOperand(1);
194 unsigned SrcReg = Src.getReg();
210 MachineOperand &Src = MI->getOperand(1);
213 if (Src.getSubReg() != Hexagon::subreg_loreg)
217 unsigned SrcReg = Src.getReg();
314 void HexagonPeephole::ChangeOpInto(MachineOperand &Dst, MachineOperand &Src) {
315 assert (&Dst != &Src && "Cannot duplicate into itself")
[all...] |
| HexagonNewValueJump.cpp | 294 MachineBasicBlock *Src = MI->getParent();
296 MBPI->getEdgeProbability(Src, jmpTarget);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
| tgsi_parse.h | 100 struct tgsi_full_src_register Src[TGSI_FULL_MAX_SRC_REGISTERS];
|
| /external/llvm/lib/Target/R600/ |
| R600Packetizer.cpp | 12 /// bit of instructions inside a bundle and substitutes src register with
143 unsigned Src = MI->getOperand(OperandIdx).getReg();
144 const DenseMap<unsigned, unsigned>::const_iterator It = PVs.find(Src);
|
| SILowerControlFlow.cpp | 201 unsigned Src = MI.getOperand(1).getReg();
205 .addReg(Src); // Saved EXEC
221 unsigned Src = MI.getOperand(1).getReg();
225 .addReg(Src);
236 unsigned Src = MI.getOperand(2).getReg();
240 .addReg(Src);
251 unsigned Src = MI.getOperand(2).getReg();
255 .addReg(Src);
263 unsigned Src = MI.getOperand(0).getReg();
267 .addReg(Src);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 339 unsigned Src = TRI->getSubReg(SrcReg, subRegIdx[i]);
340 assert(Dst && Src && "Bad sub-register");
342 MovMI = BuildMI(MBB, I, DL, get(movOpc), Dst).addReg(Src);
|
| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 106 const MachineOperand &Src = MI->getOperand(1);
112 .addOperand(Src)
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_parse.h | 100 struct tgsi_full_src_register Src[TGSI_FULL_MAX_SRC_REGISTERS];
|
| /external/llvm/lib/ExecutionEngine/RuntimeDyld/ |
| RuntimeDyldChecker.cpp | 626 uint8_t *Src = RTDyld.getSymbolAddress(Symbol);
628 memcpy(&Result, Src + Offset, Size);
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEFrameLowering.cpp | 36 static std::pair<unsigned, unsigned> getMFHiLoOpc(unsigned Src) {
37 if (Mips::ACC64RegClass.contains(Src))
41 if (Mips::ACC64DSPRegClass.contains(Src))
44 if (Mips::ACC128RegClass.contains(Src))
156 unsigned Src = I->getOperand(0).getReg(), FI = I->getOperand(1).getIndex();
159 .addReg(Src, getKillRegState(I->getOperand(0).isKill()));
195 // mflo $vr0, src
197 // mfhi $vr1, src
210 unsigned Src = I->getOperand(0).getReg(), FI = I->getOperand(1).getIndex();
214 BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);
[all...] |
| MipsSEInstrInfo.cpp | 493 const MachineOperand &Dst = I->getOperand(0), &Src = I->getOperand(1);
494 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg;
495 unsigned KillSrc = getKillRegState(Src.isKill());
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
| i915_fpc.h | 128 #define CHANNEL_SRC( src, channel ) (src>>(channel*4))
304 struct i915_full_src_register Src[3];
|
| /external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| CoreEngine.h | 451 const CFGBlock *Src;
457 IndirectGotoNodeBuilder(ExplodedNode *pred, const CFGBlock *src,
459 : Eng(*eng), Src(src), DispatchBlock(*dispatch), E(e), Pred(pred) {}
498 const CFGBlock *Src;
503 SwitchNodeBuilder(ExplodedNode *pred, const CFGBlock *src,
505 : Eng(*eng), Src(src), Condition(condition), Pred(pred) {}
527 iterator begin() { return iterator(Src->succ_rbegin()+1); }
528 iterator end() { return iterator(Src->succ_rend());
[all...] |
| /external/clang/lib/StaticAnalyzer/Core/ |
| CheckerManager.cpp | 96 const ExplodedNodeSet &Src) {
98 if (Src.empty())
104 Dst.insert(Src);
109 const ExplodedNodeSet *PrevSet = &Src;
168 const ExplodedNodeSet &Src,
174 expandGraphWithCheckers(C, Dst, Src);
207 const ExplodedNodeSet &Src,
215 expandGraphWithCheckers(C, Dst, Src);
250 const ExplodedNodeSet &Src,
258 expandGraphWithCheckers(C, Dst, Src);
[all...] |
