| /external/clang/test/CodeGenCXX/ |
| 2010-03-09-AnonAggregate.cpp | 6 class MO {
12 class MO m;
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430MCInstLower.cpp | 32 GetGlobalAddressSymbol(const MachineOperand &MO) const {
33 switch (MO.getTargetFlags()) {
38 return Printer.getSymbol(MO.getGlobal());
42 GetExternalSymbolSymbol(const MachineOperand &MO) const {
43 switch (MO.getTargetFlags()) {
48 return Printer.GetExternalSymbolSymbol(MO.getSymbolName());
52 GetJumpTableSymbol(const MachineOperand &MO) const {
57 << MO.getIndex();
59 switch (MO.getTargetFlags()) {
69 GetConstantPoolIndexSymbol(const MachineOperand &MO) const
[all...] |
| MSP430MCInstLower.h | 36 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
38 MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const;
39 MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const;
40 MCSymbol *GetJumpTableSymbol(const MachineOperand &MO) const;
41 MCSymbol *GetConstantPoolIndexSymbol(const MachineOperand &MO) const;
42 MCSymbol *GetBlockAddressSymbol(const MachineOperand &MO) const;
|
| /external/llvm/lib/Target/ARM/ |
| ARMMCInstLower.cpp | 27 MCOperand ARMAsmPrinter::GetSymbolRef(const MachineOperand &MO,
30 unsigned Option = MO.getTargetFlags() & ARMII::MO_OPTION_MASK;
59 if (!MO.isJTI() && MO.getOffset())
61 MCConstantExpr::Create(MO.getOffset(),
68 bool ARMAsmPrinter::lowerOperand(const MachineOperand &MO,
70 switch (MO.getType()) {
74 if (MO.isImplicit() && MO.getReg() != ARM::CPSR)
76 assert(!MO.getSubReg() && "Subregs should be eliminated!")
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZMCInstLower.cpp | 34 SystemZMCInstLower::getExpr(const MachineOperand &MO,
38 switch (MO.getType()) {
40 Symbol = MO.getMBB()->getSymbol();
45 Symbol = AsmPrinter.getSymbol(MO.getGlobal());
49 Symbol = AsmPrinter.GetExternalSymbolSymbol(MO.getSymbolName());
53 Symbol = AsmPrinter.GetJTISymbol(MO.getIndex());
58 Symbol = AsmPrinter.GetCPISymbol(MO.getIndex());
62 Symbol = AsmPrinter.GetBlockAddressSymbol(MO.getBlockAddress());
70 if (int64_t Offset = MO.getOffset()) {
77 MCOperand SystemZMCInstLower::lowerOperand(const MachineOperand &MO) const
[all...] |
| SystemZMCInstLower.h | 35 // Return an MCOperand for MO.
36 MCOperand lowerOperand(const MachineOperand& MO) const;
38 // Return an MCExpr for symbolic operand MO with variant kind Kind.
39 const MCExpr *getExpr(const MachineOperand &MO,
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64MCInstLower.cpp | 33 AArch64MCInstLower::GetGlobalAddressSymbol(const MachineOperand &MO) const {
34 return Printer.getSymbol(MO.getGlobal());
38 AArch64MCInstLower::GetExternalSymbolSymbol(const MachineOperand &MO) const {
39 return Printer.GetExternalSymbolSymbol(MO.getSymbolName());
42 MCOperand AArch64MCInstLower::lowerSymbolOperandDarwin(const MachineOperand &MO,
47 if ((MO.getTargetFlags() & AArch64II::MO_GOT) != 0) {
48 if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)
50 else if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) ==
55 } else if ((MO.getTargetFlags() & AArch64II::MO_TLS) != 0) {
56 if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE
[all...] |
| AArch64MCInstLower.h | 38 bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
41 MCOperand lowerSymbolOperandDarwin(const MachineOperand &MO,
43 MCOperand lowerSymbolOperandELF(const MachineOperand &MO,
45 MCOperand LowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym) const;
47 MCSymbol *GetGlobalAddressSymbol(const MachineOperand &MO) const;
48 MCSymbol *GetExternalSymbolSymbol(const MachineOperand &MO) const;
|
| AArch64DeadRegisterDefinitionsPass.cpp | 53 for (const MachineOperand &MO : MI.implicit_operands())
54 if (MO.isReg() && MO.isDef())
55 if (TRI->regsOverlap(Reg, MO.getReg()))
79 MachineOperand &MO = MI.getOperand(i);
80 if (MO.isReg() && MO.isDead() && MO.isDef()) {
81 assert(!MO.isImplicit() && "Unexpected implicit def!");
91 if (implicitlyDefinesOverlappingReg(MO.getReg(), MI))
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcMCInstLower.cpp | 32 const MachineOperand &MO,
36 (SparcMCExpr::VariantKind)MO.getTargetFlags();
39 switch(MO.getType()) {
42 Symbol = MO.getMBB()->getSymbol();
46 Symbol = AP.getSymbol(MO.getGlobal());
50 Symbol = AP.GetBlockAddressSymbol(MO.getBlockAddress());
54 Symbol = AP.GetExternalSymbolSymbol(MO.getSymbolName());
58 Symbol = AP.GetCPISymbol(MO.getIndex());
70 const MachineOperand &MO,
72 switch(MO.getType())
[all...] |
| SparcCodeEmitter.cpp | 74 const MachineOperand &MO) const;
88 const MachineOperand &MO) const;
178 const MachineOperand &MO) const {
179 if (MO.isReg())
180 return TM.getRegisterInfo()->getEncodingValue(MO.getReg());
181 else if (MO.isImm())
182 return static_cast<unsigned>(MO.getImm());
183 else if (MO.isGlobal())
184 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO));
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonMCInstLower.cpp | 27 static MCOperand GetSymbolRef(const MachineOperand& MO, const MCSymbol* Symbol,
34 if (!MO.isJTI() && MO.getOffset())
35 ME = MCBinaryExpr::CreateAdd(ME, MCConstantExpr::Create(MO.getOffset(), MC),
48 const MachineOperand &MO = MI->getOperand(i);
51 switch (MO.getType()) {
57 if (MO.isImplicit()) continue;
58 MCO = MCOperand::CreateReg(MO.getReg());
61 APFloat Val = MO.getFPImm()->getValueAPF();
68 MCO = MCOperand::CreateImm(MO.getImm())
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreMCInstLower.cpp | 35 MCOperand XCoreMCInstLower::LowerSymbolOperand(const MachineOperand &MO,
43 Symbol = MO.getMBB()->getSymbol();
46 Symbol = Printer.getSymbol(MO.getGlobal());
47 Offset += MO.getOffset();
50 Symbol = Printer.GetBlockAddressSymbol(MO.getBlockAddress());
51 Offset += MO.getOffset();
54 Symbol = Printer.GetExternalSymbolSymbol(MO.getSymbolName());
55 Offset += MO.getOffset();
58 Symbol = Printer.GetJTISymbol(MO.getIndex());
61 Symbol = Printer.GetCPISymbol(MO.getIndex())
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCCodeEmitter.cpp | 56 MachineRelocation GetRelocation(const MachineOperand &MO,
61 const MachineOperand &MO) const;
147 const MachineOperand &MO = MI.getOperand(OpNo);
150 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7));
151 return 0x80 >> TM.getRegisterInfo()->getEncodingValue(MO.getReg());
154 MachineRelocation PPCCodeEmitter::GetRelocation(const MachineOperand &MO,
167 if (MO.isGlobal())
169 const_cast<GlobalValue *>(MO.getGlobal()),
170 Cst, isa<Function>(MO.getGlobal()))
[all...] |
| PPCMCInstLower.cpp | 37 static MCSymbol *GetSymbolFromOperand(const MachineOperand &MO, AsmPrinter &AP){
45 if (MO.getTargetFlags() == PPCII::MO_DARWIN_STUB)
47 else if (MO.getTargetFlags() & PPCII::MO_NLP_FLAG)
55 if (!MO.isGlobal()) {
56 assert(MO.isSymbol() && "Isn't a symbol reference");
57 Mang->getNameWithPrefix(Name, MO.getSymbolName());
59 const GlobalValue *GV = MO.getGlobal();
71 if (MO.getTargetFlags() == PPCII::MO_DARWIN_STUB) {
77 if (MO.isGlobal()) {
80 StubValueTy(AP.getSymbol(MO.getGlobal())
[all...] |
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MCCodeEmitter.cpp | 55 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
216 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO,
219 if (MO.isReg())
220 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
222 assert(MO.isImm() && "did not expect relocated expression");
223 return static_cast<unsigned>(MO.getImm());
230 const MCOperand &MO = MI.getOperand(OpIdx);
233 if (MO.isImm())
234 ImmVal = static_cast<uint32_t>(MO.getImm());
236 assert(MO.isExpr() && "unable to encode load/store imm operand")
[all...] |
| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcMCCodeEmitter.cpp | 55 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
103 const MCOperand &MO = MI.getOperand(tlsOpNo);
104 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI);
114 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
118 if (MO.isReg())
119 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg());
121 if (MO.isImm())
122 return MO.getImm();
124 assert(MO.isExpr());
125 const MCExpr *Expr = MO.getExpr()
[all...] |
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCCodeEmitter.cpp | 81 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
166 const MCOperand &MO = MI.getOperand(OpNo);
167 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
170 Fixups.push_back(MCFixup::Create(0, MO.getExpr(),
178 const MCOperand &MO = MI.getOperand(OpNo);
179 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI)
[all...] |
| /external/llvm/lib/CodeGen/ |
| DeadMachineInstructionElim.cpp | 68 const MachineOperand &MO = MI->getOperand(i);
69 if (MO.isReg() && MO.isDef()) {
70 unsigned Reg = MO.getReg();
128 const MachineOperand &MO = MI->getOperand(i);
129 if (!MO.isReg() || !MO.isDef())
131 unsigned Reg = MO.getReg();
147 const MachineOperand &MO = MI->getOperand(i);
148 if (MO.isReg() && MO.isDef())
[all...] |
| MachineInstrBundle.cpp | 53 MachineOperand &MO = MII->getOperand(i);
54 if (MO.isReg() && MO.isInternalRead())
55 MO.setIsInternalRead(false);
125 MachineOperand &MO = FirstMI->getOperand(i);
126 if (!MO.isReg())
128 if (MO.isDef()) {
129 Defs.push_back(&MO);
133 unsigned Reg = MO.getReg();
138 MO.setIsInternalRead()
[all...] |
| RegAllocFast.cpp | 217 /// isLastUseOfLocalReg - Return true if MO is the only remaining reference to
220 bool RAFast::isLastUseOfLocalReg(MachineOperand &MO) {
223 if (StackSlotForVirtReg[MO.getReg()] != -1)
226 // Check that the use/def chain has exactly one operand - MO.
227 MachineRegisterInfo::reg_nodbg_iterator I = MRI->reg_nodbg_begin(MO.getReg());
228 if (&*I != &MO)
236 MachineOperand &MO = LR.LastUse->getOperand(LR.LastOpNum);
237 if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) {
238 if (MO.getReg() == LR.PhysReg)
239 MO.setIsKill()
[all...] |
| ProcessImplicitDefs.cpp | 70 for (MIOperands MO(MI); MO.isValid(); ++MO)
71 if (MO->isReg() && MO->isUse() && MO->readsReg())
83 for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
84 MO.setIsUndef();
85 MachineInstr *UserMI = MO.getParent();
102 for (MIOperands MO(UserMI); MO.isValid(); ++MO)
[all...] |
| MachineInstr.cpp | 215 hash_code llvm::hash_value(const MachineOperand &MO) {
216 switch (MO.getType()) {
219 return hash_combine(MO.getType(), MO.getReg(), MO.getSubReg(), MO.isDef());
221 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getImm());
223 return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCImm())
[all...] |
| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| SIMCCodeEmitter.cpp | 47 uint32_t getLitEncoding(const MCOperand &MO) const;
62 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
86 uint32_t SIMCCodeEmitter::getLitEncoding(const MCOperand &MO) const {
89 if (MO.isImm())
90 Imm.I = MO.getImm();
91 else if (MO.isFPImm())
92 Imm.F = MO.getFPImm();
173 const MCOperand &MO,
176 if (MO.isReg())
177 return MRI.getEncodingValue(MO.getReg())
[all...] |
| /prebuilts/gcc/darwin-x86/aarch64/aarch64-linux-android-4.9/lib/gcc/aarch64-linux-android/4.9/include/ |
| stdatomic.h | 94 #define atomic_thread_fence(MO) __atomic_thread_fence (MO)
95 #define atomic_signal_fence(MO) __atomic_signal_fence (MO)
135 #define atomic_store_explicit(PTR, VAL, MO) \
140 __atomic_store (__atomic_store_ptr, &__atomic_store_tmp, (MO)); \
147 #define atomic_load_explicit(PTR, MO) \
152 __atomic_load (__atomic_load_ptr, &__atomic_load_tmp, (MO)); \
159 #define atomic_exchange_explicit(PTR, VAL, MO) \
166 &__atomic_exchange_tmp, (MO)); \
[all...] |
