| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 411 SDValue Ops[] = { Result, Chain };
412 return DAG.getMergeValues(Ops, DL);
477 SDValue Ops[] = { Result, Chain };
478 return DAG.getMergeValues(Ops, DL);
497 SDValue Ops[] = { CallResult.first, CallResult.second };
498 return DAG.getMergeValues(Ops, DL);
573 SDValue Ops[] = { Lo, Hi };
574 return DAG.getMergeValues(Ops, dl);
590 SDValue Ops[] = { Lo, Hi };
591 return DAG.getMergeValues(Ops, dl)
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 561 std::vector<SDValue> &Ops,
569 Ops.push_back(DAG.getTargetConstant(C->getZExtValue(),
576 Ops.push_back(DAG.getTargetConstant(C->getZExtValue(),
583 Ops.push_back(DAG.getTargetConstant(C->getSExtValue(),
590 Ops.push_back(DAG.getTargetConstant(C->getSExtValue(),
597 Ops.push_back(DAG.getTargetConstant(C->getZExtValue(),
602 TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
[all...] |
| SystemZInstrInfo.h | 186 const SmallVectorImpl<unsigned> &Ops,
189 const SmallVectorImpl<unsigned> &Ops,
|
| /external/llvm/include/llvm/Target/ |
| TargetInstrInfo.h | 556 const SmallVectorImpl<unsigned> &Ops,
563 const SmallVectorImpl<unsigned> &Ops,
572 const SmallVectorImpl<unsigned> &Ops,
582 const SmallVectorImpl<unsigned> &Ops,
592 const SmallVectorImpl<unsigned> &Ops) const;
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenInstruction.cpp | 82 // Verify that MIOpInfo has an 'ops' root value.
84 cast<DefInit>(MIOpInfo->getOperator())->getDef()->getName() != "ops")
198 static void ParseConstraint(const std::string &CStr, CGIOperandList &Ops) {
209 std::pair<unsigned,unsigned> Op = Ops.ParseOperandName(Name, false);
212 if (!Ops[Op.first].Constraints[Op.second].isNone())
214 Ops[Op.first].Constraints[Op.second] =
230 std::pair<unsigned,unsigned> DestOp = Ops.ParseOperandName(DestOpName, false);
238 std::pair<unsigned,unsigned> SrcOp = Ops.ParseOperandName(SrcOpName, false);
244 unsigned FlatOpNo = Ops.getFlattenedOperandNumber(SrcOp);
246 if (!Ops[DestOp.first].Constraints[DestOp.second].isNone()
[all...] |
| AsmMatcherEmitter.cpp | 699 std::pair<StringRef, StringRef> Ops = S.split('=');
700 if (Ops.second == "")
703 size_t start = Ops.first.find_first_of('$');
706 Ops.first = Ops.first.slice(start + 1, std::string::npos);
707 size_t end = Ops.first.find_last_of(" \t");
708 Ops.first = Ops.first.slice(0, end);
710 start = Ops.second.find_first_of('$');
713 Ops.second = Ops.second.slice(start + 1, std::string::npos)
[all...] |
| /external/llvm/lib/Analysis/ |
| InstructionSimplify.cpp | 524 Constant *Ops[] = { CLHS, CRHS };
525 return ConstantFoldInstOperands(Instruction::Add, CLHS->getType(), Ops,
661 Constant *Ops[] = { CLHS, CRHS };
663 Ops, Q.DL, Q.TLI);
783 Constant *Ops[] = { CLHS, CRHS };
785 Ops, Q.DL, Q.TLI);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.cpp | 260 SmallVector<SDValue, 8> Ops(NumIntermediates);
265 Ops[i] = getCopyFromParts(DAG, DL, &Parts[i], 1,
274 Ops[i] = getCopyFromParts(DAG, DL, &Parts[i * Factor], Factor,
282 DL, ValueVT, Ops);
489 SmallVector<SDValue, 16> Ops;
491 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL,
497 Ops.push_back(DAG.getUNDEF(ElementVT));
499 Val = DAG.getNode(ISD::BUILD_VECTOR, DL, PartVT, Ops);
544 SmallVector<SDValue, 8> Ops(NumIntermediates);
547 Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL
[all...] |
| LegalizeFloatTypes.cpp | 158 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
166 NVT, Ops, 2, false, SDLoc(N)).first;
237 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
245 NVT, Ops, 2, false, SDLoc(N)).first;
322 SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)),
331 NVT, Ops, 3, false, SDLoc(N)).first;
336 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
344 NVT, Ops, 2, false, SDLoc(N)).first;
362 SDValue Ops[2] = { DAG.getConstantFP(-0.0, N->getValueType(0)),
370 NVT, Ops, 2, false, SDLoc(N)).first
[all...] |
| LegalizeVectorOps.cpp | 193 SmallVector<SDValue, 8> Ops;
195 Ops.push_back(LegalizeOp(Node->getOperand(i)));
197 SDValue Result = SDValue(DAG.UpdateNodeOperands(Op.getNode(), Ops), 0);
701 SmallVector<SDValue, 8> Ops(NumElem, Mask);
702 Mask = DAG.getNode(ISD::BUILD_VECTOR, DL, MaskTy, Ops);
[all...] |
| FastISel.cpp | 566 bool FastISel::addStackMapLiveVars(SmallVectorImpl<MachineOperand> &Ops,
572 Ops.push_back(MachineOperand::CreateImm(StackMaps::ConstantOp));
573 Ops.push_back(MachineOperand::CreateImm(C->getSExtValue()));
575 Ops.push_back(MachineOperand::CreateImm(StackMaps::ConstantOp));
576 Ops.push_back(MachineOperand::CreateImm(0));
583 Ops.push_back(MachineOperand::CreateFI(SI->second));
590 Ops.push_back(MachineOperand::CreateReg(Reg, /*IsDef=*/false));
613 SmallVector<MachineOperand, 32> Ops;
619 Ops.push_back(MachineOperand::CreateImm(ID->getZExtValue()));
625 Ops.push_back(MachineOperand::CreateImm(NumBytes->getZExtValue()))
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 681 SmallVector<SDValue, 8> Ops;
682 Ops.push_back(Chain);
683 Ops.push_back(Callee);
688 Ops.push_back(DAG.getRegister(RegsToPass[i].first,
692 Ops.push_back(InFlag);
694 Chain = DAG.getNode(MSP430ISD::CALL, dl, NodeTys, Ops);
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelDAGToDAG.cpp | 352 const SDValue Ops[] = { RC, N->getOperand(0), SubReg0,
355 SDLoc(N), N->getValueType(0), Ops);
377 const SDValue Ops[] = {
384 N->getValueType(0), Ops);
393 const SDValue Ops[] = {
401 Ops);
408 const SDValue Ops[] = {
417 Ops);
715 SDValue Ops[] = {
725 return CurDAG->SelectNodeTo(N, Opc, VT, MVT::i1, Ops);
[all...] |
| R600ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/Utils/ |
| AArch64BaseInfo.cpp | 798 SmallVector<StringRef, 4> Ops;
799 if (!GenericRegPattern.match(NameLower, &Ops)) {
806 Ops[1].getAsInteger(10, Op1);
807 Ops[2].getAsInteger(10, CRn);
808 Ops[3].getAsInteger(10, CRm);
809 Ops[4].getAsInteger(10, Op2);
|
| /external/llvm/lib/CodeGen/ |
| MachineInstrBundle.cpp | 253 SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops) {
261 if (Ops)
262 Ops->push_back(std::make_pair(MO.getParent(), getOperandNo()));
|
| IfConversion.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBundle.h | 195 /// @param Ops When set, this vector will receive an (MI, OpNum) entry for
199 SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops = nullptr);
|
| /external/llvm/lib/IR/ |
| Instruction.cpp | 24 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
26 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
42 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps,
44 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.h | 57 getOpndList(SmallVectorImpl<SDValue> &Ops,
|
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 373 SmallVector<SDValue, 8> Ops;
376 Ops.push_back(Load.getOperand(0));
382 Ops.push_back(Load.getOperand(0));
384 Ops.push_back(Chain.getOperand(i));
386 CurDAG->getNode(ISD::TokenFactor, SDLoc(Load), MVT::Other, Ops);
387 Ops.clear();
388 Ops.push_back(NewChain);
391 Ops.push_back(OrigChain.getOperand(i));
392 CurDAG->UpdateNodeOperands(OrigChain.getNode(), Ops);
397 Ops.clear()
[all...] |
| /external/llvm/include/llvm/IR/ |
| GlobalValue.h | 63 GlobalValue(Type *Ty, ValueTy VTy, Use *Ops, unsigned NumOps,
65 : Constant(Ty, VTy, Ops, NumOps), Linkage(Linkage),
|
| Instruction.h | 463 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
465 Instruction(Type *Ty, unsigned iType, Use *Ops, unsigned NumOps,
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonInstrInfo.h | 107 const SmallVectorImpl<unsigned> &Ops,
112 const SmallVectorImpl<unsigned> &Ops,
|
| /external/llvm/lib/Transforms/Scalar/ |
| LoopStrengthReduce.cpp | 322 SmallVector<const SCEV *, 4> Ops(Mul->op_begin()+1, Mul->op_end());
323 const SCEV *NewMul = SE.getMulExpr(Ops);
579 SmallVector<const SCEV *, 8> Ops;
585 Ops.push_back(Op);
587 return SE.getAddExpr(Ops);
595 SmallVector<const SCEV *, 4> Ops;
606 Ops.push_back(S);
608 return Found ? SE.getMulExpr(Ops) : nullptr;
[all...] |
