| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 32 ceil.w.s $f6,$f20
142 round.w.d $f6,$f4
178 swc1 $f6,-8465($24)
|
| /external/llvm/test/MC/ARM/ |
| ldr-pseudo-darwin.s | 60 @ CHECK-LABEL: f6:
61 f6: label
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 34 ceil.w.s $f6,$f20
154 movf.d $f6,$f11,$fcc5
199 round.w.d $f6,$f4
241 swc1 $f6,-8465($24)
|
| /external/valgrind/main/VEX/priv/ |
| host_arm64_defs.c | [all...] |
| host_s390_isel.c | 2117 HReg f0, f2, f4, f6, r1; \/* real registers used by PFPO *\/ local
2436 HReg f0, f4, f6, r1; \/* real registers used by PFPO *\/ local
2831 HReg f0, f2, f4, f6, r1; \/* real registers used by PFPO *\/ local
3036 HReg f0, f4, f6, r1; \/* real registers used by PFPO *\/ local
[all...] |
| /external/chromium_org/third_party/openssl/openssl/crypto/ |
| ia64cpuid.S | 78 mov f6=f0
|
| /external/chromium_org/v8/test/mjsunit/harmony/ |
| block-let-crankshaft.js | 33 var functions = [ f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13, f14,
66 function f6() { function
|
| /external/clang/test/Analysis/ |
| dead-stores.c | 45 int f6() { function
|
| ptr-arith.c | 62 void f6(int *p, int *q) { function
|
| /external/clang/test/CodeGen/ |
| bitfield-2.c | 338 unsigned f6 : 7; member in struct:s9
|
| x86_32-arguments-darwin.c | 33 // CHECK-LABEL: define void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
34 void f6(char a0, short a1, int a2, long long a3, void *a4) {} function
|
| x86_64-arguments.c | 35 // CHECK-LABEL: define void @f6(i8 signext %a0, i16 signext %a1, i32 %a2, i64 %a3, i8* %a4)
36 void f6(char a0, short a1, int a2, long long a3, void *a4) { function
|
| /external/clang/test/Parser/ |
| cxx-ambig-init-templ.cpp | 59 void f6(
|
| cxx0x-attributes.cpp | 189 friend int f6 [[noreturn]] (), f7 [[noreturn]] (), f8 [[noreturn]] (); // expected-error3 {{an attribute list cannot appear here}}
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips3.s | 13 ceil.w.s $f6,$f20 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
52 round.w.d $f6,$f4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| valid.s | 104 swc1 $f6,-8465($24)
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips32r2.s | 31 movf.d $f6,$f11,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
32 movf.d $f6,$f11,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips4.s | 53 movf.d $f6,$f11,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
54 movf.d $f6,$f11,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips5.s | 52 movf.d $f6,$f11,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
53 movf.d $f6,$f11,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/llvm/test/MC/SystemZ/ |
| regs-bad.s | 145 #CHECK: lxr %f6,%f0
171 lxr %f6,%f0
|
| /external/openssl/crypto/ |
| ia64cpuid.S | 78 mov f6=f0
|
| /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
| ia64.S | [all...] |
| /external/openssl/crypto/bn/asm/ |
| ia64.S | [all...] |
| /external/libcxxabi/test/ |
| catch_pointer_reference.cpp | 216 void f6() function
436 f6();
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips64.s | 27 movf.d $f6,$f11,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
