1 // Copyright (c) 2012 The Chromium Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 // For atomic operations on reference counts, see atomic_refcount.h. 6 // For atomic operations on sequence numbers, see atomic_sequence_num.h. 7 8 // The routines exported by this module are subtle. If you use them, even if 9 // you get the code right, it will depend on careful reasoning about atomicity 10 // and memory ordering; it will be less readable, and harder to maintain. If 11 // you plan to use these routines, you should have a good reason, such as solid 12 // evidence that performance would otherwise suffer, or there being no 13 // alternative. You should assume only properties explicitly guaranteed by the 14 // specifications in this file. You are almost certainly _not_ writing code 15 // just for the x86; if you assume x86 semantics, x86 hardware bugs and 16 // implementations on other archtectures will cause your code to break. If you 17 // do not know what you are doing, avoid these routines, and use a Mutex. 18 // 19 // It is incorrect to make direct assignments to/from an atomic variable. 20 // You should use one of the Load or Store routines. The NoBarrier 21 // versions are provided when no barriers are needed: 22 // NoBarrier_Store() 23 // NoBarrier_Load() 24 // Although there are currently no compiler enforcement, you are encouraged 25 // to use these. 26 // 27 28 #ifndef BASE_ATOMICOPS_H_ 29 #define BASE_ATOMICOPS_H_ 30 31 #include <stdint.h> 32 33 #include "build/build_config.h" 34 35 #if defined(OS_WIN) && defined(ARCH_CPU_64_BITS) 36 // windows.h #defines this (only on x64). This causes problems because the 37 // public API also uses MemoryBarrier at the public name for this fence. So, on 38 // X64, undef it, and call its documented 39 // (http://msdn.microsoft.com/en-us/library/windows/desktop/ms684208.aspx) 40 // implementation directly. 41 #undef MemoryBarrier 42 #endif 43 44 namespace base { 45 namespace subtle { 46 47 typedef int32_t Atomic32; 48 #ifdef ARCH_CPU_64_BITS 49 // We need to be able to go between Atomic64 and AtomicWord implicitly. This 50 // means Atomic64 and AtomicWord should be the same type on 64-bit. 51 #if defined(__ILP32__) || defined(OS_NACL) 52 // NaCl's intptr_t is not actually 64-bits on 64-bit! 53 // http://code.google.com/p/nativeclient/issues/detail?id=1162 54 typedef int64_t Atomic64; 55 #else 56 typedef intptr_t Atomic64; 57 #endif 58 #endif 59 60 // Use AtomicWord for a machine-sized pointer. It will use the Atomic32 or 61 // Atomic64 routines below, depending on your architecture. 62 typedef intptr_t AtomicWord; 63 64 // Atomically execute: 65 // result = *ptr; 66 // if (*ptr == old_value) 67 // *ptr = new_value; 68 // return result; 69 // 70 // I.e., replace "*ptr" with "new_value" if "*ptr" used to be "old_value". 71 // Always return the old value of "*ptr" 72 // 73 // This routine implies no memory barriers. 74 Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, 75 Atomic32 old_value, 76 Atomic32 new_value); 77 78 // Atomically store new_value into *ptr, returning the previous value held in 79 // *ptr. This routine implies no memory barriers. 80 Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, Atomic32 new_value); 81 82 // Atomically increment *ptr by "increment". Returns the new value of 83 // *ptr with the increment applied. This routine implies no memory barriers. 84 Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, Atomic32 increment); 85 86 Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr, 87 Atomic32 increment); 88 89 // These following lower-level operations are typically useful only to people 90 // implementing higher-level synchronization operations like spinlocks, 91 // mutexes, and condition-variables. They combine CompareAndSwap(), a load, or 92 // a store with appropriate memory-ordering instructions. "Acquire" operations 93 // ensure that no later memory access can be reordered ahead of the operation. 94 // "Release" operations ensure that no previous memory access can be reordered 95 // after the operation. "Barrier" operations have both "Acquire" and "Release" 96 // semantics. A MemoryBarrier() has "Barrier" semantics, but does no memory 97 // access. 98 Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr, 99 Atomic32 old_value, 100 Atomic32 new_value); 101 Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr, 102 Atomic32 old_value, 103 Atomic32 new_value); 104 105 void MemoryBarrier(); 106 void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value); 107 void Acquire_Store(volatile Atomic32* ptr, Atomic32 value); 108 void Release_Store(volatile Atomic32* ptr, Atomic32 value); 109 110 Atomic32 NoBarrier_Load(volatile const Atomic32* ptr); 111 Atomic32 Acquire_Load(volatile const Atomic32* ptr); 112 Atomic32 Release_Load(volatile const Atomic32* ptr); 113 114 // 64-bit atomic operations (only available on 64-bit processors). 115 #ifdef ARCH_CPU_64_BITS 116 Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr, 117 Atomic64 old_value, 118 Atomic64 new_value); 119 Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr, Atomic64 new_value); 120 Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment); 121 Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment); 122 123 Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr, 124 Atomic64 old_value, 125 Atomic64 new_value); 126 Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr, 127 Atomic64 old_value, 128 Atomic64 new_value); 129 void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value); 130 void Acquire_Store(volatile Atomic64* ptr, Atomic64 value); 131 void Release_Store(volatile Atomic64* ptr, Atomic64 value); 132 Atomic64 NoBarrier_Load(volatile const Atomic64* ptr); 133 Atomic64 Acquire_Load(volatile const Atomic64* ptr); 134 Atomic64 Release_Load(volatile const Atomic64* ptr); 135 #endif // ARCH_CPU_64_BITS 136 137 } // namespace subtle 138 } // namespace base 139 140 // Include our platform specific implementation. 141 #if defined(THREAD_SANITIZER) 142 #include "base/atomicops_internals_tsan.h" 143 #elif defined(OS_WIN) && defined(COMPILER_MSVC) && defined(ARCH_CPU_X86_FAMILY) 144 #include "base/atomicops_internals_x86_msvc.h" 145 #elif defined(OS_MACOSX) 146 #include "base/atomicops_internals_mac.h" 147 #elif defined(OS_NACL) 148 #include "base/atomicops_internals_gcc.h" 149 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_ARMEL) 150 #include "base/atomicops_internals_arm_gcc.h" 151 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_ARM64) 152 #include "base/atomicops_internals_arm64_gcc.h" 153 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_X86_FAMILY) 154 #include "base/atomicops_internals_x86_gcc.h" 155 #elif defined(COMPILER_GCC) && defined(ARCH_CPU_MIPS_FAMILY) 156 #include "base/atomicops_internals_mips_gcc.h" 157 #else 158 #error "Atomic operations are not supported on your platform" 159 #endif 160 161 // On some platforms we need additional declarations to make 162 // AtomicWord compatible with our other Atomic* types. 163 #if defined(OS_MACOSX) || defined(OS_OPENBSD) 164 #include "base/atomicops_internals_atomicword_compat.h" 165 #endif 166 167 #endif // BASE_ATOMICOPS_H_ 168
