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      1 // RUN: %clang_cc1 -x cl -O1 -emit-llvm  %s -o - -triple x86_64-linux-gnu | FileCheck %s
      2 // OpenCL essentially reduces all shift amounts to the last word-size bits before evaluating.
      3 // Test this both for variables and constants evaluated in the front-end.
      4 
      5 
      6 //CHECK: @positiveShift32
      7 int positiveShift32(int a,int b) {
      8   //CHECK: [[M32:%.+]] = and i32 %b, 31
      9   //CHECK-NEXT: [[C32:%.+]] = shl i32 %a, [[M32]]
     10   int c = a<<b;
     11   int d = ((int)1)<<33;
     12   //CHECK-NEXT: [[E32:%.+]] = add nsw i32 [[C32]], 2
     13   int e = c + d;
     14   //CHECK-NEXT: ret i32 [[E32]]
     15   return e;
     16 }
     17 
     18 //CHECK: @positiveShift64
     19 long positiveShift64(long a,long b) {
     20   //CHECK: [[M64:%.+]] = and i64 %b, 63
     21   //CHECK-NEXT: [[C64:%.+]] = ashr i64 %a, [[M64]]
     22   long c = a>>b;
     23   long d = ((long)8)>>65;
     24   //CHECK-NEXT: [[E64:%.+]] = add nsw i64 [[C64]], 4
     25   long e = c + d;
     26   //CHECK-NEXT: ret i64 [[E64]]
     27   return e;
     28 }
     29 
     30 typedef __attribute__((ext_vector_type(4))) int int4;
     31 
     32 //CHECK: @vectorVectorTest
     33 int4 vectorVectorTest(int4 a,int4 b) {
     34   //CHECK: [[VM:%.+]] = and <4 x i32> %b, <i32 31, i32 31, i32 31, i32 31>
     35   //CHECK-NEXT: [[VC:%.+]] = shl <4 x i32> %a, [[VM]]
     36   int4 c = a << b;
     37   //CHECK-NEXT: [[VF:%.+]] = add <4 x i32> [[VC]], <i32 2, i32 4, i32 16, i32 8>
     38   int4 d = {1, 1, 1, 1};
     39   int4 e = {33, 34, -28, -29};
     40   int4 f = c + (d << e);
     41   //CHECK-NEXT: ret <4 x i32> [[VF]]
     42   return f;
     43 }
     44 
     45 //CHECK: @vectorScalarTest
     46 int4 vectorScalarTest(int4 a,int b) {
     47   //CHECK: [[SP0:%.+]] = insertelement <4 x i32> undef, i32 %b, i32 0
     48   //CHECK: [[SP1:%.+]] = shufflevector <4 x i32> [[SP0]], <4 x i32> undef, <4 x i32> zeroinitializer
     49   //CHECK: [[VSM:%.+]] = and <4 x i32> [[SP1]], <i32 31, i32 31, i32 31, i32 31>
     50   //CHECK-NEXT: [[VSC:%.+]] = shl <4 x i32> %a, [[VSM]]
     51   int4 c = a << b;
     52   //CHECK-NEXT: [[VSF:%.+]] = add <4 x i32> [[VSC]], <i32 4, i32 4, i32 4, i32 4>
     53   int4 d = {1, 1, 1, 1};
     54   int4 f = c + (d << 34);
     55   //CHECK-NEXT: ret <4 x i32> [[VSF]]
     56   return f;
     57 }
     58