1 This file is a partial list of people who have contributed to the LLVM 2 project. If you have contributed a patch or made some other contribution to 3 LLVM, please submit a patch to this file to add yourself, and it will be 4 done! 5 6 The list is sorted by surname and formatted to allow easy grepping and 7 beautification by scripts. The fields are: name (N), email (E), web-address 8 (W), PGP key ID and fingerprint (P), description (D), snail-mail address 9 (S), and (I) IRC handle. 10 11 12 N: Vikram Adve 13 E: vadve (a] cs.uiuc.edu 14 W: http://www.cs.uiuc.edu/~vadve/ 15 D: The Sparc64 backend, provider of much wisdom, and motivator for LLVM 16 17 N: Owen Anderson 18 E: resistor (a] mac.com 19 D: LCSSA pass and related LoopUnswitch work 20 D: GVNPRE pass, DataLayout refactoring, random improvements 21 22 N: Henrik Bach 23 D: MingW Win32 API portability layer 24 25 N: Aaron Ballman 26 E: aaron (a] aaronballman.com 27 D: __declspec attributes, Windows support, general bug fixing 28 29 N: Nate Begeman 30 E: natebegeman (a] mac.com 31 D: PowerPC backend developer 32 D: Target-independent code generator and analysis improvements 33 34 N: Daniel Berlin 35 E: dberlin (a] dberlin.org 36 D: ET-Forest implementation. 37 D: Sparse bitmap 38 39 N: David Blaikie 40 E: dblaikie (a] gmail.com 41 D: General bug fixing/fit & finish, mostly in Clang 42 43 N: Neil Booth 44 E: neil (a] daikokuya.co.uk 45 D: APFloat implementation. 46 47 N: Misha Brukman 48 E: brukman+llvm (a] uiuc.edu 49 W: http://misha.brukman.net 50 D: Portions of X86 and Sparc JIT compilers, PowerPC backend 51 D: Incremental bitcode loader 52 53 N: Cameron Buschardt 54 E: buschard (a] uiuc.edu 55 D: The `mem2reg' pass - promotes values stored in memory to registers 56 57 N: Brendon Cahoon 58 E: bcahoon (a] codeaurora.org 59 D: Loop unrolling with run-time trip counts. 60 61 N: Chandler Carruth 62 E: chandlerc (a] gmail.com 63 E: chandlerc (a] google.com 64 D: Hashing algorithms and interfaces 65 D: Inline cost analysis 66 D: Machine block placement pass 67 D: SROA 68 69 N: Casey Carter 70 E: ccarter (a] uiuc.edu 71 D: Fixes to the Reassociation pass, various improvement patches 72 73 N: Evan Cheng 74 E: evan.cheng (a] apple.com 75 D: ARM and X86 backends 76 D: Instruction scheduler improvements 77 D: Register allocator improvements 78 D: Loop optimizer improvements 79 D: Target-independent code generator improvements 80 81 N: Dan Villiom Podlaski Christiansen 82 E: danchr (a] gmail.com 83 E: danchr (a] cs.au.dk 84 W: http://villiom.dk 85 D: LLVM Makefile improvements 86 D: Clang diagnostic & driver tweaks 87 S: Aarhus, Denmark 88 89 N: Jeff Cohen 90 E: jeffc (a] jolt-lang.org 91 W: http://jolt-lang.org 92 D: Native Win32 API portability layer 93 94 N: John T. Criswell 95 E: criswell (a] uiuc.edu 96 D: Original Autoconf support, documentation improvements, bug fixes 97 98 N: Anshuman Dasgupta 99 E: adasgupt (a] codeaurora.org 100 D: Deterministic finite automaton based infrastructure for VLIW packetization 101 102 N: Stefanus Du Toit 103 E: stefanus.du.toit (a] intel.com 104 D: Bug fixes and minor improvements 105 106 N: Rafael Avila de Espindola 107 E: rafael.espindola (a] gmail.com 108 D: The ARM backend 109 110 N: Dave Estes 111 E: cestes (a] codeaurora.org 112 D: AArch64 machine description for Cortex-A53 113 114 N: Alkis Evlogimenos 115 E: alkis (a] evlogimenos.com 116 D: Linear scan register allocator, many codegen improvements, Java frontend 117 118 N: Hal Finkel 119 E: hfinkel (a] anl.gov 120 D: Basic-block autovectorization, PowerPC backend improvements 121 122 N: Ryan Flynn 123 E: pizza (a] parseerror.com 124 D: Miscellaneous bug fixes 125 126 N: Brian Gaeke 127 E: gaeke (a] uiuc.edu 128 W: http://www.students.uiuc.edu/~gaeke/ 129 D: Portions of X86 static and JIT compilers; initial SparcV8 backend 130 D: Dynamic trace optimizer 131 D: FreeBSD/X86 compatibility fixes, the llvm-nm tool 132 133 N: Nicolas Geoffray 134 E: nicolas.geoffray (a] lip6.fr 135 W: http://www-src.lip6.fr/homepages/Nicolas.Geoffray/ 136 D: PPC backend fixes for Linux 137 138 N: Louis Gerbarg 139 E: lgg (a] apple.com 140 D: Portions of the PowerPC backend 141 142 N: Saem Ghani 143 E: saemghani (a] gmail.com 144 D: Callgraph class cleanups 145 146 N: Mikhail Glushenkov 147 E: foldr (a] codedgers.com 148 D: Author of llvmc2 149 150 N: Dan Gohman 151 E: dan433584 (a] gmail.com 152 D: Miscellaneous bug fixes 153 154 N: David Goodwin 155 E: david (a] goodwinz.net 156 D: Thumb-2 code generator 157 158 N: David Greene 159 E: greened (a] obbligato.org 160 D: Miscellaneous bug fixes 161 D: Register allocation refactoring 162 163 N: Gabor Greif 164 E: ggreif (a] gmail.com 165 D: Improvements for space efficiency 166 167 N: James Grosbach 168 E: grosbach (a] apple.com 169 I: grosbach 170 D: SjLj exception handling support 171 D: General fixes and improvements for the ARM back-end 172 D: MCJIT 173 D: ARM integrated assembler and assembly parser 174 D: Led effort for the backend formerly known as ARM64 175 176 N: Lang Hames 177 E: lhames (a] gmail.com 178 D: PBQP-based register allocator 179 180 N: Gordon Henriksen 181 E: gordonhenriksen (a] mac.com 182 D: Pluggable GC support 183 D: C interface 184 D: Ocaml bindings 185 186 N: Raul Fernandes Herbster 187 E: raul (a] dsc.ufcg.edu.br 188 D: JIT support for ARM 189 190 N: Paolo Invernizzi 191 E: arathorn (a] fastwebnet.it 192 D: Visual C++ compatibility fixes 193 194 N: Patrick Jenkins 195 E: patjenk (a] wam.umd.edu 196 D: Nightly Tester 197 198 N: Dale Johannesen 199 E: dalej (a] apple.com 200 D: ARM constant islands improvements 201 D: Tail merging improvements 202 D: Rewrite X87 back end 203 D: Use APFloat for floating point constants widely throughout compiler 204 D: Implement X87 long double 205 206 N: Brad Jones 207 E: kungfoomaster (a] nondot.org 208 D: Support for packed types 209 210 N: Rod Kay 211 E: rkay (a] auroraux.org 212 D: Author of LLVM Ada bindings 213 214 N: Eric Kidd 215 W: http://randomhacks.net/ 216 D: llvm-config script 217 218 N: Anton Korobeynikov 219 E: asl (a] math.spbu.ru 220 D: Mingw32 fixes, cross-compiling support, stdcall/fastcall calling conv. 221 D: x86/linux PIC codegen, aliases, regparm/visibility attributes 222 D: Switch lowering refactoring 223 224 N: Sumant Kowshik 225 E: kowshik (a] uiuc.edu 226 D: Author of the original C backend 227 228 N: Benjamin Kramer 229 E: benny.kra (a] gmail.com 230 D: Miscellaneous bug fixes 231 232 N: Sundeep Kushwaha 233 E: sundeepk (a] codeaurora.org 234 D: Implemented DFA-based target independent VLIW packetizer 235 236 N: Christopher Lamb 237 E: christopher.lamb (a] gmail.com 238 D: aligned load/store support, parts of noalias and restrict support 239 D: vreg subreg infrastructure, X86 codegen improvements based on subregs 240 D: address spaces 241 242 N: Jim Laskey 243 E: jlaskey (a] apple.com 244 D: Improvements to the PPC backend, instruction scheduling 245 D: Debug and Dwarf implementation 246 D: Auto upgrade mangler 247 D: llvm-gcc4 svn wrangler 248 249 N: Chris Lattner 250 E: sabre (a] nondot.org 251 W: http://nondot.org/~sabre/ 252 D: Primary architect of LLVM 253 254 N: Tanya Lattner (Tanya Brethour) 255 E: tonic (a] nondot.org 256 W: http://nondot.org/~tonic/ 257 D: The initial llvm-ar tool, converted regression testsuite to dejagnu 258 D: Modulo scheduling in the SparcV9 backend 259 D: Release manager (1.7+) 260 261 N: Sylvestre Ledru 262 E: sylvestre (a] debian.org 263 W: http://sylvestre.ledru.info/ 264 W: http://llvm.org/apt/ 265 D: Debian and Ubuntu packaging 266 D: Continuous integration with jenkins 267 268 N: Andrew Lenharth 269 E: alenhar2 (a] cs.uiuc.edu 270 W: http://www.lenharth.org/~andrewl/ 271 D: Alpha backend 272 D: Sampling based profiling 273 274 N: Nick Lewycky 275 E: nicholas (a] mxc.ca 276 D: PredicateSimplifier pass 277 278 N: Tony Linthicum, et. al. 279 E: tlinth (a] codeaurora.org 280 D: Backend for Qualcomm's Hexagon VLIW processor. 281 282 N: Bruno Cardoso Lopes 283 E: bruno.cardoso (a] gmail.com 284 W: http://www.brunocardoso.org 285 D: The Mips backend 286 287 N: Duraid Madina 288 E: duraid (a] octopus.com.au 289 W: http://kinoko.c.u-tokyo.ac.jp/~duraid/ 290 D: IA64 backend, BigBlock register allocator 291 292 N: John McCall 293 E: rjmccall (a] apple.com 294 D: Clang semantic analysis and IR generation 295 296 N: Michael McCracken 297 E: michael.mccracken (a] gmail.com 298 D: Line number support for llvmgcc 299 300 N: Vladimir Merzliakov 301 E: wanderer (a] rsu.ru 302 D: Test suite fixes for FreeBSD 303 304 N: Scott Michel 305 E: scottm (a] aero.org 306 D: Added STI Cell SPU backend. 307 308 N: Kai Nacke 309 E: kai (a] redstar.de 310 D: Support for implicit TLS model used with MS VC runtime 311 D: Dumping of Win64 EH structures 312 313 N: Takumi Nakamura 314 E: geek4civic (a] gmail.com 315 E: chapuni (a] hf.rim.or.jp 316 D: Cygwin and MinGW support. 317 D: Win32 tweaks. 318 S: Yokohama, Japan 319 320 N: Edward O'Callaghan 321 E: eocallaghan (a] auroraux.org 322 W: http://www.auroraux.org 323 D: Add Clang support with various other improvements to utils/NewNightlyTest.pl 324 D: Fix and maintain Solaris & AuroraUX support for llvm, various build warnings 325 D: and error clean ups. 326 327 N: Morten Ofstad 328 E: morten (a] hue.no 329 D: Visual C++ compatibility fixes 330 331 N: Jakob Stoklund Olesen 332 E: stoklund (a] 2pi.dk 333 D: Machine code verifier 334 D: Blackfin backend 335 D: Fast register allocator 336 D: Greedy register allocator 337 338 N: Richard Osborne 339 E: richard (a] xmos.com 340 D: XCore backend 341 342 N: Devang Patel 343 E: dpatel (a] apple.com 344 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate 345 D: GCC PCH Integration (llvm-gcc), llvm-gcc improvements 346 D: Optimizer improvements, Loop Index Split 347 348 N: Ana Pazos 349 E: apazos (a] codeaurora.org 350 D: Fixes and improvements to the AArch64 backend 351 352 N: Wesley Peck 353 E: peckw (a] wesleypeck.com 354 W: http://wesleypeck.com/ 355 D: MicroBlaze backend 356 357 N: Francois Pichet 358 E: pichet2000 (a] gmail.com 359 D: MSVC support 360 361 N: Vladimir Prus 362 W: http://vladimir_prus.blogspot.com 363 E: ghost (a] cs.msu.su 364 D: Made inst_iterator behave like a proper iterator, LowerConstantExprs pass 365 366 N: Kalle Raiskila 367 E: kalle.rasikila (a] nokia.com 368 D: Some bugfixes to CellSPU 369 370 N: Xerxes Ranby 371 E: xerxes (a] zafena.se 372 D: Cmake dependency chain and various bug fixes 373 374 N: Alex Rosenberg 375 E: alexr (a] leftfield.org 376 I: arosenberg 377 D: ARM calling conventions rewrite, hard float support 378 379 N: Chad Rosier 380 E: mcrosier (a] codeaurora.org 381 I: mcrosier 382 D: AArch64 fast instruction selection pass 383 D: Fixes and improvements to the ARM fast-isel pass 384 D: Fixes and improvements to the AArch64 backend 385 386 N: Nadav Rotem 387 E: nrotem (a] apple.com 388 D: X86 code generation improvements, Loop Vectorizer. 389 390 N: Roman Samoilov 391 E: roman (a] codedgers.com 392 D: MSIL backend 393 394 N: Duncan Sands 395 E: baldrick (a] free.fr 396 I: baldrick 397 D: Ada support in llvm-gcc 398 D: Dragonegg plugin 399 D: Exception handling improvements 400 D: Type legalizer rewrite 401 402 N: Ruchira Sasanka 403 E: sasanka (a] uiuc.edu 404 D: Graph coloring register allocator for the Sparc64 backend 405 406 N: Arnold Schwaighofer 407 E: arnold.schwaighofer (a] gmail.com 408 D: Tail call optimization for the x86 backend 409 410 N: Shantonu Sen 411 E: ssen (a] apple.com 412 D: Miscellaneous bug fixes 413 414 N: Anand Shukla 415 E: ashukla (a] cs.uiuc.edu 416 D: The `paths' pass 417 418 N: Michael J. Spencer 419 E: bigcheesegs (a] gmail.com 420 D: Shepherding Windows COFF support into MC. 421 D: Lots of Windows stuff. 422 423 N: Reid Spencer 424 E: rspencer (a] reidspencer.com 425 W: http://reidspencer.com/ 426 D: Lots of stuff, see: http://wiki.llvm.org/index.php/User:Reid 427 428 N: Alp Toker 429 E: alp (a] nuanti.com 430 W: http://atoker.com/ 431 D: C++ frontend next generation standards implementation 432 433 N: Craig Topper 434 E: craig.topper (a] gmail.com 435 D: X86 codegen and disassembler improvements. AVX2 support. 436 437 N: Edwin Torok 438 E: edwintorok (a] gmail.com 439 D: Miscellaneous bug fixes 440 441 N: Adam Treat 442 E: manyoso (a] yahoo.com 443 D: C++ bugs filed, and C++ front-end bug fixes. 444 445 N: Lauro Ramos Venancio 446 E: lauro.venancio (a] indt.org.br 447 D: ARM backend improvements 448 D: Thread Local Storage implementation 449 450 N: Bill Wendling 451 I: wendling 452 E: isanbard (a] gmail.com 453 D: Release manager, IR Linker, LTO 454 D: Bunches of stuff 455 456 N: Bob Wilson 457 E: bob.wilson (a] acm.org 458 D: Advanced SIMD (NEON) support in the ARM backend. 459
