1 //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the AArch64 specific subclass of TargetMachine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef AArch64TARGETMACHINE_H 15 #define AArch64TARGETMACHINE_H 16 17 #include "AArch64InstrInfo.h" 18 #include "AArch64Subtarget.h" 19 #include "llvm/IR/DataLayout.h" 20 #include "llvm/Target/TargetMachine.h" 21 22 namespace llvm { 23 24 class AArch64TargetMachine : public LLVMTargetMachine { 25 protected: 26 AArch64Subtarget Subtarget; 27 28 public: 29 AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU, 30 StringRef FS, const TargetOptions &Options, 31 Reloc::Model RM, CodeModel::Model CM, 32 CodeGenOpt::Level OL, bool IsLittleEndian); 33 34 const AArch64Subtarget *getSubtargetImpl() const override { 35 return &Subtarget; 36 } 37 const AArch64TargetLowering *getTargetLowering() const override { 38 return getSubtargetImpl()->getTargetLowering(); 39 } 40 const DataLayout *getDataLayout() const override { 41 return getSubtargetImpl()->getDataLayout(); 42 } 43 const AArch64FrameLowering *getFrameLowering() const override { 44 return getSubtargetImpl()->getFrameLowering(); 45 } 46 const AArch64InstrInfo *getInstrInfo() const override { 47 return getSubtargetImpl()->getInstrInfo(); 48 } 49 const AArch64RegisterInfo *getRegisterInfo() const override { 50 return &getInstrInfo()->getRegisterInfo(); 51 } 52 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override { 53 return getSubtargetImpl()->getSelectionDAGInfo(); 54 } 55 56 // Pass Pipeline Configuration 57 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 58 59 /// \brief Register AArch64 analysis passes with a pass manager. 60 void addAnalysisPasses(PassManagerBase &PM) override; 61 }; 62 63 // AArch64leTargetMachine - AArch64 little endian target machine. 64 // 65 class AArch64leTargetMachine : public AArch64TargetMachine { 66 virtual void anchor(); 67 public: 68 AArch64leTargetMachine(const Target &T, StringRef TT, StringRef CPU, 69 StringRef FS, const TargetOptions &Options, 70 Reloc::Model RM, CodeModel::Model CM, 71 CodeGenOpt::Level OL); 72 }; 73 74 // AArch64beTargetMachine - AArch64 big endian target machine. 75 // 76 class AArch64beTargetMachine : public AArch64TargetMachine { 77 virtual void anchor(); 78 public: 79 AArch64beTargetMachine(const Target &T, StringRef TT, StringRef CPU, 80 StringRef FS, const TargetOptions &Options, 81 Reloc::Model RM, CodeModel::Model CM, 82 CodeGenOpt::Level OL); 83 }; 84 85 } // end namespace llvm 86 87 #endif 88
