1 //===-- MipsMCCodeEmitter.h - Convert Mips Code to Machine Code -----------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines the MipsMCCodeEmitter class. 11 // 12 //===----------------------------------------------------------------------===// 13 // 14 15 #ifndef MIPS_MC_CODE_EMITTER_H 16 #define MIPS_MC_CODE_EMITTER_H 17 18 #include "llvm/MC/MCCodeEmitter.h" 19 #include "llvm/Support/DataTypes.h" 20 21 using namespace llvm; 22 23 namespace llvm { 24 class MCContext; 25 class MCExpr; 26 class MCInst; 27 class MCInstrInfo; 28 class MCFixup; 29 class MCOperand; 30 class MCSubtargetInfo; 31 class raw_ostream; 32 33 class MipsMCCodeEmitter : public MCCodeEmitter { 34 MipsMCCodeEmitter(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION; 35 void operator=(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION; 36 const MCInstrInfo &MCII; 37 MCContext &Ctx; 38 bool IsLittleEndian; 39 40 bool isMicroMips(const MCSubtargetInfo &STI) const; 41 42 public: 43 MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle) 44 : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {} 45 46 ~MipsMCCodeEmitter() {} 47 48 void EmitByte(unsigned char C, raw_ostream &OS) const; 49 50 void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI, 51 raw_ostream &OS) const; 52 53 void EncodeInstruction(const MCInst &MI, raw_ostream &OS, 54 SmallVectorImpl<MCFixup> &Fixups, 55 const MCSubtargetInfo &STI) const override; 56 57 // getBinaryCodeForInstr - TableGen'erated function for getting the 58 // binary encoding for an instruction. 59 uint64_t getBinaryCodeForInstr(const MCInst &MI, 60 SmallVectorImpl<MCFixup> &Fixups, 61 const MCSubtargetInfo &STI) const; 62 63 // getBranchJumpOpValue - Return binary encoding of the jump 64 // target operand. If the machine operand requires relocation, 65 // record the relocation and return zero. 66 unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo, 67 SmallVectorImpl<MCFixup> &Fixups, 68 const MCSubtargetInfo &STI) const; 69 70 // getBranchJumpOpValueMM - Return binary encoding of the microMIPS jump 71 // target operand. If the machine operand requires relocation, 72 // record the relocation and return zero. 73 unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo, 74 SmallVectorImpl<MCFixup> &Fixups, 75 const MCSubtargetInfo &STI) const; 76 77 // getBranchTargetOpValue - Return binary encoding of the branch 78 // target operand. If the machine operand requires relocation, 79 // record the relocation and return zero. 80 unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo, 81 SmallVectorImpl<MCFixup> &Fixups, 82 const MCSubtargetInfo &STI) const; 83 84 // getBranchTargetOpValue - Return binary encoding of the microMIPS branch 85 // target operand. If the machine operand requires relocation, 86 // record the relocation and return zero. 87 unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo, 88 SmallVectorImpl<MCFixup> &Fixups, 89 const MCSubtargetInfo &STI) const; 90 91 // getBranchTarget21OpValue - Return binary encoding of the branch 92 // offset operand. If the machine operand requires relocation, 93 // record the relocation and return zero. 94 unsigned getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo, 95 SmallVectorImpl<MCFixup> &Fixups, 96 const MCSubtargetInfo &STI) const; 97 98 // getBranchTarget26OpValue - Return binary encoding of the branch 99 // offset operand. If the machine operand requires relocation, 100 // record the relocation and return zero. 101 unsigned getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo, 102 SmallVectorImpl<MCFixup> &Fixups, 103 const MCSubtargetInfo &STI) const; 104 105 // getJumpOffset16OpValue - Return binary encoding of the jump 106 // offset operand. If the machine operand requires relocation, 107 // record the relocation and return zero. 108 unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo, 109 SmallVectorImpl<MCFixup> &Fixups, 110 const MCSubtargetInfo &STI) const; 111 112 // getMachineOpValue - Return binary encoding of operand. If the machin 113 // operand requires relocation, record the relocation and return zero. 114 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO, 115 SmallVectorImpl<MCFixup> &Fixups, 116 const MCSubtargetInfo &STI) const; 117 118 unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo, 119 SmallVectorImpl<MCFixup> &Fixups, 120 const MCSubtargetInfo &STI) const; 121 122 unsigned getMemEncoding(const MCInst &MI, unsigned OpNo, 123 SmallVectorImpl<MCFixup> &Fixups, 124 const MCSubtargetInfo &STI) const; 125 unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo, 126 SmallVectorImpl<MCFixup> &Fixups, 127 const MCSubtargetInfo &STI) const; 128 unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo, 129 SmallVectorImpl<MCFixup> &Fixups, 130 const MCSubtargetInfo &STI) const; 131 unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo, 132 SmallVectorImpl<MCFixup> &Fixups, 133 const MCSubtargetInfo &STI) const; 134 135 // getLSAImmEncoding - Return binary encoding of LSA immediate. 136 unsigned getLSAImmEncoding(const MCInst &MI, unsigned OpNo, 137 SmallVectorImpl<MCFixup> &Fixups, 138 const MCSubtargetInfo &STI) const; 139 140 unsigned getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo, 141 SmallVectorImpl<MCFixup> &Fixups, 142 const MCSubtargetInfo &STI) const; 143 144 unsigned getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo, 145 SmallVectorImpl<MCFixup> &Fixups, 146 const MCSubtargetInfo &STI) const; 147 148 unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups, 149 const MCSubtargetInfo &STI) const; 150 151 }; // class MipsMCCodeEmitter 152 } // namespace llvm. 153 154 #endif 155
