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      1 //===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 //
     10 // This file declares the Mips specific subclass of TargetMachine.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef MIPSTARGETMACHINE_H
     15 #define MIPSTARGETMACHINE_H
     16 
     17 #include "MipsSubtarget.h"
     18 #include "llvm/CodeGen/Passes.h"
     19 #include "llvm/CodeGen/SelectionDAGISel.h"
     20 #include "llvm/Target/TargetFrameLowering.h"
     21 #include "llvm/Target/TargetMachine.h"
     22 
     23 namespace llvm {
     24 class formatted_raw_ostream;
     25 class MipsRegisterInfo;
     26 
     27 class MipsTargetMachine : public LLVMTargetMachine {
     28   MipsSubtarget       Subtarget;
     29 
     30 public:
     31   MipsTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
     32                     const TargetOptions &Options, Reloc::Model RM,
     33                     CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle);
     34 
     35   virtual ~MipsTargetMachine() {}
     36 
     37   void addAnalysisPasses(PassManagerBase &PM) override;
     38 
     39   const MipsInstrInfo *getInstrInfo() const override {
     40     return getSubtargetImpl()->getInstrInfo();
     41   }
     42   const TargetFrameLowering *getFrameLowering() const override {
     43     return getSubtargetImpl()->getFrameLowering();
     44   }
     45   const MipsSubtarget *getSubtargetImpl() const override { return &Subtarget; }
     46   const InstrItineraryData *getInstrItineraryData() const override {
     47     return Subtarget.inMips16Mode()
     48                ? nullptr
     49                : &getSubtargetImpl()->getInstrItineraryData();
     50   }
     51   MipsJITInfo *getJITInfo() override {
     52     return Subtarget.getJITInfo();
     53   }
     54   const MipsRegisterInfo *getRegisterInfo()  const override {
     55     return getSubtargetImpl()->getRegisterInfo();
     56   }
     57   const MipsTargetLowering *getTargetLowering() const override {
     58     return getSubtargetImpl()->getTargetLowering();
     59   }
     60   const DataLayout *getDataLayout() const override {
     61     return getSubtargetImpl()->getDataLayout();
     62   }
     63   const MipsSelectionDAGInfo* getSelectionDAGInfo() const override {
     64     return getSubtargetImpl()->getSelectionDAGInfo();
     65   }
     66 
     67   // Pass Pipeline Configuration
     68   TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
     69   bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
     70 };
     71 
     72 /// MipsebTargetMachine - Mips32/64 big endian target machine.
     73 ///
     74 class MipsebTargetMachine : public MipsTargetMachine {
     75   virtual void anchor();
     76 public:
     77   MipsebTargetMachine(const Target &T, StringRef TT,
     78                       StringRef CPU, StringRef FS, const TargetOptions &Options,
     79                       Reloc::Model RM, CodeModel::Model CM,
     80                       CodeGenOpt::Level OL);
     81 };
     82 
     83 /// MipselTargetMachine - Mips32/64 little endian target machine.
     84 ///
     85 class MipselTargetMachine : public MipsTargetMachine {
     86   virtual void anchor();
     87 public:
     88   MipselTargetMachine(const Target &T, StringRef TT,
     89                       StringRef CPU, StringRef FS, const TargetOptions &Options,
     90                       Reloc::Model RM, CodeModel::Model CM,
     91                       CodeGenOpt::Level OL);
     92 };
     93 
     94 } // End llvm namespace
     95 
     96 #endif
     97