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      1 ; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s
      2 ; RUN: llc -march=mips64el -mcpu=mips4 < %s | \
      3 ; RUN:      FileCheck %s -check-prefix=CHECK-MIPS64
      4 ; RUN: llc -march=mips64el -mcpu=mips64 < %s | \
      5 ; RUN:      FileCheck %s -check-prefix=CHECK-MIPS64
      6 
      7 declare i8* @llvm.eh.dwarf.cfa(i32) nounwind
      8 declare i8* @llvm.frameaddress(i32) nounwind readnone
      9 
     10 define i8* @f1() nounwind {
     11 entry:
     12   %x = alloca [32 x i8], align 1
     13   %0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
     14   ret i8* %0
     15 
     16 ; CHECK:        addiu   $sp, $sp, -32
     17 ; CHECK:        addiu   $2, $sp, 32
     18 }
     19 
     20 
     21 define i8* @f2() nounwind {
     22 entry:
     23   %x = alloca [65536 x i8], align 1
     24   %0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
     25   ret i8* %0
     26 
     27 ; check stack size (65536 + 8)
     28 ; CHECK:        lui     $[[R0:[a-z0-9]+]], 65535
     29 ; CHECK:        addiu   $[[R0]], $[[R0]], -8
     30 ; CHECK:        addu    $sp, $sp, $[[R0]]
     31 
     32 ; check return value ($sp + stack size)
     33 ; CHECK:        lui     $[[R1:[a-z0-9]+]], 1
     34 ; CHECK:        addu    $[[R1]], $sp, $[[R1]]
     35 ; CHECK:        addiu   $2, $[[R1]], 8
     36 }
     37 
     38 
     39 define i32 @f3() nounwind {
     40 entry:
     41   %x = alloca [32 x i8], align 1
     42   %0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
     43   %1 = ptrtoint i8* %0 to i32
     44   %2 = call i8* @llvm.frameaddress(i32 0)
     45   %3 = ptrtoint i8* %2 to i32
     46   %add = add i32 %1, %3
     47   ret i32 %add
     48 
     49 ; CHECK:        addiu   $sp, $sp, -40
     50 
     51 ; check return value ($fp + stack size + $fp)
     52 ; CHECK:        addiu   $[[R0:[a-z0-9]+]], $fp, 40
     53 ; CHECK:        addu    $2, $[[R0]], $fp
     54 }
     55 
     56 
     57 define i8* @f4() nounwind {
     58 entry:
     59   %x = alloca [32 x i8], align 1
     60   %0 = call i8* @llvm.eh.dwarf.cfa(i32 0)
     61   ret i8* %0
     62 
     63 ; CHECK-MIPS64:        daddiu   $sp, $sp, -32
     64 ; CHECK-MIPS64:        daddiu   $2, $sp, 32
     65 }
     66