1 ; RUN: llc -march=mipsel < %s | FileCheck %s 2 3 define i32 @main() nounwind { 4 entry: 5 6 ; First I with short 7 ; CHECK: #APP 8 ; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},4096 9 ; CHECK: #NO_APP 10 tail call i16 asm sideeffect "addiu $0,$1,$2", "=r,r,I"(i16 7, i16 4096) nounwind 11 12 ; Then I with int 13 ; CHECK: #APP 14 ; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},-3 15 ; CHECK: #NO_APP 16 tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,I"(i32 7, i32 -3) nounwind 17 18 ; Now J with 0 19 ; CHECK: #APP 20 ; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},0 21 ; CHECK: #NO_APP 22 tail call i32 asm sideeffect "addiu $0,$1,$2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind 23 24 ; Now K with 64 25 ; CHECK: #APP 26 ; CHECK: addu ${{[0-9]+}},${{[0-9]+}},64 27 ; CHECK: #NO_APP 28 tail call i16 asm sideeffect "addu $0,$1,$2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind 29 30 ; Now L with 0x00100000 31 ; CHECK: #APP 32 ; CHECK: add ${{[0-9]+}},${{[0-9]+}},${{[0-9]+}} 33 ; CHECK: #NO_APP 34 tail call i32 asm sideeffect "add $0,$1,$3\0A\09", "=r,r,L,r"(i32 7, i32 1048576, i32 0) nounwind 35 36 ; Now N with -3 37 ; CHECK: #APP 38 ; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},-3 39 ; CHECK: #NO_APP 40 tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,N"(i32 7, i32 -3) nounwind 41 42 ; Now O with -3 43 ; CHECK: #APP 44 ; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},-3 45 ; CHECK: #NO_APP 46 tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,O"(i32 7, i16 -3) nounwind 47 48 ; Now P with 65535 49 ; CHECK: #APP 50 ; CHECK: addiu ${{[0-9]+}},${{[0-9]+}},65535 51 ; CHECK: #NO_APP 52 tail call i32 asm sideeffect "addiu $0,$1,$2", "=r,r,P"(i32 7, i32 65535) nounwind 53 54 ; Now R Which takes the address of c 55 %c = alloca i32, align 4 56 store i32 -4469539, i32* %c, align 4 57 %8 = call i32 asm sideeffect "lw $0, 1 + $1\0A\09lw $0, 2 + $1\0A\09", "=r,*R"(i32* %c) #1 58 ; CHECK: #APP 59 ; CHECK: lw ${{[0-9]+}}, 1 + 0(${{[0-9]+}}) 60 ; CHECK: lw ${{[0-9]+}}, 2 + 0(${{[0-9]+}}) 61 ; CHECK: #NO_APP 62 63 ret i32 0 64 } 65
