1 ; Test the MSA move intrinsics (which are encoded with the ELM instruction 2 ; format). 3 4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s 5 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s 6 7 @llvm_mips_move_vb_ARG1 = global <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>, align 16 8 @llvm_mips_move_vb_RES = global <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, align 16 9 10 define void @llvm_mips_move_vb_test() nounwind { 11 entry: 12 %0 = load <16 x i8>* @llvm_mips_move_vb_ARG1 13 %1 = tail call <16 x i8> @llvm.mips.move.v(<16 x i8> %0) 14 store <16 x i8> %1, <16 x i8>* @llvm_mips_move_vb_RES 15 ret void 16 } 17 18 declare <16 x i8> @llvm.mips.move.v(<16 x i8>) nounwind 19 20 ; CHECK: llvm_mips_move_vb_test: 21 ; CHECK: ld.b 22 ; CHECK: move.v 23 ; CHECK: st.b 24 ; CHECK: .size llvm_mips_move_vb_test 25 ; 26
