1 ; RUN: llc -march=mips < %s 2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s 3 ; RUN: llc -march=mipsel < %s 4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s 5 6 ; This test originally failed for MSA with a 7 ; "Unexpected illegal type!" assertion. 8 ; It should at least successfully build. 9 10 define void @autogen_SD1704963983(i8*, i32*, i64*, i32, i64, i8) { 11 BB: 12 %A4 = alloca <4 x double> 13 %A3 = alloca <8 x i64> 14 %A2 = alloca <1 x double> 15 %A1 = alloca double 16 %A = alloca i32 17 %L = load i8* %0 18 store i8 77, i8* %0 19 %E = extractelement <8 x i64> zeroinitializer, i32 2 20 %Shuff = shufflevector <8 x i64> zeroinitializer, <8 x i64> zeroinitializer, <8 x i32> <i32 5, i32 7, i32 undef, i32 undef, i32 13, i32 15, i32 1, i32 3> 21 %I = insertelement <8 x i64> zeroinitializer, i64 %E, i32 7 22 %Sl = select i1 false, i8* %0, i8* %0 23 %Cmp = icmp eq i32 434069, 272505 24 br label %CF 25 26 CF: ; preds = %CF, %CF78, %BB 27 %L5 = load i8* %Sl 28 store i8 %L, i8* %Sl 29 %E6 = extractelement <8 x i32> zeroinitializer, i32 2 30 %Shuff7 = shufflevector <8 x i64> zeroinitializer, <8 x i64> %Shuff, <8 x i32> <i32 13, i32 15, i32 1, i32 3, i32 5, i32 7, i32 9, i32 undef> 31 %I8 = insertelement <8 x i64> zeroinitializer, i64 %4, i32 7 32 %B = shl <1 x i16> zeroinitializer, zeroinitializer 33 %FC = sitofp <8 x i64> zeroinitializer to <8 x float> 34 %Sl9 = select i1 %Cmp, i8 77, i8 77 35 %Cmp10 = icmp uge <8 x i64> %Shuff, zeroinitializer 36 %L11 = load i8* %0 37 store i8 %Sl9, i8* %0 38 %E12 = extractelement <1 x i16> zeroinitializer, i32 0 39 %Shuff13 = shufflevector <8 x i64> zeroinitializer, <8 x i64> %Shuff, <8 x i32> <i32 9, i32 11, i32 13, i32 15, i32 undef, i32 3, i32 5, i32 7> 40 %I14 = insertelement <4 x i32> zeroinitializer, i32 %3, i32 3 41 %B15 = udiv <1 x i16> %B, zeroinitializer 42 %Tr = trunc <8 x i64> %Shuff to <8 x i32> 43 %Sl16 = select i1 %Cmp, i8 77, i8 %5 44 %Cmp17 = icmp ult <8 x i1> %Cmp10, %Cmp10 45 %L18 = load i8* %Sl 46 store i8 -1, i8* %Sl 47 %E19 = extractelement <8 x i32> zeroinitializer, i32 3 48 %Shuff20 = shufflevector <8 x float> %FC, <8 x float> %FC, <8 x i32> <i32 6, i32 8, i32 undef, i32 12, i32 14, i32 0, i32 2, i32 undef> 49 %I21 = insertelement <8 x i64> %Shuff13, i64 %E, i32 0 50 %B22 = urem <8 x i64> %Shuff7, %I21 51 %FC23 = sitofp i32 50347 to float 52 %Sl24 = select i1 %Cmp, double 0.000000e+00, double 0.000000e+00 53 %Cmp25 = icmp ugt i32 465489, 47533 54 br i1 %Cmp25, label %CF, label %CF78 55 56 CF78: ; preds = %CF 57 %L26 = load i8* %Sl 58 store i32 50347, i32* %A 59 %E27 = extractelement <8 x i1> %Cmp10, i32 2 60 br i1 %E27, label %CF, label %CF77 61 62 CF77: ; preds = %CF77, %CF81, %CF78 63 %Shuff28 = shufflevector <8 x i64> zeroinitializer, <8 x i64> %Shuff, <8 x i32> <i32 13, i32 15, i32 1, i32 3, i32 5, i32 7, i32 9, i32 undef> 64 %I29 = insertelement <1 x i16> zeroinitializer, i16 -1, i32 0 65 %B30 = urem <8 x i32> %Tr, zeroinitializer 66 %Tr31 = trunc i32 0 to i16 67 %Sl32 = select i1 %Cmp, <2 x i1> zeroinitializer, <2 x i1> zeroinitializer 68 %L33 = load i8* %Sl 69 store i8 %L26, i8* %Sl 70 %E34 = extractelement <4 x i32> zeroinitializer, i32 0 71 %Shuff35 = shufflevector <1 x i16> zeroinitializer, <1 x i16> %B, <1 x i32> undef 72 %I36 = insertelement <8 x i64> %Shuff28, i64 %E, i32 7 73 %B37 = srem <1 x i16> %I29, zeroinitializer 74 %FC38 = sitofp <8 x i32> %B30 to <8 x double> 75 %Sl39 = select i1 %Cmp, double 0.000000e+00, double %Sl24 76 %L40 = load i8* %Sl 77 store i8 %Sl16, i8* %Sl 78 %E41 = extractelement <1 x i16> zeroinitializer, i32 0 79 %Shuff42 = shufflevector <8 x i1> %Cmp17, <8 x i1> %Cmp10, <8 x i32> <i32 14, i32 undef, i32 2, i32 4, i32 undef, i32 8, i32 10, i32 12> 80 %I43 = insertelement <4 x i32> zeroinitializer, i32 272505, i32 0 81 %B44 = urem <8 x i32> %B30, %Tr 82 %PC = bitcast i8* %0 to i64* 83 %Sl45 = select i1 %Cmp, <8 x i1> %Cmp10, <8 x i1> %Shuff42 84 %Cmp46 = fcmp ugt float 0xB856238A00000000, 0x47DA795E40000000 85 br i1 %Cmp46, label %CF77, label %CF80 86 87 CF80: ; preds = %CF80, %CF77 88 %L47 = load i64* %PC 89 store i8 77, i8* %Sl 90 %E48 = extractelement <8 x i64> zeroinitializer, i32 2 91 %Shuff49 = shufflevector <8 x i64> zeroinitializer, <8 x i64> %Shuff7, <8 x i32> <i32 5, i32 7, i32 9, i32 undef, i32 undef, i32 undef, i32 undef, i32 3> 92 %I50 = insertelement <8 x i64> zeroinitializer, i64 %L47, i32 7 93 %B51 = fdiv float 0x46CC2D8000000000, %FC23 94 %PC52 = bitcast <8 x i64>* %A3 to i64* 95 %Sl53 = select i1 %Cmp, <8 x i64> %Shuff, <8 x i64> %Shuff 96 %Cmp54 = fcmp ole float 0x47DA795E40000000, 0xB856238A00000000 97 br i1 %Cmp54, label %CF80, label %CF81 98 99 CF81: ; preds = %CF80 100 %L55 = load i8* %Sl 101 store i8 %Sl16, i8* %Sl 102 %E56 = extractelement <1 x i16> %B, i32 0 103 %Shuff57 = shufflevector <1 x i16> zeroinitializer, <1 x i16> zeroinitializer, <1 x i32> <i32 1> 104 %I58 = insertelement <8 x i64> zeroinitializer, i64 %L47, i32 7 105 %B59 = srem i32 %E19, %E19 106 %Sl60 = select i1 %Cmp, i8 77, i8 77 107 %Cmp61 = icmp ult <1 x i16> zeroinitializer, %B 108 %L62 = load i8* %Sl 109 store i64 %L47, i64* %PC52 110 %E63 = extractelement <4 x i32> %I43, i32 2 111 %Shuff64 = shufflevector <4 x i1> zeroinitializer, <4 x i1> zeroinitializer, <4 x i32> <i32 undef, i32 undef, i32 1, i32 3> 112 %I65 = insertelement <8 x i64> %B22, i64 %L47, i32 7 113 %B66 = add <8 x i64> %I50, %I65 114 %FC67 = uitofp i16 %E12 to float 115 %Sl68 = select i1 %Cmp, <8 x i32> %B30, <8 x i32> zeroinitializer 116 %Cmp69 = fcmp ord double 0.000000e+00, 0.000000e+00 117 br i1 %Cmp69, label %CF77, label %CF79 118 119 CF79: ; preds = %CF81 120 %L70 = load i32* %A 121 store i64 %4, i64* %PC 122 %E71 = extractelement <4 x i32> zeroinitializer, i32 0 123 %Shuff72 = shufflevector <8 x i32> zeroinitializer, <8 x i32> %B44, <8 x i32> <i32 11, i32 undef, i32 15, i32 1, i32 3, i32 undef, i32 7, i32 9> 124 %I73 = insertelement <8 x i16> zeroinitializer, i16 %E12, i32 5 125 %B74 = fsub double 0.000000e+00, 0.000000e+00 126 %Sl75 = select i1 %Cmp46, i32 %E6, i32 %E19 127 %Cmp76 = icmp ugt <4 x i32> %I43, zeroinitializer 128 store i8 %L, i8* %Sl 129 store i64 %L47, i64* %PC 130 store i64 %L47, i64* %PC 131 store i8 %L5, i8* %Sl 132 store i8 %L5, i8* %0 133 ret void 134 } 135
