1 ; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s -check-prefix=ALL -check-prefix=ODDSPREG 2 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+nooddspreg < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOODDSPREG 3 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=ODDSPREG 4 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64,+nooddspreg < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOODDSPREG 5 6 ; ODDSPREG: .module oddspreg 7 ; NOODDSPREG: .module nooddspreg 8 9 define float @two_floats(float %a) { 10 entry: 11 ; Clobber all except $f12 and $f13 12 ; 13 ; The intention is that if odd single precision registers are permitted, the 14 ; allocator will choose $f12 and $f13 to avoid the spill/reload. 15 ; 16 ; On the other hand, if odd single precision registers are not permitted, it 17 ; will be forced to spill/reload either %a or %0. 18 19 %0 = fadd float %a, 1.0 20 call void asm "# Clobber", "~{$f0},~{$f1},~{$f2},~{$f3},~{$f4},~{$f5},~{$f6},~{$f7},~{$f8},~{$f9},~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"() 21 %1 = fadd float %a, %0 22 ret float %1 23 } 24 25 ; ALL-LABEL: two_floats: 26 ; ODDSPREG: add.s $f13, $f12, ${{f[0-9]+}} 27 ; ODDSPREG-NOT: swc1 28 ; ODDSPREG-NOT: lwc1 29 ; ODDSPREG: add.s $f0, $f12, $f13 30 31 ; NOODDSPREG: add.s $[[T0:f[0-9]*[02468]]], $f12, ${{f[0-9]+}} 32 ; NOODDSPREG: swc1 $[[T0]], 33 ; NOODDSPREG: lwc1 $[[T1:f[0-9]*[02468]]], 34 ; NOODDSPREG: add.s $f0, $f12, $[[T1]] 35 36 define double @two_doubles(double %a) { 37 entry: 38 ; Clobber all except $f12 and $f13 39 ; 40 ; -mno-odd-sp-reg doesn't need to affect double precision values so both cases 41 ; use $f12 and $f13. 42 43 %0 = fadd double %a, 1.0 44 call void asm "# Clobber", "~{$f0},~{$f1},~{$f2},~{$f3},~{$f4},~{$f5},~{$f6},~{$f7},~{$f8},~{$f9},~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"() 45 %1 = fadd double %a, %0 46 ret double %1 47 } 48 49 ; ALL-LABEL: two_doubles: 50 ; ALL: add.d $[[T0:f[0-9]+]], $f12, ${{f[0-9]+}} 51 ; ALL: add.d $f0, $f12, $[[T0]] 52 53 54 ; INVALID: -mattr=+nooddspreg is not currently permitted for a 32-bit FPU register file (FR=0 mode). 55
