1 ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s 2 3 ;CHECK: MUL NON-IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} 4 5 define void @test(<4 x float> inreg %reg0) #0 { 6 %r0 = extractelement <4 x float> %reg0, i32 0 7 %r1 = extractelement <4 x float> %reg0, i32 1 8 %r2 = call float @llvm.AMDGPU.mul( float %r0, float %r1) 9 %vec = insertelement <4 x float> undef, float %r2, i32 0 10 call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0) 11 ret void 12 } 13 14 declare float @llvm.AMDGPU.mul(float ,float ) readnone 15 declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) 16 17 attributes #0 = { "ShaderType"="0" }
