1 ; This test makes sure that mul instructions are properly eliminated. 2 ; RUN: opt < %s -instcombine -S | FileCheck %s 3 4 define i32 @test1(i32 %A) { 5 ; CHECK-LABEL: @test1( 6 %B = mul i32 %A, 1 ; <i32> [#uses=1] 7 ret i32 %B 8 ; CHECK: ret i32 %A 9 } 10 11 define i32 @test2(i32 %A) { 12 ; CHECK-LABEL: @test2( 13 ; Should convert to an add instruction 14 %B = mul i32 %A, 2 ; <i32> [#uses=1] 15 ret i32 %B 16 ; CHECK: shl i32 %A, 1 17 } 18 19 define i32 @test3(i32 %A) { 20 ; CHECK-LABEL: @test3( 21 ; This should disappear entirely 22 %B = mul i32 %A, 0 ; <i32> [#uses=1] 23 ret i32 %B 24 ; CHECK: ret i32 0 25 } 26 27 define double @test4(double %A) { 28 ; CHECK-LABEL: @test4( 29 ; This is safe for FP 30 %B = fmul double 1.000000e+00, %A ; <double> [#uses=1] 31 ret double %B 32 ; CHECK: ret double %A 33 } 34 35 define i32 @test5(i32 %A) { 36 ; CHECK-LABEL: @test5( 37 %B = mul i32 %A, 8 ; <i32> [#uses=1] 38 ret i32 %B 39 ; CHECK: shl i32 %A, 3 40 } 41 42 define i8 @test6(i8 %A) { 43 ; CHECK-LABEL: @test6( 44 %B = mul i8 %A, 8 ; <i8> [#uses=1] 45 %C = mul i8 %B, 8 ; <i8> [#uses=1] 46 ret i8 %C 47 ; CHECK: shl i8 %A, 6 48 } 49 50 define i32 @test7(i32 %i) { 51 ; CHECK-LABEL: @test7( 52 %tmp = mul i32 %i, -1 ; <i32> [#uses=1] 53 ret i32 %tmp 54 ; CHECK: sub i32 0, %i 55 } 56 57 define i64 @test8(i64 %i) { 58 ; CHECK-LABEL: @test8( 59 %j = mul i64 %i, -1 ; <i64> [#uses=1] 60 ret i64 %j 61 ; CHECK: sub i64 0, %i 62 } 63 64 define i32 @test9(i32 %i) { 65 ; CHECK-LABEL: @test9( 66 %j = mul i32 %i, -1 ; <i32> [#uses=1] 67 ret i32 %j 68 ; CHECK: sub i32 0, %i 69 } 70 71 define i32 @test10(i32 %a, i32 %b) { 72 ; CHECK-LABEL: @test10( 73 %c = icmp slt i32 %a, 0 ; <i1> [#uses=1] 74 %d = zext i1 %c to i32 ; <i32> [#uses=1] 75 ; e = b & (a >> 31) 76 %e = mul i32 %d, %b ; <i32> [#uses=1] 77 ret i32 %e 78 ; CHECK: [[TEST10:%.*]] = ashr i32 %a, 31 79 ; CHECK-NEXT: %e = and i32 [[TEST10]], %b 80 ; CHECK-NEXT: ret i32 %e 81 } 82 83 define i32 @test11(i32 %a, i32 %b) { 84 ; CHECK-LABEL: @test11( 85 %c = icmp sle i32 %a, -1 ; <i1> [#uses=1] 86 %d = zext i1 %c to i32 ; <i32> [#uses=1] 87 ; e = b & (a >> 31) 88 %e = mul i32 %d, %b ; <i32> [#uses=1] 89 ret i32 %e 90 ; CHECK: [[TEST11:%.*]] = ashr i32 %a, 31 91 ; CHECK-NEXT: %e = and i32 [[TEST11]], %b 92 ; CHECK-NEXT: ret i32 %e 93 } 94 95 define i32 @test12(i32 %a, i32 %b) { 96 ; CHECK-LABEL: @test12( 97 %c = icmp ugt i32 %a, 2147483647 ; <i1> [#uses=1] 98 %d = zext i1 %c to i32 ; <i32> [#uses=1] 99 %e = mul i32 %d, %b ; <i32> [#uses=1] 100 ret i32 %e 101 ; CHECK: [[TEST12:%.*]] = ashr i32 %a, 31 102 ; CHECK-NEXT: %e = and i32 [[TEST12]], %b 103 ; CHECK-NEXT: ret i32 %e 104 105 } 106 107 ; PR2642 108 define internal void @test13(<4 x float>*) { 109 ; CHECK-LABEL: @test13( 110 load <4 x float>* %0, align 1 111 fmul <4 x float> %2, < float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 > 112 store <4 x float> %3, <4 x float>* %0, align 1 113 ret void 114 ; CHECK-NEXT: ret void 115 } 116 117 define <16 x i8> @test14(<16 x i8> %a) { 118 ; CHECK-LABEL: @test14( 119 %b = mul <16 x i8> %a, zeroinitializer 120 ret <16 x i8> %b 121 ; CHECK-NEXT: ret <16 x i8> zeroinitializer 122 } 123 124 ; rdar://7293527 125 define i32 @test15(i32 %A, i32 %B) { 126 ; CHECK-LABEL: @test15( 127 entry: 128 %shl = shl i32 1, %B 129 %m = mul i32 %shl, %A 130 ret i32 %m 131 ; CHECK: shl i32 %A, %B 132 } 133 134 ; X * Y (when Y is 0 or 1) --> x & (0-Y) 135 define i32 @test16(i32 %b, i1 %c) { 136 ; CHECK-LABEL: @test16( 137 %d = zext i1 %c to i32 ; <i32> [#uses=1] 138 ; e = b & (a >> 31) 139 %e = mul i32 %d, %b ; <i32> [#uses=1] 140 ret i32 %e 141 ; CHECK: [[TEST16:%.*]] = select i1 %c, i32 %b, i32 0 142 ; CHECK-NEXT: ret i32 [[TEST16]] 143 } 144 145 ; X * Y (when Y is 0 or 1) --> x & (0-Y) 146 define i32 @test17(i32 %a, i32 %b) { 147 ; CHECK-LABEL: @test17( 148 %a.lobit = lshr i32 %a, 31 149 %e = mul i32 %a.lobit, %b 150 ret i32 %e 151 ; CHECK: [[TEST17:%.*]] = ashr i32 %a, 31 152 ; CHECK-NEXT: %e = and i32 [[TEST17]], %b 153 ; CHECK-NEXT: ret i32 %e 154 } 155 156 define i32 @test18(i32 %A, i32 %B) { 157 ; CHECK-LABEL: @test18( 158 %C = and i32 %A, 1 159 %D = and i32 %B, 1 160 161 %E = mul i32 %C, %D 162 %F = and i32 %E, 16 163 ret i32 %F 164 ; CHECK-NEXT: ret i32 0 165 } 166 167 declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32) 168 declare void @use(i1) 169 170 define i32 @test19(i32 %A, i32 %B) { 171 ; CHECK-LABEL: @test19( 172 %C = and i32 %A, 1 173 %D = and i32 %B, 1 174 175 ; It would be nice if we also started proving that this doesn't overflow. 176 %E = call {i32, i1} @llvm.smul.with.overflow.i32(i32 %C, i32 %D) 177 %F = extractvalue {i32, i1} %E, 0 178 %G = extractvalue {i32, i1} %E, 1 179 call void @use(i1 %G) 180 %H = and i32 %F, 16 181 ret i32 %H 182 ; CHECK: ret i32 0 183 } 184 185 define <2 x i64> @test20(<2 x i64> %A) { 186 ; CHECK-LABEL: @test20( 187 %B = add <2 x i64> %A, <i64 12, i64 14> 188 %C = mul <2 x i64> %B, <i64 3, i64 2> 189 ret <2 x i64> %C 190 ; CHECK: mul <2 x i64> %A, <i64 3, i64 2> 191 ; CHECK: add <2 x i64> %{{.}}, <i64 36, i64 28> 192 } 193 194 define <2 x i1> @test21(<2 x i1> %A, <2 x i1> %B) { 195 ; CHECK-LABEL: @test21( 196 %C = mul <2 x i1> %A, %B 197 ret <2 x i1> %C 198 ; CHECK: %C = and <2 x i1> %A, %B 199 } 200
