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      1 //===- AMDIL.td - AMDIL Target Machine -------------*- tablegen -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 // Target-independent interfaces which we are implementing
     10 //===----------------------------------------------------------------------===//
     11 
     12 include "llvm/Target/Target.td"
     13 
     14 // Dummy Instruction itineraries for pseudo instructions
     15 def ALU_NULL : FuncUnit;
     16 def NullALU : InstrItinClass;
     17 
     18 //===----------------------------------------------------------------------===//
     19 // AMDIL Subtarget features.
     20 //===----------------------------------------------------------------------===//
     21 def FeatureFP64     : SubtargetFeature<"fp64",
     22         "CapsOverride[AMDGPUDeviceInfo::DoubleOps]",
     23         "true",
     24         "Enable 64bit double precision operations">;
     25 def FeatureByteAddress    : SubtargetFeature<"byte_addressable_store",
     26         "CapsOverride[AMDGPUDeviceInfo::ByteStores]",
     27         "true",
     28         "Enable byte addressable stores">;
     29 def FeatureBarrierDetect : SubtargetFeature<"barrier_detect",
     30         "CapsOverride[AMDGPUDeviceInfo::BarrierDetect]",
     31         "true",
     32         "Enable duplicate barrier detection(HD5XXX or later).">;
     33 def FeatureImages : SubtargetFeature<"images",
     34         "CapsOverride[AMDGPUDeviceInfo::Images]",
     35         "true",
     36         "Enable image functions">;
     37 def FeatureMultiUAV : SubtargetFeature<"multi_uav",
     38         "CapsOverride[AMDGPUDeviceInfo::MultiUAV]",
     39         "true",
     40         "Generate multiple UAV code(HD5XXX family or later)">;
     41 def FeatureMacroDB : SubtargetFeature<"macrodb",
     42         "CapsOverride[AMDGPUDeviceInfo::MacroDB]",
     43         "true",
     44         "Use internal macrodb, instead of macrodb in driver">;
     45 def FeatureNoAlias : SubtargetFeature<"noalias",
     46         "CapsOverride[AMDGPUDeviceInfo::NoAlias]",
     47         "true",
     48         "assert that all kernel argument pointers are not aliased">;
     49 def FeatureNoInline : SubtargetFeature<"no-inline",
     50         "CapsOverride[AMDGPUDeviceInfo::NoInline]",
     51         "true",
     52         "specify whether to not inline functions">;
     53 
     54 def Feature64BitPtr : SubtargetFeature<"64BitPtr",
     55         "mIs64bit",
     56         "false",
     57         "Specify if 64bit addressing should be used.">;
     58 
     59 def Feature32on64BitPtr : SubtargetFeature<"64on32BitPtr",
     60         "mIs32on64bit",
     61         "false",
     62         "Specify if 64bit sized pointers with 32bit addressing should be used.">;
     63 def FeatureDebug : SubtargetFeature<"debug",
     64         "CapsOverride[AMDGPUDeviceInfo::Debug]",
     65         "true",
     66         "Debug mode is enabled, so disable hardware accelerated address spaces.">;
     67 def FeatureDumpCode : SubtargetFeature <"DumpCode",
     68         "mDumpCode",
     69         "true",
     70         "Dump MachineInstrs in the CodeEmitter">;
     71 
     72 
     73 //===----------------------------------------------------------------------===//
     74 // Register File, Calling Conv, Instruction Descriptions
     75 //===----------------------------------------------------------------------===//
     76 
     77 
     78 include "AMDILRegisterInfo.td"
     79 include "AMDILInstrInfo.td"
     80 
     81