Lines Matching refs:r_src
29 LIR* X86Mir2Lir::OpFpRegCopy(RegStorage r_dest, RegStorage r_src) {
32 DCHECK(r_dest.IsFloat() || r_src.IsFloat());
33 DCHECK_EQ(r_dest.IsDouble(), r_src.IsDouble());
38 if (r_src.IsSingle()) {
44 DCHECK(r_src.IsSingle()) << "Raw: 0x" << std::hex << r_src.GetRawBits();
49 LIR* res = RawLIR(current_dalvik_offset_, opcode, r_dest.GetReg(), r_src.GetReg());
50 if (r_dest == r_src) {
303 LIR* X86Mir2Lir::OpMovMemReg(RegStorage r_base, int offset, RegStorage r_src, MoveType move_type) {
305 int src = r_src.IsPair() ? r_src.GetLowReg() : r_src.GetReg();
310 CHECK(!r_src.IsFloat());
314 CHECK(!r_src.IsFloat());
318 CHECK(!r_src.IsFloat());
322 CHECK(r_src.IsFloat());
326 CHECK(r_src.IsFloat());
330 CHECK(r_src.IsFloat());
334 CHECK(r_src.IsFloat());
338 CHECK(r_src.IsFloat());
342 CHECK(r_src.IsFloat());
356 LIR* X86Mir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) {
359 DCHECK_EQ(r_dest.Is64Bit(), r_src.Is64Bit());
361 r_src.GetReg(), X86ConditionEncoding(cc));
497 LIR* X86Mir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src, int value) {
500 return NewLIR3(opcode, r_dest.GetReg(), r_src.GetReg(), value);
502 if (value == 0xFF && r_src.Low4()) {
503 return NewLIR2(kX86Movzx8RR, r_dest.GetReg(), r_src.GetReg());
505 return NewLIR2(kX86Movzx16RR, r_dest.GetReg(), r_src.GetReg());
508 if (r_dest != r_src) {
512 r_src.GetReg() /* index */, value /* scale */, 0 /* disp */);
515 r_src.GetReg() /* base */, rs_rX86_SP.GetReg()/*r4sib_no_index*/ /* index */,
518 OpRegCopy(r_dest, r_src);
782 int displacement, RegStorage r_src, OpSize size) {
786 bool pair = r_src.IsPair();
792 if (r_src.IsFloat()) {
806 CHECK_EQ(r_src.IsFloat(), false);
813 if (r_src.IsFloat()) {
815 DCHECK(r_src.IsSingle());
834 store = NewLIR3(opcode, r_base.GetReg(), displacement + LOWORD_OFFSET, r_src.GetReg());
836 DCHECK(!r_src.IsFloat()); // Make sure we're not still using a pair here.
837 store = NewLIR3(opcode, r_base.GetReg(), displacement + LOWORD_OFFSET, r_src.GetLowReg());
838 store2 = NewLIR3(opcode, r_base.GetReg(), displacement + HIWORD_OFFSET, r_src.GetHighReg());
852 displacement + LOWORD_OFFSET, r_src.GetReg());
854 DCHECK(!r_src.IsFloat()); // Make sure we're not still using a pair here.
856 displacement + LOWORD_OFFSET, r_src.GetLowReg());
858 displacement + HIWORD_OFFSET, r_src.GetHighReg());
865 LIR* X86Mir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStorage r_src,
867 return StoreBaseIndexedDisp(r_base, r_index, scale, 0, r_src, size);
870 LIR* X86Mir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src, OpSize size,
879 LIR* store = StoreBaseIndexedDisp(r_base, RegStorage::InvalidReg(), 0, displacement, r_src, size);
