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    Searched refs:CodeGenProcModel (Results 1 - 3 of 3) sorted by null

  /external/llvm/utils/TableGen/
CodeGenSchedule.h 174 struct CodeGenProcModel {
199 CodeGenProcModel(unsigned Idx, const std::string &Name, Record *MDef,
227 std::vector<CodeGenProcModel> ProcModels;
229 // Map Processor's MachineModel or ProcItin to a CodeGenProcModel index.
284 const CodeGenProcModel &getModelForProc(Record *ProcDef) const {
291 CodeGenProcModel &getProcModel(Record *ModelDef) {
296 const CodeGenProcModel &getProcModel(Record *ModelDef) const {
301 typedef std::vector<CodeGenProcModel>::const_iterator ProcIter;
364 const CodeGenProcModel &ProcModel) const;
376 const CodeGenProcModel &PM) const
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CodeGenSchedule.cpp 100 // Instantiate a CodeGenProcModel for each SchedMachineModel with the values
103 // CodeGenProcModel instances.
122 // CodeGenProcModel::ItinDefList. (Cycle-to-cycle itineraries). This requires
133 // Populate each CodeGenProcModel's WriteResDefs, ReadAdvanceDefs, and
149 ProcModels.push_back(CodeGenProcModel(0, "NoSchedModel",
169 CodeGenProcModel(ProcModels.size(), Name, ModelKey, ItinsDef));
176 CodeGenProcModel(ProcModels.size(), Name,
427 const CodeGenProcModel &ProcModel) const {
570 const CodeGenProcModel &ProcModel =
584 for (std::vector<CodeGenProcModel>::iterator PI = ProcModels.begin()
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SubtargetEmitter.cpp 84 void EmitProcessorResources(const CodeGenProcModel &ProcModel,
87 const CodeGenProcModel &ProcModel);
89 const CodeGenProcModel &ProcModel);
91 const CodeGenProcModel &ProcModel);
92 void GenSchedClassTables(const CodeGenProcModel &ProcModel,
442 const CodeGenProcModel &ProcModel = *PI;
622 void SubtargetEmitter::EmitProcessorResources(const CodeGenProcModel &ProcModel,
672 const CodeGenSchedRW &SchedWrite, const CodeGenProcModel &ProcModel) {
727 const CodeGenProcModel &ProcModel) {
782 const CodeGenProcModel &PM)
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