1 //===-- llvm/Target/TargetCallingConv.h - Calling Convention ----*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines types for working with calling-convention information. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_TARGET_TARGETCALLINGCONV_H 15 #define LLVM_TARGET_TARGETCALLINGCONV_H 16 17 #include "llvm/CodeGen/ValueTypes.h" 18 #include "llvm/Support/DataTypes.h" 19 #include "llvm/Support/MathExtras.h" 20 #include <string> 21 22 namespace llvm { 23 24 namespace ISD { 25 struct ArgFlagsTy { 26 private: 27 static const uint64_t NoFlagSet = 0ULL; 28 static const uint64_t ZExt = 1ULL<<0; ///< Zero extended 29 static const uint64_t ZExtOffs = 0; 30 static const uint64_t SExt = 1ULL<<1; ///< Sign extended 31 static const uint64_t SExtOffs = 1; 32 static const uint64_t InReg = 1ULL<<2; ///< Passed in register 33 static const uint64_t InRegOffs = 2; 34 static const uint64_t SRet = 1ULL<<3; ///< Hidden struct-ret ptr 35 static const uint64_t SRetOffs = 3; 36 static const uint64_t ByVal = 1ULL<<4; ///< Struct passed by value 37 static const uint64_t ByValOffs = 4; 38 static const uint64_t Nest = 1ULL<<5; ///< Nested fn static chain 39 static const uint64_t NestOffs = 5; 40 static const uint64_t Returned = 1ULL<<6; ///< Always returned 41 static const uint64_t ReturnedOffs = 6; 42 static const uint64_t ByValAlign = 0xFULL<<7; ///< Struct alignment 43 static const uint64_t ByValAlignOffs = 7; 44 static const uint64_t Split = 1ULL<<11; 45 static const uint64_t SplitOffs = 11; 46 static const uint64_t InAlloca = 1ULL<<12; ///< Passed with inalloca 47 static const uint64_t InAllocaOffs = 12; 48 static const uint64_t OrigAlign = 0x1FULL<<27; 49 static const uint64_t OrigAlignOffs = 27; 50 static const uint64_t ByValSize = 0x3fffffffULL<<32; ///< Struct size 51 static const uint64_t ByValSizeOffs = 32; 52 static const uint64_t InConsecutiveRegsLast = 0x1ULL<<62; ///< Struct size 53 static const uint64_t InConsecutiveRegsLastOffs = 62; 54 static const uint64_t InConsecutiveRegs = 0x1ULL<<63; ///< Struct size 55 static const uint64_t InConsecutiveRegsOffs = 63; 56 57 static const uint64_t One = 1ULL; ///< 1 of this type, for shifts 58 59 uint64_t Flags; 60 public: 61 ArgFlagsTy() : Flags(0) { } 62 63 bool isZExt() const { return Flags & ZExt; } 64 void setZExt() { Flags |= One << ZExtOffs; } 65 66 bool isSExt() const { return Flags & SExt; } 67 void setSExt() { Flags |= One << SExtOffs; } 68 69 bool isInReg() const { return Flags & InReg; } 70 void setInReg() { Flags |= One << InRegOffs; } 71 72 bool isSRet() const { return Flags & SRet; } 73 void setSRet() { Flags |= One << SRetOffs; } 74 75 bool isByVal() const { return Flags & ByVal; } 76 void setByVal() { Flags |= One << ByValOffs; } 77 78 bool isInAlloca() const { return Flags & InAlloca; } 79 void setInAlloca() { Flags |= One << InAllocaOffs; } 80 81 bool isNest() const { return Flags & Nest; } 82 void setNest() { Flags |= One << NestOffs; } 83 84 bool isReturned() const { return Flags & Returned; } 85 void setReturned() { Flags |= One << ReturnedOffs; } 86 87 bool isInConsecutiveRegs() const { return Flags & InConsecutiveRegs; } 88 void setInConsecutiveRegs() { Flags |= One << InConsecutiveRegsOffs; } 89 90 bool isInConsecutiveRegsLast() const { return Flags & InConsecutiveRegsLast; } 91 void setInConsecutiveRegsLast() { Flags |= One << InConsecutiveRegsLastOffs; } 92 93 unsigned getByValAlign() const { 94 return (unsigned) 95 ((One << ((Flags & ByValAlign) >> ByValAlignOffs)) / 2); 96 } 97 void setByValAlign(unsigned A) { 98 Flags = (Flags & ~ByValAlign) | 99 (uint64_t(Log2_32(A) + 1) << ByValAlignOffs); 100 } 101 102 bool isSplit() const { return Flags & Split; } 103 void setSplit() { Flags |= One << SplitOffs; } 104 105 unsigned getOrigAlign() const { 106 return (unsigned) 107 ((One << ((Flags & OrigAlign) >> OrigAlignOffs)) / 2); 108 } 109 void setOrigAlign(unsigned A) { 110 Flags = (Flags & ~OrigAlign) | 111 (uint64_t(Log2_32(A) + 1) << OrigAlignOffs); 112 } 113 114 unsigned getByValSize() const { 115 return (unsigned)((Flags & ByValSize) >> ByValSizeOffs); 116 } 117 void setByValSize(unsigned S) { 118 Flags = (Flags & ~ByValSize) | (uint64_t(S) << ByValSizeOffs); 119 } 120 121 /// getRawBits - Represent the flags as a bunch of bits. 122 uint64_t getRawBits() const { return Flags; } 123 }; 124 125 /// InputArg - This struct carries flags and type information about a 126 /// single incoming (formal) argument or incoming (from the perspective 127 /// of the caller) return value virtual register. 128 /// 129 struct InputArg { 130 ArgFlagsTy Flags; 131 MVT VT; 132 EVT ArgVT; 133 bool Used; 134 135 /// Index original Function's argument. 136 unsigned OrigArgIndex; 137 138 /// Offset in bytes of current input value relative to the beginning of 139 /// original argument. E.g. if argument was splitted into four 32 bit 140 /// registers, we got 4 InputArgs with PartOffsets 0, 4, 8 and 12. 141 unsigned PartOffset; 142 143 InputArg() : VT(MVT::Other), Used(false) {} 144 InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used, 145 unsigned origIdx, unsigned partOffs) 146 : Flags(flags), Used(used), OrigArgIndex(origIdx), PartOffset(partOffs) { 147 VT = vt.getSimpleVT(); 148 ArgVT = argvt; 149 } 150 }; 151 152 /// OutputArg - This struct carries flags and a value for a 153 /// single outgoing (actual) argument or outgoing (from the perspective 154 /// of the caller) return value virtual register. 155 /// 156 struct OutputArg { 157 ArgFlagsTy Flags; 158 MVT VT; 159 EVT ArgVT; 160 161 /// IsFixed - Is this a "fixed" value, ie not passed through a vararg "...". 162 bool IsFixed; 163 164 /// Index original Function's argument. 165 unsigned OrigArgIndex; 166 167 /// Offset in bytes of current output value relative to the beginning of 168 /// original argument. E.g. if argument was splitted into four 32 bit 169 /// registers, we got 4 OutputArgs with PartOffsets 0, 4, 8 and 12. 170 unsigned PartOffset; 171 172 OutputArg() : IsFixed(false) {} 173 OutputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool isfixed, 174 unsigned origIdx, unsigned partOffs) 175 : Flags(flags), IsFixed(isfixed), OrigArgIndex(origIdx), 176 PartOffset(partOffs) { 177 VT = vt.getSimpleVT(); 178 ArgVT = argvt; 179 } 180 }; 181 } 182 183 } // end llvm namespace 184 185 #endif 186