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    Searched refs:ItinDefList (Results 1 - 3 of 3) sorted by null

  /external/llvm/utils/TableGen/
CodeGenSchedule.h 173 // ItinDefList orders this processor's InstrItinData records by SchedClass idx.
185 RecVec ItinDefList;
CodeGenSchedule.cpp 122 // CodeGenProcModel::ItinDefList. (Cycle-to-cycle itineraries). This requires
793 // Populate ItinDefList with Itinerary records.
794 ProcModel.ItinDefList.resize(NumInstrSchedClasses);
797 // the processor model's ItinDefList.
806 ProcModel.ItinDefList[SCI->Index] = ItinData;
816 assert(!ProcModel.ItinDefList[0] && "NoItinerary class can't have rec");
818 for (unsigned i = 1, N = ProcModel.ItinDefList.size(); i < N; ++i) {
819 if (!ProcModel.ItinDefList[i])
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SubtargetEmitter.cpp 456 assert(ProcModel.ItinDefList.size() == ItinList.size() && "bad Itins");
462 Record *ItinData = ProcModel.ItinDefList[SchedClassIdx];
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