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    Searched refs:RegUnits (Results 1 - 8 of 8) sorted by null

  /external/llvm/lib/CodeGen/
InterferenceCache.cpp 89 RegUnits[i].VirtTag = LIUArray[*Units].getTag();
104 RegUnits.clear();
106 RegUnits.push_back(LIUArray[*Units]);
107 RegUnits.back().Fixed = &LIS->getRegUnit(*Units);
113 unsigned i = 0, e = RegUnits.size();
117 if (LIUArray[*Units].changedSince(RegUnits[i].VirtTag))
130 for (unsigned i = 0, e = RegUnits.size(); i != e; ++i) {
131 RegUnitInfo &RUI = RegUnits[i];
136 for (unsigned i = 0, e = RegUnits.size(); i != e; ++i) {
137 RegUnitInfo &RUI = RegUnits[i]
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RegisterPressure.cpp 83 void RegPressureTracker::increaseRegPressure(ArrayRef<unsigned> RegUnits) {
84 for (unsigned i = 0, e = RegUnits.size(); i != e; ++i) {
85 PSetIterator PSetI = MRI->getPressureSets(RegUnits[i]);
97 void RegPressureTracker::decreaseRegPressure(ArrayRef<unsigned> RegUnits) {
98 for (unsigned I = 0, E = RegUnits.size(); I != E; ++I)
99 decreaseSetPressure(CurrSetPressure, MRI->getPressureSets(RegUnits[I]));
304 static bool containsReg(ArrayRef<unsigned> RegUnits, unsigned RegUnit) {
305 return std::find(RegUnits.begin(), RegUnits.end(), RegUnit) != RegUnits.end()
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MachineTraceMetrics.cpp 700 SparseSet<LiveRegUnit> &RegUnits,
711 // Track live defs and kills for updating RegUnits.
723 SparseSet<LiveRegUnit>::iterator I = RegUnits.find(*Units);
724 if (I == RegUnits.end())
731 // Update RegUnits to reflect live registers after UseMI.
735 RegUnits.erase(*Units);
742 LiveRegUnit &LRU = RegUnits[*Units];
801 SparseSet<LiveRegUnit> RegUnits;
802 RegUnits.setUniverse(MTM.TRI->getNumRegUnits());
836 updatePhysDepsDownwards(&UseMI, Deps, RegUnits, MTM.TRI)
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InterferenceCache.h 87 /// more than 4 RegUnits.
88 SmallVector<RegUnitInfo, 4> RegUnits;
  /external/llvm/utils/TableGen/
CodeGenRegisters.h 190 const RegUnitList &getRegUnits() const { return RegUnits; }
194 return makeArrayRef(RegUnits).slice(0, NumNativeRegUnits);
198 // Return true if the RegUnits changed.
203 void adoptRegUnit(unsigned RUID) { RegUnits.push_back(RUID); }
238 RegUnitList RegUnits;
366 void buildRegUnitSet(std::vector<unsigned> &RegUnits) const;
468 SmallVector<RegUnit, 8> RegUnits;
579 RegUnits.resize(RegUnits.size() + 1);
580 RegUnits.back().Roots[0] = R0
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CodeGenRegisters.cpp 204 // Return true of this unit appears in RegUnits.
205 static bool hasRegUnit(CodeGenRegister::RegUnitList &RegUnits, unsigned Unit) {
206 return std::count(RegUnits.begin(), RegUnits.end(), Unit);
210 // Return true if the RegUnits changed.
212 unsigned OldNumUnits = RegUnits.size();
216 // Merge the subregister's units into this register's RegUnits.
217 mergeRegUnits(RegUnits, SR->RegUnits);
219 return OldNumUnits != RegUnits.size()
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RegisterInfoEmitter.cpp 175 std::vector<unsigned> RegUnits;
176 RC.buildRegUnitSet(RegUnits);
178 << ", " << RegBank.getRegUnitSetWeight(RegUnits);
238 const RegUnitSet &RegUnits = RegBank.getRegSetAt(i);
239 OS << " " << RegUnits.Weight << ", \t// " << i << ": "
240 << RegUnits.Name << "\n";
837 assert(!Roots.empty() && "All regunits must have a root register.");
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  /external/llvm/include/llvm/MC/
MCRegisterInfo.h 118 // RegUnits - Points to the list of register units. The low 4 bits holds the
120 uint32_t RegUnits;
161 unsigned NumRegUnits; // Number of regunits.
495 assert(Reg && "Null register has no regunits");
496 // Decode the RegUnits MCRegisterDesc field.
497 unsigned RU = MCRI->get(Reg).RegUnits;

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