1 /****************************************************************************** 2 * 3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 /** 19 ******************************************************************************* 20 * @file 21 * ihevcd_process_slice.c 22 * 23 * @brief 24 * Contains functions for processing slice data 25 * 26 * @author 27 * Harish 28 * 29 * @par List of Functions: 30 * 31 * @remarks 32 * None 33 * 34 ******************************************************************************* 35 */ 36 /*****************************************************************************/ 37 /* File Includes */ 38 /*****************************************************************************/ 39 #include <stdio.h> 40 #include <stddef.h> 41 #include <stdlib.h> 42 #include <string.h> 43 #include <assert.h> 44 45 #include "ihevc_typedefs.h" 46 #include "iv.h" 47 #include "ivd.h" 48 #include "ihevcd_cxa.h" 49 #include "ithread.h" 50 51 #include "ihevc_defs.h" 52 #include "ihevc_debug.h" 53 #include "ihevc_defs.h" 54 #include "ihevc_structs.h" 55 #include "ihevc_macros.h" 56 #include "ihevc_platform_macros.h" 57 #include "ihevc_cabac_tables.h" 58 #include "ihevc_padding.h" 59 #include "ihevc_iquant_itrans_recon.h" 60 #include "ihevc_chroma_iquant_itrans_recon.h" 61 #include "ihevc_recon.h" 62 #include "ihevc_chroma_recon.h" 63 #include "ihevc_iquant_recon.h" 64 #include "ihevc_chroma_iquant_recon.h" 65 #include "ihevc_intra_pred.h" 66 67 #include "ihevc_error.h" 68 #include "ihevc_common_tables.h" 69 #include "ihevc_quant_tables.h" 70 #include "ihevcd_common_tables.h" 71 72 #include "ihevcd_profile.h" 73 #include "ihevcd_trace.h" 74 #include "ihevcd_defs.h" 75 #include "ihevcd_function_selector.h" 76 #include "ihevcd_structs.h" 77 #include "ihevcd_error.h" 78 #include "ihevcd_nal.h" 79 #include "ihevcd_bitstream.h" 80 #include "ihevcd_job_queue.h" 81 #include "ihevcd_utils.h" 82 #include "ihevcd_debug.h" 83 #include "ihevcd_get_mv.h" 84 #include "ihevcd_inter_pred.h" 85 #include "ihevcd_iquant_itrans_recon_ctb.h" 86 #include "ihevcd_boundary_strength.h" 87 #include "ihevcd_deblk.h" 88 #include "ihevcd_fmt_conv.h" 89 #include "ihevcd_sao.h" 90 #include "ihevcd_profile.h" 91 92 IHEVCD_ERROR_T ihevcd_fmt_conv(codec_t *ps_codec, 93 process_ctxt_t *ps_proc, 94 UWORD8 *pu1_y_dst, 95 UWORD8 *pu1_u_dst, 96 UWORD8 *pu1_v_dst, 97 WORD32 cur_row, 98 WORD32 num_rows); 99 100 typedef enum 101 { 102 PROC_ALL, 103 PROC_INTER_PRED, 104 PROC_RECON, 105 PROC_DEBLK, 106 PROC_SAO 107 }proc_type_t; 108 109 void ihevcd_proc_map_check(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb) 110 { 111 tile_t *ps_tile = ps_proc->ps_tile; 112 sps_t *ps_sps = ps_proc->ps_sps; 113 pps_t *ps_pps = ps_proc->ps_pps; 114 codec_t *ps_codec = ps_proc->ps_codec; 115 WORD32 idx; 116 WORD32 nop_cnt; 117 WORD32 bit_pos = proc_type; 118 WORD32 bit_mask = (1 << bit_pos); 119 120 if(ps_proc->i4_check_proc_status) 121 { 122 nop_cnt = PROC_NOP_CNT; 123 while(1) 124 { 125 volatile UWORD8 *pu1_buf; 126 volatile WORD32 status; 127 status = 1; 128 /* Check if all dependencies for the next nCTBs are met */ 129 { 130 WORD32 x_pos; 131 132 { 133 /* Check if the top right of next nCTBs are processed */ 134 if(ps_proc->i4_ctb_y > 0) 135 { 136 x_pos = (ps_proc->i4_ctb_tile_x + nctb); 137 idx = MIN(x_pos, (ps_tile->u2_wd - 1)); 138 139 /* Check if top-right CTB for the last CTB in nCTB is within the tile */ 140 { 141 idx += ps_tile->u1_pos_x; 142 idx += ((ps_proc->i4_ctb_y - 1) 143 * ps_sps->i2_pic_wd_in_ctb); 144 pu1_buf = (ps_codec->pu1_proc_map + idx); 145 status = *pu1_buf & bit_mask; 146 } 147 } 148 } 149 150 /* If tiles are enabled, then test left and top-left as well */ 151 ps_pps = ps_proc->ps_pps; 152 if(ps_pps->i1_tiles_enabled_flag) 153 { 154 /*Check if left ctb is processed*/ 155 if((ps_proc->i4_ctb_x > 0) && ((0 != status))) 156 { 157 x_pos = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1; 158 idx = x_pos + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb); 159 pu1_buf = (ps_codec->pu1_proc_map + idx); 160 status = *pu1_buf & bit_mask; 161 } 162 163 /*Check if top left ctb is processed*/ 164 if((ps_proc->i4_ctb_x > 0) && (0 != status) && (ps_proc->i4_ctb_y > 0)) 165 { 166 x_pos = ps_tile->u1_pos_x + ps_proc->i4_ctb_tile_x - 1; 167 idx = x_pos + ((ps_proc->i4_ctb_y - 1) * ps_sps->i2_pic_wd_in_ctb); 168 pu1_buf = (ps_codec->pu1_proc_map + idx); 169 status = *pu1_buf & bit_mask; 170 } 171 } 172 } 173 174 if(status) 175 break; 176 177 /* if dependencies are not met, then wait for few cycles. 178 * Even after few iterations, if the dependencies are not met then yield 179 */ 180 if(nop_cnt > 0) 181 { 182 NOP(128); 183 nop_cnt -= 128; 184 } 185 else 186 { 187 nop_cnt = PROC_NOP_CNT; 188 ithread_yield(); 189 //NOP(128 * 16); 190 } 191 } 192 } 193 } 194 195 void ihevcd_proc_map_update(process_ctxt_t *ps_proc, proc_type_t proc_type, WORD32 nctb) 196 { 197 codec_t *ps_codec = ps_proc->ps_codec; 198 WORD32 i, idx; 199 WORD32 bit_pos = proc_type; 200 WORD32 bit_mask = (1 << bit_pos); 201 202 /* Update the current CTBs processing status */ 203 if(ps_proc->i4_check_proc_status) 204 { 205 for(i = 0; i < nctb; i++) 206 { 207 sps_t *ps_sps = ps_proc->ps_sps; 208 UWORD8 *pu1_buf; 209 idx = (ps_proc->i4_ctb_x + i); 210 idx += ((ps_proc->i4_ctb_y) * ps_sps->i2_pic_wd_in_ctb); 211 pu1_buf = (ps_codec->pu1_proc_map + idx); 212 *pu1_buf = *pu1_buf | bit_mask; 213 } 214 } 215 } 216 217 218 void ihevcd_slice_hdr_update(process_ctxt_t *ps_proc) 219 { 220 221 /* Slice x and y are initialized in proc_init. But initialize slice x and y count here 222 * if a new slice begins at the middle of a row since proc_init is invoked only at the beginning of each row */ 223 if(!((ps_proc->i4_ctb_x == 0) && (ps_proc->i4_ctb_y == 0))) 224 { 225 slice_header_t *ps_slice_hdr_next = ps_proc->ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx + 1) & (MAX_SLICE_HDR_CNT - 1)); 226 227 if((ps_slice_hdr_next->i2_ctb_x == ps_proc->i4_ctb_x) 228 && (ps_slice_hdr_next->i2_ctb_y == ps_proc->i4_ctb_y)) 229 { 230 if(0 == ps_slice_hdr_next->i1_dependent_slice_flag) 231 { 232 ps_proc->i4_ctb_slice_x = 0; 233 ps_proc->i4_ctb_slice_y = 0; 234 } 235 236 ps_proc->i4_cur_slice_idx++; 237 ps_proc->ps_slice_hdr = ps_slice_hdr_next; 238 } 239 240 } 241 } 242 243 void ihevcd_ctb_pos_update(process_ctxt_t *ps_proc, WORD32 nctb) 244 { 245 WORD32 tile_start_ctb_idx, slice_start_ctb_idx; 246 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr; 247 tile_t *ps_tile = ps_proc->ps_tile; 248 sps_t *ps_sps = ps_proc->ps_sps; 249 250 /* Update x and y positions */ 251 ps_proc->i4_ctb_tile_x += nctb; 252 ps_proc->i4_ctb_x += nctb; 253 254 ps_proc->i4_ctb_slice_x += nctb; 255 /*If tile are enabled, then handle the tile & slice counters differently*/ 256 if(ps_proc->ps_pps->i1_tiles_enabled_flag) 257 { 258 /* Update slice counters*/ 259 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb); 260 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 261 /* 262 * There can be 2 cases where slice counters must be handled differently. 263 * 1 - Multiple tiles span across a single/one of the many slice. 264 * 2 - Multiple slices span across a single/one of the many tiles. 265 */ 266 267 /*Case 1 */ 268 if(slice_start_ctb_idx < tile_start_ctb_idx) 269 { 270 /*End of tile row*/ 271 if(ps_proc->i4_ctb_x > ps_slice_hdr->i2_ctb_x) 272 { 273 if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd + ps_tile->u1_pos_x)) 274 { 275 ps_proc->i4_ctb_slice_y++; 276 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x 277 - ps_tile->u2_wd; 278 } 279 } 280 else 281 { 282 WORD32 temp_stride = (ps_sps->i2_pic_wd_in_ctb - ps_slice_hdr->i2_ctb_x); 283 if(ps_proc->i4_ctb_slice_x >= (temp_stride + ps_tile->u2_wd + ps_tile->u1_pos_x)) 284 { 285 ps_proc->i4_ctb_slice_y++; 286 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x 287 - ps_tile->u2_wd; 288 } 289 } 290 } 291 /*Case 2*/ 292 else if(ps_proc->i4_ctb_slice_x >= (ps_tile->u2_wd)) 293 { 294 /*End of tile row*/ 295 ps_proc->i4_ctb_slice_y++; 296 ps_proc->i4_ctb_slice_x = 0; 297 } 298 } 299 else 300 { 301 if(ps_proc->i4_ctb_slice_x >= ps_tile->u2_wd) 302 { 303 ps_proc->i4_ctb_slice_y++; 304 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_slice_x 305 - ps_tile->u2_wd; 306 } 307 } 308 } 309 310 void ihevcd_ctb_avail_update(process_ctxt_t *ps_proc) 311 { 312 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr; 313 sps_t *ps_sps = ps_proc->ps_sps; 314 tile_t *ps_tile_prev; 315 tile_t *ps_tile = ps_proc->ps_tile; 316 WORD32 cur_pu_idx; 317 WORD32 tile_start_ctb_idx, slice_start_ctb_idx; 318 WORD16 i2_wd_in_ctb; 319 WORD32 continuous_tiles = 0; 320 WORD32 cur_ctb_idx; 321 WORD32 check_tile_wd; 322 323 if((0 != ps_tile->u1_pos_x) && (0 != ps_tile->u1_pos_y)) 324 { 325 ps_tile_prev = ps_tile - 1; 326 } 327 else 328 { 329 ps_tile_prev = ps_tile; 330 } 331 332 333 check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd; 334 if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x)) 335 || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x)))) 336 { 337 continuous_tiles = 1; 338 } 339 340 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb); 341 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 342 343 if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles)) 344 { 345 //Slices span across multiple tiles. 346 i2_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb; 347 } 348 else 349 { 350 i2_wd_in_ctb = ps_tile->u2_wd; 351 } 352 cur_ctb_idx = ps_proc->i4_ctb_x 353 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 354 355 /* Ctb level availability */ 356 /* Bottom left will not be available at a CTB level, no need to pass this */ 357 ps_proc->u1_top_ctb_avail = 1; 358 ps_proc->u1_left_ctb_avail = 1; 359 ps_proc->u1_top_lt_ctb_avail = 1; 360 ps_proc->u1_top_rt_ctb_avail = 1; 361 /* slice and tile boundaries */ 362 363 if((0 == ps_proc->i4_ctb_y) || (0 == ps_proc->i4_ctb_tile_y)) 364 { 365 ps_proc->u1_top_ctb_avail = 0; 366 ps_proc->u1_top_lt_ctb_avail = 0; 367 ps_proc->u1_top_rt_ctb_avail = 0; 368 } 369 370 if((0 == ps_proc->i4_ctb_x) || (0 == ps_proc->i4_ctb_tile_x)) 371 { 372 ps_proc->u1_left_ctb_avail = 0; 373 ps_proc->u1_top_lt_ctb_avail = 0; 374 if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y)) 375 { 376 ps_proc->u1_top_ctb_avail = 0; 377 if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x) 378 { 379 ps_proc->u1_top_rt_ctb_avail = 0; 380 } 381 } 382 } 383 /*For slices not beginning at start of a ctb row*/ 384 else if(ps_proc->i4_ctb_x > 0) 385 { 386 if((0 == ps_proc->i4_ctb_slice_y) || (0 == ps_proc->i4_ctb_tile_y)) 387 { 388 ps_proc->u1_top_ctb_avail = 0; 389 ps_proc->u1_top_lt_ctb_avail = 0; 390 if(0 == ps_proc->i4_ctb_slice_x) 391 { 392 ps_proc->u1_left_ctb_avail = 0; 393 } 394 if((i2_wd_in_ctb - 1) != ps_proc->i4_ctb_slice_x) 395 { 396 ps_proc->u1_top_rt_ctb_avail = 0; 397 } 398 } 399 else if((1 == ps_proc->i4_ctb_slice_y) && (0 == ps_proc->i4_ctb_slice_x)) 400 { 401 ps_proc->u1_top_lt_ctb_avail = 0; 402 } 403 } 404 405 if((ps_proc->i4_ctb_x == (ps_sps->i2_pic_wd_in_ctb - 1)) || ((ps_tile->u2_wd - 1) == ps_proc->i4_ctb_tile_x)) 406 { 407 ps_proc->u1_top_rt_ctb_avail = 0; 408 } 409 410 411 { 412 WORD32 next_ctb_idx; 413 next_ctb_idx = cur_ctb_idx + 1; 414 415 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1)) 416 { 417 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht) 418 { 419 //Last tile 420 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb)) 421 { 422 next_ctb_idx = cur_ctb_idx + 1; 423 } 424 else //Not last tile, but new tile 425 { 426 tile_t *ps_tile_next = ps_proc->ps_tile + 1; 427 next_ctb_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 428 } 429 } 430 else //End of each tile row 431 { 432 next_ctb_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x; 433 } 434 } 435 ps_proc->i4_next_pu_ctb_cnt = next_ctb_idx; 436 ps_proc->i4_ctb_pu_cnt = 437 ps_proc->pu4_pic_pu_idx[next_ctb_idx] 438 - ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 439 cur_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 440 ps_proc->i4_ctb_start_pu_idx = cur_pu_idx; 441 ps_proc->ps_pu = &ps_proc->ps_pic_pu[cur_pu_idx]; 442 } 443 } 444 445 void ihevcd_update_ctb_tu_cnt(process_ctxt_t *ps_proc) 446 { 447 sps_t *ps_sps = ps_proc->ps_sps; 448 codec_t *ps_codec = ps_proc->ps_codec; 449 WORD32 cur_ctb_idx; 450 451 cur_ctb_idx = ps_proc->i4_ctb_x 452 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 453 454 { 455 tile_t *ps_tile; 456 WORD32 next_ctb_tu_idx; 457 ps_tile = ps_proc->ps_tile; 458 459 460 if(1 == ps_codec->i4_num_cores) 461 { 462 next_ctb_tu_idx = cur_ctb_idx % RESET_TU_BUF_NCTB + 1; 463 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1)) 464 { 465 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht) 466 { 467 //Last tile 468 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb)) 469 { 470 next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1; 471 } 472 else //Not last tile, but new tile 473 { 474 tile_t *ps_tile_next = ps_proc->ps_tile + 1; 475 next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 476 } 477 } 478 else //End of each tile row 479 { 480 next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x; 481 } 482 } 483 ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx; 484 ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] - ps_proc->pu4_pic_tu_idx[cur_ctb_idx % RESET_TU_BUF_NCTB]; 485 } 486 else 487 { 488 next_ctb_tu_idx = cur_ctb_idx + 1; 489 if(ps_tile->u2_wd == (ps_proc->i4_ctb_tile_x + 1)) 490 { 491 if((ps_proc->i4_ctb_tile_y + 1) == ps_tile->u2_ht) 492 { 493 //Last tile 494 if(((ps_proc->i4_ctb_tile_y + 1 + ps_tile->u1_pos_y) == ps_sps->i2_pic_ht_in_ctb) && ((ps_proc->i4_ctb_tile_x + 1 + ps_tile->u1_pos_x) == ps_sps->i2_pic_wd_in_ctb)) 495 { 496 next_ctb_tu_idx = (cur_ctb_idx % RESET_TU_BUF_NCTB) + 1; 497 } 498 else //Not last tile, but new tile 499 { 500 tile_t *ps_tile_next = ps_proc->ps_tile + 1; 501 next_ctb_tu_idx = ps_tile_next->u1_pos_x + (ps_tile_next->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 502 } 503 } 504 else //End of each tile row 505 { 506 next_ctb_tu_idx = ((ps_tile->u1_pos_y + ps_proc->i4_ctb_tile_y + 1) * ps_sps->i2_pic_wd_in_ctb) + ps_tile->u1_pos_x; 507 } 508 } 509 ps_proc->i4_next_tu_ctb_cnt = next_ctb_tu_idx; 510 ps_proc->i4_ctb_tu_cnt = ps_proc->pu4_pic_tu_idx[next_ctb_tu_idx] - 511 ps_proc->pu4_pic_tu_idx[cur_ctb_idx]; 512 } 513 } 514 } 515 516 IHEVCD_ERROR_T ihevcd_process(process_ctxt_t *ps_proc) 517 { 518 IHEVCD_ERROR_T ret = (IHEVCD_ERROR_T)IHEVCD_SUCCESS; 519 codec_t *ps_codec; 520 sps_t *ps_sps = ps_proc->ps_sps; 521 522 WORD32 nctb; 523 WORD32 i; 524 WORD32 idx; 525 WORD32 nop_cnt; 526 WORD32 num_minpu_in_ctb; 527 WORD32 cur_slice_idx, cur_ctb_tile_x, cur_ctb_slice_x, cur_ctb_tile_y, cur_ctb_slice_y; 528 WORD32 nxt_ctb_slice_y, nxt_ctb_slice_x; 529 tu_t *ps_tu_cur, *ps_tu_nxt; 530 UWORD8 *pu1_pu_map_cur, *pu1_pu_map_nxt; 531 WORD32 num_ctb, num_ctb_tmp; 532 proc_type_t proc_type; 533 534 535 WORD32 ctb_size = 1 << ps_sps->i1_log2_ctb_size; 536 537 PROFILE_DISABLE_PROCESS_CTB(); 538 539 ps_codec = ps_proc->ps_codec; 540 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE); 541 542 nctb = MIN(ps_codec->i4_proc_nctb, ps_proc->i4_ctb_cnt); 543 nctb = MIN(nctb, (ps_proc->ps_tile->u2_wd - ps_proc->i4_ctb_tile_x)); 544 545 if(ps_proc->i4_cur_slice_idx > (MAX_SLICE_HDR_CNT - 2 * ps_sps->i2_pic_wd_in_ctb)) 546 { 547 num_ctb = 1; 548 } 549 else 550 { 551 num_ctb = ps_proc->i4_nctb; 552 } 553 nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y; 554 nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x; 555 pu1_pu_map_nxt = ps_proc->pu1_pu_map; 556 ps_tu_nxt = ps_proc->ps_tu; 557 558 while(ps_proc->i4_ctb_cnt) 559 { 560 ps_proc->i4_ctb_slice_y = nxt_ctb_slice_y; 561 ps_proc->i4_ctb_slice_x = nxt_ctb_slice_x; 562 ps_proc->pu1_pu_map = pu1_pu_map_nxt; 563 ps_proc->ps_tu = ps_tu_nxt; 564 565 cur_ctb_tile_x = ps_proc->i4_ctb_tile_x; 566 cur_ctb_tile_y = ps_proc->i4_ctb_tile_y; 567 cur_ctb_slice_x = ps_proc->i4_ctb_slice_x; 568 cur_ctb_slice_y = ps_proc->i4_ctb_slice_y; 569 cur_slice_idx = ps_proc->i4_cur_slice_idx; 570 ps_tu_cur = ps_proc->ps_tu; 571 pu1_pu_map_cur = ps_proc->pu1_pu_map; 572 proc_type = PROC_INTER_PRED; 573 574 if(ps_proc->i4_ctb_cnt < num_ctb) 575 { 576 num_ctb = ps_proc->i4_ctb_cnt; 577 } 578 num_ctb_tmp = num_ctb; 579 580 while(num_ctb_tmp) 581 { 582 slice_header_t *ps_slice_hdr; 583 tile_t *ps_tile = ps_proc->ps_tile; 584 585 /* Waiting for Parsing to be done*/ 586 { 587 588 589 nop_cnt = PROC_NOP_CNT; 590 if(ps_proc->i4_check_parse_status || ps_proc->i4_check_proc_status) 591 { 592 while(1) 593 { 594 volatile UWORD8 *pu1_buf; 595 volatile WORD32 status; 596 status = 1; 597 /* Check if all dependencies for the next nCTBs are met */ 598 /* Check if the next nCTBs are parsed */ 599 if(ps_proc->i4_check_parse_status) 600 { 601 idx = (ps_proc->i4_ctb_x + nctb - 1); 602 idx += (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb); 603 pu1_buf = (ps_codec->pu1_parse_map + idx); 604 status = *pu1_buf; 605 } 606 607 if(status) 608 break; 609 610 /* if dependencies are not met, then wait for few cycles. 611 * Even after few iterations, if the dependencies are not met then yield 612 */ 613 if(nop_cnt > 0) 614 { 615 NOP(128); 616 nop_cnt -= 128; 617 } 618 else 619 { 620 nop_cnt = PROC_NOP_CNT; 621 ithread_yield(); 622 } 623 } 624 } 625 } 626 627 /* Check proc map to ensure dependencies for recon are met */ 628 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 629 630 ihevcd_slice_hdr_update(ps_proc); 631 ps_slice_hdr = ps_proc->ps_slice_hdr; 632 633 //ihevcd_mv_prediction(); 634 //ihevcd_lvl_unpack(); 635 //ihevcd_inter_iq_it_recon(); 636 //Following does prediction, iq, it and recon on a TU by TU basis for intra TUs 637 //ihevcd_intra_process(); 638 //ihevcd_ctb_boundary_strength_islice(ps_proc, ctb_size); 639 //ihevcd_deblk_ctb(ps_proc); 640 641 /* iq,it recon of Intra TU */ 642 { 643 UWORD32 *pu4_ctb_top_pu_idx, *pu4_ctb_left_pu_idx, *pu4_ctb_top_left_pu_idx; 644 WORD32 cur_ctb_idx; 645 646 ihevcd_ctb_avail_update(ps_proc); 647 648 #if DEBUG_DUMP_FRAME_BUFFERS_INFO 649 au1_pic_avail_ctb_flags[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] = 650 ((ps_proc->u1_top_ctb_avail << 3) | (ps_proc->u1_left_ctb_avail << 2) | (ps_proc->u1_top_lt_ctb_avail << 1) | (ps_proc->u1_top_rt_ctb_avail)); 651 au4_pic_ctb_slice_xy[ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb] = 652 (((UWORD16)ps_proc->i4_ctb_slice_x << 16) | ((UWORD16)ps_proc->i4_ctb_slice_y << 16)); 653 #endif 654 655 /*************************************************/ 656 /**************** MV pred **********************/ 657 /*************************************************/ 658 if(PSLICE == ps_slice_hdr->i1_slice_type 659 || BSLICE == ps_slice_hdr->i1_slice_type) 660 { 661 mv_ctxt_t s_mv_ctxt; 662 663 pu4_ctb_top_pu_idx = ps_proc->pu4_pic_pu_idx_top 664 + (ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE); 665 pu4_ctb_left_pu_idx = ps_proc->pu4_pic_pu_idx_left; 666 pu4_ctb_top_left_pu_idx = &ps_proc->u4_ctb_top_left_pu_idx; 667 668 /* Initializing s_mv_ctxt */ 669 if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD) 670 { 671 s_mv_ctxt.ps_pps = ps_proc->ps_pps; 672 s_mv_ctxt.ps_sps = ps_proc->ps_sps; 673 s_mv_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 674 s_mv_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 675 s_mv_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 676 s_mv_ctxt.ps_pu = ps_proc->ps_pu; 677 s_mv_ctxt.ps_pic_pu = ps_proc->ps_pic_pu; 678 s_mv_ctxt.ps_tile = ps_tile; 679 s_mv_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map; 680 s_mv_ctxt.pu4_pic_pu_idx = ps_proc->pu4_pic_pu_idx; 681 s_mv_ctxt.pu1_pic_pu_map = ps_proc->pu1_pic_pu_map; 682 s_mv_ctxt.i4_ctb_pu_cnt = ps_proc->i4_ctb_pu_cnt; 683 s_mv_ctxt.i4_ctb_start_pu_idx = ps_proc->i4_ctb_start_pu_idx; 684 s_mv_ctxt.u1_top_ctb_avail = ps_proc->u1_top_ctb_avail; 685 s_mv_ctxt.u1_top_rt_ctb_avail = ps_proc->u1_top_rt_ctb_avail; 686 s_mv_ctxt.u1_top_lt_ctb_avail = ps_proc->u1_top_lt_ctb_avail; 687 s_mv_ctxt.u1_left_ctb_avail = ps_proc->u1_left_ctb_avail; 688 689 ihevcd_get_mv_ctb(&s_mv_ctxt, pu4_ctb_top_pu_idx, 690 pu4_ctb_left_pu_idx, pu4_ctb_top_left_pu_idx); 691 } 692 693 ihevcd_inter_pred_ctb(ps_proc); 694 } 695 else if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD) 696 { 697 WORD32 next_ctb_idx, num_pu_per_ctb, ctb_start_pu_idx, pu_cnt; 698 pu_t *ps_pu; 699 WORD32 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE); 700 UWORD8 *pu1_pic_pu_map_ctb = ps_proc->pu1_pic_pu_map + 701 (ps_proc->i4_ctb_x + ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb) * num_minpu_in_ctb; 702 WORD32 row, col; 703 UWORD32 *pu4_nbr_pu_idx = ps_proc->pu4_pic_pu_idx_map; 704 WORD32 nbr_pu_idx_strd = MAX_CTB_SIZE / MIN_PU_SIZE + 2; 705 706 for(row = 0; row < ctb_size / MIN_PU_SIZE; row++) 707 { 708 for(col = 0; col < ctb_size / MIN_PU_SIZE; col++) 709 { 710 pu1_pic_pu_map_ctb[row * ctb_size / MIN_PU_SIZE + col] = 0; 711 } 712 } 713 /* Neighbor PU idx update inside CTB */ 714 /* 1byte per 4x4. Indicates the PU idx that 4x4 block belongs to */ 715 716 cur_ctb_idx = ps_proc->i4_ctb_x 717 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 718 next_ctb_idx = ps_proc->i4_next_pu_ctb_cnt; 719 num_pu_per_ctb = ps_proc->pu4_pic_pu_idx[next_ctb_idx] 720 - ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 721 ctb_start_pu_idx = ps_proc->pu4_pic_pu_idx[cur_ctb_idx]; 722 ps_pu = &ps_proc->ps_pic_pu[ctb_start_pu_idx]; 723 724 for(pu_cnt = 0; pu_cnt < num_pu_per_ctb; pu_cnt++, ps_pu++) 725 { 726 UWORD32 cur_pu_idx; 727 WORD32 pu_ht = (ps_pu->b4_ht + 1) << 2; 728 WORD32 pu_wd = (ps_pu->b4_wd + 1) << 2; 729 730 cur_pu_idx = ctb_start_pu_idx + pu_cnt; 731 732 for(row = 0; row < pu_ht / MIN_PU_SIZE; row++) 733 for(col = 0; col < pu_wd / MIN_PU_SIZE; col++) 734 pu4_nbr_pu_idx[(1 + ps_pu->b4_pos_x + col) 735 + (1 + ps_pu->b4_pos_y + row) 736 * nbr_pu_idx_strd] = 737 cur_pu_idx; 738 } 739 740 /* Updating Top and Left pointers */ 741 { 742 WORD32 rows_remaining = ps_sps->i2_pic_height_in_luma_samples 743 - (ps_proc->i4_ctb_y << ps_sps->i1_log2_ctb_size); 744 WORD32 ctb_size_left = MIN(ctb_size, rows_remaining); 745 746 /* Top Left */ 747 /* saving top left before updating top ptr, as updating top ptr will overwrite the top left for the next ctb */ 748 ps_proc->u4_ctb_top_left_pu_idx = ps_proc->pu4_pic_pu_idx_top[((ps_proc->i4_ctb_x + 1) * ctb_size / MIN_PU_SIZE) - 1]; 749 for(i = 0; i < ctb_size / MIN_PU_SIZE; i++) 750 { 751 /* Left */ 752 /* Last column of au4_nbr_pu_idx */ 753 ps_proc->pu4_pic_pu_idx_left[i] = 754 pu4_nbr_pu_idx[(ctb_size / MIN_PU_SIZE) + (i + 1) * nbr_pu_idx_strd]; 755 /* Top */ 756 /* Last row of au4_nbr_pu_idx */ 757 ps_proc->pu4_pic_pu_idx_top[(ps_proc->i4_ctb_x * ctb_size / MIN_PU_SIZE) + i] = 758 pu4_nbr_pu_idx[(ctb_size_left / MIN_PU_SIZE) * nbr_pu_idx_strd + i + 1]; 759 760 } 761 } 762 } 763 } 764 765 if(ps_proc->ps_pps->i1_tiles_enabled_flag) 766 { 767 /*Update the tile index buffer with tile information for the current ctb*/ 768 UWORD16 *pu1_tile_idx = ps_proc->pu1_tile_idx; 769 pu1_tile_idx[(ps_proc->i4_ctb_x + (ps_proc->i4_ctb_y * ps_sps->i2_pic_wd_in_ctb))] 770 = ps_proc->i4_cur_tile_idx; 771 } 772 773 /*************************************************/ 774 /*********** BS, QP and Deblocking **************/ 775 /*************************************************/ 776 /* Boundary strength call has to be after IQ IT recon since QP population needs ps_proc->i4_qp_const_inc_ctb flag */ 777 778 { 779 slice_header_t *ps_slice_hdr; 780 ps_slice_hdr = ps_proc->ps_slice_hdr; 781 782 783 /* Check if deblock is disabled for the current slice or if it is disabled for the current picture 784 * because of disable deblock api 785 */ 786 if(0 == ps_codec->i4_disable_deblk_pic) 787 { 788 if(ps_codec->i4_num_cores > MV_PRED_NUM_CORES_THRESHOLD) 789 { 790 if((0 == ps_slice_hdr->i1_slice_disable_deblocking_filter_flag) && 791 (0 == ps_codec->i4_slice_error)) 792 { 793 ihevcd_update_ctb_tu_cnt(ps_proc); 794 ps_proc->s_bs_ctxt.ps_pps = ps_proc->ps_pps; 795 ps_proc->s_bs_ctxt.ps_sps = ps_proc->ps_sps; 796 ps_proc->s_bs_ctxt.ps_codec = ps_proc->ps_codec; 797 ps_proc->s_bs_ctxt.i4_ctb_tu_cnt = ps_proc->i4_ctb_tu_cnt; 798 ps_proc->s_bs_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 799 ps_proc->s_bs_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 800 ps_proc->s_bs_ctxt.i4_ctb_tile_x = ps_proc->i4_ctb_tile_x; 801 ps_proc->s_bs_ctxt.i4_ctb_tile_y = ps_proc->i4_ctb_tile_y; 802 ps_proc->s_bs_ctxt.i4_ctb_slice_x = ps_proc->i4_ctb_slice_x; 803 ps_proc->s_bs_ctxt.i4_ctb_slice_y = ps_proc->i4_ctb_slice_y; 804 ps_proc->s_bs_ctxt.ps_tu = ps_proc->ps_tu; 805 ps_proc->s_bs_ctxt.ps_pu = ps_proc->ps_pu; 806 ps_proc->s_bs_ctxt.pu4_pic_pu_idx_map = ps_proc->pu4_pic_pu_idx_map; 807 ps_proc->s_bs_ctxt.i4_next_pu_ctb_cnt = ps_proc->i4_next_pu_ctb_cnt; 808 ps_proc->s_bs_ctxt.i4_next_tu_ctb_cnt = ps_proc->i4_next_tu_ctb_cnt; 809 ps_proc->s_bs_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx; 810 ps_proc->s_bs_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 811 ps_proc->s_bs_ctxt.ps_tile = ps_proc->ps_tile; 812 813 if(ISLICE == ps_slice_hdr->i1_slice_type) 814 { 815 ihevcd_ctb_boundary_strength_islice(&ps_proc->s_bs_ctxt); 816 } 817 else 818 { 819 ihevcd_ctb_boundary_strength_pbslice(&ps_proc->s_bs_ctxt); 820 } 821 } 822 else 823 { 824 WORD32 bs_strd = (ps_sps->i2_pic_wd_in_ctb + 1) * (ctb_size * ctb_size / 8 / 16); 825 826 UWORD32 *pu4_vert_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_vert_bs + 827 ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) + 828 ps_proc->i4_ctb_y * bs_strd); 829 UWORD32 *pu4_horz_bs = (UWORD32 *)((UWORD8 *)ps_proc->s_bs_ctxt.pu4_pic_horz_bs + 830 ps_proc->i4_ctb_x * (ctb_size * ctb_size / 8 / 16) + 831 ps_proc->i4_ctb_y * bs_strd); 832 833 memset(pu4_vert_bs, 0, (ctb_size / 8 + 1) * (ctb_size / 4) / 8 * 2); 834 memset(pu4_horz_bs, 0, (ctb_size / 8) * (ctb_size / 4) / 8 * 2); 835 836 } 837 } 838 } 839 } 840 841 /* Per CTB update the following */ 842 { 843 WORD32 cur_ctb_idx = ps_proc->i4_ctb_x 844 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 845 cur_ctb_idx++; 846 847 ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb; 848 ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt; 849 if((1 == ps_codec->i4_num_cores) && 850 (0 == cur_ctb_idx % RESET_TU_BUF_NCTB)) 851 { 852 ps_proc->ps_tu = ps_proc->ps_pic_tu; 853 } 854 ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt; 855 } 856 857 /* Update proc map for recon*/ 858 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 859 860 num_ctb_tmp -= nctb; 861 ihevcd_ctb_pos_update(ps_proc, nctb); 862 863 } 864 865 if(cur_slice_idx != ps_proc->i4_cur_slice_idx) 866 { 867 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1)); 868 ps_proc->i4_cur_slice_idx = cur_slice_idx; 869 } 870 /* Restore the saved variables */ 871 num_ctb_tmp = num_ctb; 872 ps_proc->i4_ctb_x -= num_ctb; 873 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x; 874 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x; 875 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y; 876 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y; 877 ps_proc->pu1_pu_map = pu1_pu_map_cur; 878 ps_proc->ps_tu = ps_tu_cur; 879 proc_type = PROC_RECON; 880 881 while(num_ctb_tmp) 882 { 883 884 /* Check proc map to ensure dependencies for recon are met */ 885 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 886 887 ihevcd_slice_hdr_update(ps_proc); 888 889 { 890 891 ihevcd_ctb_avail_update(ps_proc); 892 893 /*************************************************/ 894 /**************** IQ IT RECON *******************/ 895 /*************************************************/ 896 897 ihevcd_update_ctb_tu_cnt(ps_proc); 898 899 /* When scaling matrix is not to be used(scaling_list_enable_flag is zero in SPS), 900 * default value of 16 has to be used. Since the value is same for all sizes, 901 * same table is used for all cases. 902 */ 903 if(0 == ps_sps->i1_scaling_list_enable_flag) 904 { 905 ps_proc->api2_dequant_intra_matrix[0] = 906 (WORD16 *)gi2_flat_scale_mat_32x32; 907 ps_proc->api2_dequant_intra_matrix[1] = 908 (WORD16 *)gi2_flat_scale_mat_32x32; 909 ps_proc->api2_dequant_intra_matrix[2] = 910 (WORD16 *)gi2_flat_scale_mat_32x32; 911 ps_proc->api2_dequant_intra_matrix[3] = 912 (WORD16 *)gi2_flat_scale_mat_32x32; 913 914 ps_proc->api2_dequant_inter_matrix[0] = 915 (WORD16 *)gi2_flat_scale_mat_32x32; 916 ps_proc->api2_dequant_inter_matrix[1] = 917 (WORD16 *)gi2_flat_scale_mat_32x32; 918 ps_proc->api2_dequant_inter_matrix[2] = 919 (WORD16 *)gi2_flat_scale_mat_32x32; 920 ps_proc->api2_dequant_inter_matrix[3] = 921 (WORD16 *)gi2_flat_scale_mat_32x32; 922 } 923 else 924 { 925 if(0 == ps_sps->i1_sps_scaling_list_data_present_flag) 926 { 927 ps_proc->api2_dequant_intra_matrix[0] = 928 (WORD16 *)gi2_flat_scale_mat_32x32; 929 ps_proc->api2_dequant_intra_matrix[1] = 930 (WORD16 *)gi2_intra_default_scale_mat_8x8; 931 ps_proc->api2_dequant_intra_matrix[2] = 932 (WORD16 *)gi2_intra_default_scale_mat_16x16; 933 ps_proc->api2_dequant_intra_matrix[3] = 934 (WORD16 *)gi2_intra_default_scale_mat_32x32; 935 936 ps_proc->api2_dequant_inter_matrix[0] = 937 (WORD16 *)gi2_flat_scale_mat_32x32; 938 ps_proc->api2_dequant_inter_matrix[1] = 939 (WORD16 *)gi2_inter_default_scale_mat_8x8; 940 ps_proc->api2_dequant_inter_matrix[2] = 941 (WORD16 *)gi2_inter_default_scale_mat_16x16; 942 ps_proc->api2_dequant_inter_matrix[3] = 943 (WORD16 *)gi2_inter_default_scale_mat_32x32; 944 } 945 /*TODO: Add support for custom scaling matrices */ 946 } 947 948 949 /* CTB Level pointers */ 950 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma 951 + (ps_proc->i4_ctb_x * ctb_size 952 + ps_proc->i4_ctb_y * ctb_size 953 * ps_codec->i4_strd); 954 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma 955 + ps_proc->i4_ctb_x * ctb_size 956 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2); 957 958 ihevcd_iquant_itrans_recon_ctb(ps_proc); 959 } 960 961 /* Per CTB update the following */ 962 { 963 WORD32 cur_ctb_idx = ps_proc->i4_ctb_x 964 + ps_proc->i4_ctb_y * (ps_sps->i2_pic_wd_in_ctb); 965 cur_ctb_idx++; 966 967 ps_proc->pu1_pu_map += nctb * num_minpu_in_ctb; 968 ps_proc->ps_tu += ps_proc->i4_ctb_tu_cnt; 969 if((1 == ps_codec->i4_num_cores) && 970 (0 == cur_ctb_idx % RESET_TU_BUF_NCTB)) 971 { 972 ps_proc->ps_tu = ps_proc->ps_pic_tu; 973 } 974 ps_proc->ps_pu += ps_proc->i4_ctb_pu_cnt; 975 } 976 977 978 /* Update proc map for recon*/ 979 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 980 981 num_ctb_tmp -= nctb; 982 ihevcd_ctb_pos_update(ps_proc, nctb); 983 } 984 985 if(cur_slice_idx != ps_proc->i4_cur_slice_idx) 986 { 987 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1)); 988 ps_proc->i4_cur_slice_idx = cur_slice_idx; 989 } 990 /* Restore the saved variables */ 991 num_ctb_tmp = num_ctb; 992 ps_proc->i4_ctb_x -= num_ctb; 993 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x; 994 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x; 995 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y; 996 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y; 997 pu1_pu_map_nxt = ps_proc->pu1_pu_map; 998 ps_tu_nxt = ps_proc->ps_tu; 999 ps_proc->pu1_pu_map = pu1_pu_map_cur; 1000 ps_proc->ps_tu = ps_tu_cur; 1001 proc_type = PROC_DEBLK; 1002 1003 while(num_ctb_tmp) 1004 { 1005 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr; 1006 1007 /* Check proc map to ensure dependencies for deblk are met */ 1008 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 1009 1010 ihevcd_slice_hdr_update(ps_proc); 1011 ps_slice_hdr = ps_proc->ps_slice_hdr; 1012 1013 if(((0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1)) && 1014 (0 == ps_codec->i4_disable_deblk_pic)) 1015 { 1016 WORD32 i4_is_last_ctb_x = 0; 1017 WORD32 i4_is_last_ctb_y = 0; 1018 1019 if(0 == ps_slice_hdr->i1_slice_disable_deblocking_filter_flag || 1020 (ps_proc->i4_ctb_slice_x == 0) || 1021 (ps_proc->i4_ctb_slice_y == 0)) 1022 { 1023 ps_proc->s_deblk_ctxt.ps_pps = ps_proc->ps_pps; 1024 ps_proc->s_deblk_ctxt.ps_sps = ps_proc->ps_sps; 1025 ps_proc->s_deblk_ctxt.ps_codec = ps_proc->ps_codec; 1026 ps_proc->s_deblk_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 1027 ps_proc->s_deblk_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 1028 ps_proc->s_deblk_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 1029 ps_proc->s_deblk_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx; 1030 ps_proc->s_deblk_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU); 1031 1032 /* Populating Current CTB's no_loop_filter flags */ 1033 { 1034 WORD32 row; 1035 WORD32 log2_ctb_size = ps_sps->i1_log2_ctb_size; 1036 1037 /* Loop filter strd in units of num bits */ 1038 WORD32 loop_filter_strd = ((ps_sps->i2_pic_width_in_luma_samples + 63) >> 6) << 3; 1039 /* Bit position is the current 8x8 bit offset wrt pic_no_loop_filter 1040 * bit_pos has to be a WOR32 so that when it is negative, the downshift still retains it to be a negative value */ 1041 WORD32 bit_pos = ((ps_proc->i4_ctb_y << (log2_ctb_size - 3)) - 1) * loop_filter_strd + (ps_proc->i4_ctb_x << (log2_ctb_size - 3)) - 1; 1042 1043 for(row = 0; row < (ctb_size >> 3) + 1; row++) 1044 { 1045 /* Go to the corresponding byte - read 32 bits and downshift */ 1046 ps_proc->s_deblk_ctxt.au2_ctb_no_loop_filter_flag[row] = (*(UWORD32 *)(ps_proc->pu1_pic_no_loop_filter_flag + (bit_pos >> 3))) >> (bit_pos & 7); 1047 bit_pos += loop_filter_strd; 1048 } 1049 } 1050 1051 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y); 1052 1053 /* If the last CTB in the row was a complete CTB then deblocking has to be called from remaining pixels, since deblocking 1054 * is applied on a shifted CTB structure 1055 */ 1056 if(ps_proc->i4_ctb_x == ps_sps->i2_pic_wd_in_ctb - 1) 1057 { 1058 WORD32 i4_is_last_ctb_x = 1; 1059 WORD32 i4_is_last_ctb_y = 0; 1060 1061 WORD32 last_x_pos; 1062 last_x_pos = (ps_sps->i2_pic_wd_in_ctb << ps_sps->i1_log2_ctb_size); 1063 if(last_x_pos == ps_sps->i2_pic_width_in_luma_samples) 1064 { 1065 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y); 1066 } 1067 } 1068 1069 1070 /* If the last CTB in the column was a complete CTB then deblocking has to be called from remaining pixels, since deblocking 1071 * is applied on a shifted CTB structure 1072 */ 1073 if(ps_proc->i4_ctb_y == ps_sps->i2_pic_ht_in_ctb - 1) 1074 { 1075 WORD32 i4_is_last_ctb_x = 0; 1076 WORD32 i4_is_last_ctb_y = 1; 1077 WORD32 last_y_pos; 1078 last_y_pos = (ps_sps->i2_pic_ht_in_ctb << ps_sps->i1_log2_ctb_size); 1079 if(last_y_pos == ps_sps->i2_pic_height_in_luma_samples) 1080 { 1081 ihevcd_deblk_ctb(&ps_proc->s_deblk_ctxt, i4_is_last_ctb_x, i4_is_last_ctb_y); 1082 } 1083 } 1084 } 1085 } 1086 1087 /* Update proc map for deblk*/ 1088 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 1089 1090 num_ctb_tmp -= nctb; 1091 ihevcd_ctb_pos_update(ps_proc, nctb); 1092 } 1093 1094 if(cur_slice_idx != ps_proc->i4_cur_slice_idx) 1095 { 1096 ps_proc->ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((cur_slice_idx)&(MAX_SLICE_HDR_CNT - 1)); 1097 ps_proc->i4_cur_slice_idx = cur_slice_idx; 1098 } 1099 /* Restore the saved variables */ 1100 num_ctb_tmp = num_ctb; 1101 ps_proc->i4_ctb_x -= num_ctb; 1102 ps_proc->i4_ctb_tile_x = cur_ctb_tile_x; 1103 ps_proc->i4_ctb_tile_y = cur_ctb_tile_y; 1104 ps_proc->pu1_pu_map = pu1_pu_map_cur; 1105 ps_proc->ps_tu = ps_tu_cur; 1106 nxt_ctb_slice_y = ps_proc->i4_ctb_slice_y; 1107 nxt_ctb_slice_x = ps_proc->i4_ctb_slice_x; 1108 ps_proc->i4_ctb_slice_y = cur_ctb_slice_y; 1109 ps_proc->i4_ctb_slice_x = cur_ctb_slice_x; 1110 proc_type = PROC_SAO; 1111 1112 while(num_ctb_tmp) 1113 { 1114 slice_header_t *ps_slice_hdr = ps_proc->ps_slice_hdr; 1115 1116 /* Check proc map to ensure dependencies for SAO are met */ 1117 ihevcd_proc_map_check(ps_proc, proc_type, nctb); 1118 1119 ihevcd_slice_hdr_update(ps_proc); 1120 ps_slice_hdr = ps_proc->ps_slice_hdr; 1121 1122 if(0 == FRAME_ILF_PAD || ps_codec->i4_num_cores != 1) 1123 { 1124 if((0 == ps_codec->i4_disable_sao_pic) && 1125 (ps_slice_hdr->i1_slice_sao_luma_flag || ps_slice_hdr->i1_slice_sao_chroma_flag)) 1126 { 1127 ps_proc->s_sao_ctxt.ps_pps = ps_proc->ps_pps; 1128 ps_proc->s_sao_ctxt.ps_sps = ps_proc->ps_sps; 1129 ps_proc->s_sao_ctxt.ps_tile = ps_proc->ps_tile; 1130 ps_proc->s_sao_ctxt.ps_codec = ps_proc->ps_codec; 1131 ps_proc->s_sao_ctxt.ps_slice_hdr = ps_proc->ps_slice_hdr; 1132 ps_proc->s_sao_ctxt.i4_cur_slice_idx = ps_proc->i4_cur_slice_idx; 1133 1134 1135 #if SAO_PROCESS_SHIFT_CTB 1136 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 1137 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 1138 ps_proc->s_sao_ctxt.is_chroma_yuv420sp_vu = (ps_codec->e_ref_chroma_fmt == IV_YUV_420SP_VU); 1139 1140 ihevcd_sao_shift_ctb(&ps_proc->s_sao_ctxt); 1141 #else 1142 if(ps_proc->i4_ctb_x > 1 && ps_proc->i4_ctb_y > 0) 1143 { 1144 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 2; 1145 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1; 1146 1147 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1148 } 1149 1150 if(ps_sps->i2_pic_wd_in_ctb - 1 == ps_proc->i4_ctb_x && ps_proc->i4_ctb_y > 0) 1151 { 1152 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x - 1; 1153 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1; 1154 1155 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1156 1157 ps_proc->s_sao_ctxt.i4_ctb_x = ps_proc->i4_ctb_x; 1158 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y - 1; 1159 1160 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1161 1162 if(ps_sps->i2_pic_ht_in_ctb - 1 == ps_proc->i4_ctb_y) 1163 { 1164 WORD32 i4_ctb_x; 1165 ps_proc->s_sao_ctxt.i4_ctb_y = ps_proc->i4_ctb_y; 1166 for(i4_ctb_x = 0; i4_ctb_x < ps_sps->i2_pic_wd_in_ctb; i4_ctb_x++) 1167 { 1168 ps_proc->s_sao_ctxt.i4_ctb_x = i4_ctb_x; 1169 ihevcd_sao_ctb(&ps_proc->s_sao_ctxt); 1170 } 1171 } 1172 } 1173 #endif 1174 } 1175 1176 1177 /* Call padding if required */ 1178 { 1179 #if SAO_PROCESS_SHIFT_CTB 1180 1181 if(0 == ps_proc->i4_ctb_x) 1182 { 1183 WORD32 pad_ht_luma; 1184 WORD32 pad_ht_chroma; 1185 1186 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma 1187 + (ps_proc->i4_ctb_x * ctb_size 1188 + ps_proc->i4_ctb_y * ctb_size 1189 * ps_codec->i4_strd); 1190 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma 1191 + ps_proc->i4_ctb_x * ctb_size 1192 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2); 1193 1194 pad_ht_luma = ctb_size; 1195 pad_ht_luma += (ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y ? 8 : 0; 1196 pad_ht_chroma = ctb_size / 2; 1197 /* Pad left after 1st CTB is processed */ 1198 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT); 1199 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT); 1200 } 1201 1202 if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x) 1203 { 1204 WORD32 pad_ht_luma; 1205 WORD32 pad_ht_chroma; 1206 WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size); 1207 1208 ps_proc->pu1_cur_ctb_luma = ps_proc->pu1_cur_pic_luma 1209 + (ps_proc->i4_ctb_x * ctb_size 1210 + ps_proc->i4_ctb_y * ctb_size 1211 * ps_codec->i4_strd); 1212 ps_proc->pu1_cur_ctb_chroma = ps_proc->pu1_cur_pic_chroma 1213 + ps_proc->i4_ctb_x * ctb_size 1214 + (ps_proc->i4_ctb_y * ctb_size * ps_codec->i4_strd / 2); 1215 1216 pad_ht_luma = ctb_size; 1217 pad_ht_chroma = ctb_size / 2; 1218 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) 1219 { 1220 pad_ht_luma += 8; 1221 pad_ht_chroma += 16; 1222 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + (ps_sps->i2_pic_height_in_luma_samples / 2 - 16) * ps_codec->i4_strd, 1223 ps_codec->i4_strd, 16, PAD_LEFT); 1224 } 1225 /* Pad right after last CTB in the current row is processed */ 1226 ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 8 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT); 1227 ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - 16 * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT); 1228 1229 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) 1230 { 1231 UWORD8 *pu1_buf; 1232 /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */ 1233 /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */ 1234 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1235 ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP); 1236 ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2); 1237 1238 pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT; 1239 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1240 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT); 1241 1242 pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT; 1243 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2); 1244 } 1245 } 1246 #else 1247 if(ps_proc->i4_ctb_y > 1) 1248 { 1249 if(0 == ps_proc->i4_ctb_x) 1250 { 1251 WORD32 pad_ht_luma; 1252 WORD32 pad_ht_chroma; 1253 1254 pad_ht_luma = ctb_size; 1255 pad_ht_chroma = ctb_size / 2; 1256 /* Pad left after 1st CTB is processed */ 1257 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_ctb_luma - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_LEFT); 1258 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_ctb_chroma - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT); 1259 } 1260 else if((ps_sps->i2_pic_wd_in_ctb - 1) == ps_proc->i4_ctb_x) 1261 { 1262 WORD32 pad_ht_luma; 1263 WORD32 pad_ht_chroma; 1264 WORD32 cols_remaining = ps_sps->i2_pic_width_in_luma_samples - (ps_proc->i4_ctb_x << ps_sps->i1_log2_ctb_size); 1265 1266 pad_ht_luma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size : ctb_size; 1267 pad_ht_chroma = ((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) ? 3 * ctb_size / 2 : ctb_size / 2; 1268 /* Pad right after last CTB in the current row is processed */ 1269 ps_codec->s_func_selector.ihevc_pad_right_luma_fptr(ps_proc->pu1_cur_ctb_luma + cols_remaining - 2 * ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_luma, PAD_RIGHT); 1270 ps_codec->s_func_selector.ihevc_pad_right_chroma_fptr(ps_proc->pu1_cur_ctb_chroma + cols_remaining - ctb_size * ps_codec->i4_strd, ps_codec->i4_strd, pad_ht_chroma, PAD_RIGHT); 1271 1272 if((ps_sps->i2_pic_ht_in_ctb - 1) == ps_proc->i4_ctb_y) 1273 { 1274 UWORD8 *pu1_buf; 1275 WORD32 pad_ht_luma; 1276 WORD32 pad_ht_chroma; 1277 1278 pad_ht_luma = 2 * ctb_size; 1279 pad_ht_chroma = ctb_size; 1280 1281 ps_codec->s_func_selector.ihevc_pad_left_luma_fptr(ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples - 2 * ctb_size), 1282 ps_codec->i4_strd, pad_ht_luma, PAD_LEFT); 1283 ps_codec->s_func_selector.ihevc_pad_left_chroma_fptr(ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2 - ctb_size), 1284 ps_codec->i4_strd, pad_ht_chroma, PAD_LEFT); 1285 1286 /* Since SAO is shifted by 8x8, chroma padding can not be done till second row is processed */ 1287 /* Hence moving top padding to to end of frame, Moving it to second row also results in problems when there is only one row */ 1288 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1289 ihevc_pad_top(ps_proc->pu1_cur_pic_luma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP); 1290 ihevc_pad_top(ps_proc->pu1_cur_pic_chroma - PAD_LEFT, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_TOP / 2); 1291 1292 pu1_buf = ps_proc->pu1_cur_pic_luma + ps_codec->i4_strd * ps_sps->i2_pic_height_in_luma_samples - PAD_LEFT; 1293 /* Pad top after padding left and right for current rows after processing 1st CTB row */ 1294 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT); 1295 1296 pu1_buf = ps_proc->pu1_cur_pic_chroma + ps_codec->i4_strd * (ps_sps->i2_pic_height_in_luma_samples / 2) - PAD_LEFT; 1297 ihevc_pad_bottom(pu1_buf, ps_codec->i4_strd, ps_sps->i2_pic_width_in_luma_samples + PAD_WD, PAD_BOT / 2); 1298 } 1299 } 1300 } 1301 #endif 1302 } 1303 } 1304 1305 1306 /* Update proc map for SAO*/ 1307 ihevcd_proc_map_update(ps_proc, proc_type, nctb); 1308 /* Update proc map for Completion of CTB*/ 1309 ihevcd_proc_map_update(ps_proc, PROC_ALL, nctb); 1310 { 1311 tile_t *ps_tile; 1312 1313 ps_tile = ps_proc->ps_tile; 1314 num_ctb_tmp -= nctb; 1315 1316 ps_proc->i4_ctb_tile_x += nctb; 1317 ps_proc->i4_ctb_x += nctb; 1318 1319 ps_proc->i4_ctb_slice_x += nctb; 1320 1321 1322 /* Update tile counters */ 1323 if(ps_proc->i4_ctb_tile_x >= (ps_tile->u2_wd)) 1324 { 1325 /*End of tile row*/ 1326 ps_proc->i4_ctb_tile_x = 0; 1327 ps_proc->i4_ctb_x = ps_tile->u1_pos_x; 1328 1329 ps_proc->i4_ctb_tile_y++; 1330 ps_proc->i4_ctb_y++; 1331 if(ps_proc->i4_ctb_tile_y == ps_tile->u2_ht) 1332 { 1333 /* Reached End of Tile */ 1334 ps_proc->i4_ctb_tile_y = 0; 1335 ps_proc->i4_ctb_tile_x = 0; 1336 ps_proc->ps_tile++; 1337 //End of picture 1338 if(!((ps_tile->u2_ht + ps_tile->u1_pos_y == ps_sps->i2_pic_ht_in_ctb) && (ps_tile->u2_wd + ps_tile->u1_pos_x == ps_sps->i2_pic_wd_in_ctb))) 1339 { 1340 ps_tile = ps_proc->ps_tile; 1341 ps_proc->i4_ctb_x = ps_tile->u1_pos_x; 1342 ps_proc->i4_ctb_y = ps_tile->u1_pos_y; 1343 1344 } 1345 } 1346 } 1347 } 1348 } 1349 1350 ps_proc->i4_ctb_cnt -= num_ctb; 1351 } 1352 return ret; 1353 } 1354 1355 void ihevcd_init_proc_ctxt(process_ctxt_t *ps_proc, WORD32 tu_coeff_data_ofst) 1356 { 1357 codec_t *ps_codec; 1358 slice_header_t *ps_slice_hdr; 1359 pps_t *ps_pps; 1360 sps_t *ps_sps; 1361 tile_t *ps_tile, *ps_tile_prev; 1362 WORD32 tile_idx; 1363 WORD32 ctb_size; 1364 WORD32 num_minpu_in_ctb; 1365 WORD32 num_ctb_in_row; 1366 WORD32 ctb_addr; 1367 WORD32 i4_wd_in_ctb; 1368 WORD32 tile_start_ctb_idx; 1369 WORD32 slice_start_ctb_idx; 1370 WORD32 check_tile_wd; 1371 WORD32 continuous_tiles = 0; //Refers to tiles that are continuous, within a slice, horizontally 1372 1373 ps_codec = ps_proc->ps_codec; 1374 1375 ps_slice_hdr = ps_codec->ps_slice_hdr_base + ((ps_proc->i4_cur_slice_idx) & (MAX_SLICE_HDR_CNT - 1)); 1376 ps_proc->ps_slice_hdr = ps_slice_hdr; 1377 ps_proc->ps_pps = ps_codec->ps_pps_base + ps_slice_hdr->i1_pps_id; 1378 ps_pps = ps_proc->ps_pps; 1379 ps_proc->ps_sps = ps_codec->ps_sps_base + ps_pps->i1_sps_id; 1380 ps_sps = ps_proc->ps_sps; 1381 ps_proc->i4_init_done = 1; 1382 ctb_size = 1 << ps_sps->i1_log2_ctb_size; 1383 num_minpu_in_ctb = (ctb_size / MIN_PU_SIZE) * (ctb_size / MIN_PU_SIZE); 1384 num_ctb_in_row = ps_sps->i2_pic_wd_in_ctb; 1385 1386 ps_proc->s_sao_ctxt.pu1_slice_idx = ps_proc->pu1_slice_idx; 1387 1388 ihevcd_get_tile_pos(ps_pps, ps_sps, ps_proc->i4_ctb_x, ps_proc->i4_ctb_y, 1389 &ps_proc->i4_ctb_tile_x, &ps_proc->i4_ctb_tile_y, 1390 &tile_idx); 1391 1392 ps_proc->ps_tile = ps_pps->ps_tile + tile_idx; 1393 ps_proc->i4_cur_tile_idx = tile_idx; 1394 ps_tile = ps_proc->ps_tile; 1395 1396 if(ps_pps->i1_tiles_enabled_flag) 1397 { 1398 if(tile_idx) 1399 ps_tile_prev = ps_tile - 1; 1400 else 1401 ps_tile_prev = ps_tile; 1402 1403 slice_start_ctb_idx = ps_slice_hdr->i2_ctb_x + (ps_slice_hdr->i2_ctb_y * ps_sps->i2_pic_wd_in_ctb); 1404 tile_start_ctb_idx = ps_tile->u1_pos_x + (ps_tile->u1_pos_y * ps_sps->i2_pic_wd_in_ctb); 1405 1406 /*Check if 1407 * 1. Last tile that ends in frame boundary and 1st tile in next row belongs to same slice 1408 * 1.1. If it does, check if the slice that has these tiles spans across the frame row. 1409 * 2. Vertical tiles are present within a slice */ 1410 if(((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x) && (ps_slice_hdr->i2_ctb_y != ps_tile->u1_pos_y))) 1411 { 1412 continuous_tiles = 1; 1413 } 1414 else 1415 { 1416 check_tile_wd = ps_slice_hdr->i2_ctb_x + ps_tile_prev->u2_wd; 1417 if(!(((check_tile_wd >= ps_sps->i2_pic_wd_in_ctb) && (check_tile_wd % ps_sps->i2_pic_wd_in_ctb == ps_tile->u1_pos_x)) 1418 || ((ps_slice_hdr->i2_ctb_x == ps_tile->u1_pos_x)))) 1419 { 1420 continuous_tiles = 1; 1421 } 1422 } 1423 1424 { 1425 WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x; 1426 WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y; 1427 1428 /* Handles cases where 1429 * 1. Slices begin at the start of each tile 1430 * 2. Tiles lie in the same slice row.i.e, starting tile_x > slice_x, but tile_y == slice_y 1431 * */ 1432 if(ps_proc->i4_ctb_x >= i2_independent_ctb_x) 1433 { 1434 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x; 1435 } 1436 else 1437 { 1438 /* Indicates multiple tiles in a slice case where 1439 * The new tile belongs to an older slice that started in the previous rows-not the present row 1440 * & (tile_y > slice_y and tile_x < slice_x) 1441 */ 1442 if((slice_start_ctb_idx < tile_start_ctb_idx) && (continuous_tiles)) 1443 { 1444 i4_wd_in_ctb = ps_sps->i2_pic_wd_in_ctb; 1445 } 1446 /* Indicates many-tiles-in-one-slice case, for slices that end without spanning the frame width*/ 1447 else 1448 { 1449 i4_wd_in_ctb = ps_tile->u2_wd; 1450 } 1451 1452 if(continuous_tiles) 1453 { 1454 ps_proc->i4_ctb_slice_x = i4_wd_in_ctb 1455 - (i2_independent_ctb_x - ps_proc->i4_ctb_x); 1456 } 1457 else 1458 { 1459 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - ps_tile->u1_pos_x; 1460 } 1461 } 1462 /* Initialize ctb slice y to zero and at the start of slice row initialize it 1463 to difference between ctb_y and slice's start ctb y */ 1464 1465 ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y; 1466 1467 /*If beginning of tile, check if slice counters are set correctly*/ 1468 if((0 == ps_proc->i4_ctb_tile_x) && (0 == ps_proc->i4_ctb_tile_y)) 1469 { 1470 if(ps_slice_hdr->i1_dependent_slice_flag) 1471 { 1472 ps_proc->i4_ctb_slice_x = 0; 1473 ps_proc->i4_ctb_slice_y = 0; 1474 } 1475 /*For slices that span across multiple tiles*/ 1476 else if(slice_start_ctb_idx < tile_start_ctb_idx) 1477 { 1478 ps_proc->i4_ctb_slice_y = ps_tile->u1_pos_y - i2_independent_ctb_y; 1479 /* Two Cases 1480 * 1 - slice spans across frame-width- but dose not start from 1st column 1481 * 2 - Slice spans across multiple tiles anywhere is a frame 1482 */ 1483 /*TODO:In a multiple slice clip, if an independent slice span across more than 2 tiles in a row, it is not supported*/ 1484 if(continuous_tiles) //Case 2-implemented for slices that span not more than 2 tiles 1485 { 1486 if(i2_independent_ctb_y <= ps_tile->u1_pos_y) 1487 { 1488 //Check if ctb x is before or after 1489 if(i2_independent_ctb_x > ps_tile->u1_pos_x) 1490 { 1491 ps_proc->i4_ctb_slice_y -= 1; 1492 } 1493 } 1494 } 1495 } 1496 } 1497 //Slice starts from a column which is not the starting tile-column, but is within the tile 1498 if(((i2_independent_ctb_x - ps_tile->u1_pos_x) != 0) && ((ps_proc->i4_ctb_slice_y != 0)) 1499 && ((i2_independent_ctb_x >= ps_tile->u1_pos_x) && (i2_independent_ctb_x < ps_tile->u1_pos_x + ps_tile->u2_wd))) 1500 { 1501 ps_proc->i4_ctb_slice_y -= 1; 1502 } 1503 } 1504 } 1505 else 1506 { 1507 WORD32 i2_independent_ctb_x = ps_slice_hdr->i2_independent_ctb_x; 1508 WORD32 i2_independent_ctb_y = ps_slice_hdr->i2_independent_ctb_y; 1509 1510 1511 { 1512 ps_proc->i4_ctb_slice_x = ps_proc->i4_ctb_x - i2_independent_ctb_x; 1513 ps_proc->i4_ctb_slice_y = ps_proc->i4_ctb_y - i2_independent_ctb_y; 1514 if(ps_proc->i4_ctb_slice_x < 0) 1515 { 1516 ps_proc->i4_ctb_slice_x += ps_sps->i2_pic_wd_in_ctb; 1517 ps_proc->i4_ctb_slice_y -= 1; 1518 } 1519 1520 /* Initialize ctb slice y to zero and at the start of slice row initialize it 1521 to difference between ctb_y and slice's start ctb y */ 1522 } 1523 } 1524 1525 /* Compute TU offset for the current CTB set */ 1526 { 1527 1528 WORD32 ctb_luma_min_tu_cnt; 1529 WORD32 ctb_addr; 1530 1531 ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x; 1532 1533 ctb_luma_min_tu_cnt = (1 << ps_sps->i1_log2_ctb_size) / MIN_TU_SIZE; 1534 ctb_luma_min_tu_cnt *= ctb_luma_min_tu_cnt; 1535 1536 ps_proc->pu1_tu_map = ps_proc->pu1_pic_tu_map 1537 + ctb_luma_min_tu_cnt * ctb_addr; 1538 if(1 == ps_codec->i4_num_cores) 1539 { 1540 ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr % RESET_TU_BUF_NCTB]; 1541 } 1542 else 1543 { 1544 ps_proc->ps_tu = ps_proc->ps_pic_tu + ps_proc->pu4_pic_tu_idx[ctb_addr]; 1545 } 1546 ps_proc->pv_tu_coeff_data = (UWORD8 *)ps_proc->pv_pic_tu_coeff_data 1547 + tu_coeff_data_ofst; 1548 1549 } 1550 1551 /* Compute PU related elements for the current CTB set */ 1552 { 1553 WORD32 pu_idx; 1554 ctb_addr = ps_proc->i4_ctb_y * num_ctb_in_row + ps_proc->i4_ctb_x; 1555 pu_idx = ps_proc->pu4_pic_pu_idx[ctb_addr]; 1556 ps_proc->pu1_pu_map = ps_proc->pu1_pic_pu_map 1557 + ctb_addr * num_minpu_in_ctb; 1558 ps_proc->ps_pu = ps_proc->ps_pic_pu + pu_idx; 1559 } 1560 1561 /* Number of ctbs processed in one loop of process function */ 1562 { 1563 ps_proc->i4_nctb = MIN(ps_codec->u4_nctb, ps_tile->u2_wd); 1564 } 1565 1566 } 1567 void ihevcd_process_thread(process_ctxt_t *ps_proc) 1568 { 1569 { 1570 ithread_set_affinity(ps_proc->i4_id + 1); 1571 } 1572 while(1) 1573 { 1574 IHEVCD_ERROR_T ret; 1575 proc_job_t s_job; 1576 1577 ret = ihevcd_jobq_dequeue((jobq_t *)ps_proc->pv_proc_jobq, &s_job, 1578 sizeof(proc_job_t), 1); 1579 if((IHEVCD_ERROR_T)IHEVCD_SUCCESS != ret) 1580 break; 1581 1582 ps_proc->i4_ctb_cnt = s_job.i2_ctb_cnt; 1583 ps_proc->i4_ctb_x = s_job.i2_ctb_x; 1584 ps_proc->i4_ctb_y = s_job.i2_ctb_y; 1585 ps_proc->i4_cur_slice_idx = s_job.i2_slice_idx; 1586 1587 1588 1589 if(CMD_PROCESS == s_job.i4_cmd) 1590 { 1591 ihevcd_init_proc_ctxt(ps_proc, s_job.i4_tu_coeff_data_ofst); 1592 ihevcd_process(ps_proc); 1593 } 1594 else if(CMD_FMTCONV == s_job.i4_cmd) 1595 { 1596 sps_t *ps_sps; 1597 codec_t *ps_codec; 1598 ivd_out_bufdesc_t *ps_out_buffer; 1599 WORD32 num_rows; 1600 1601 if(0 == ps_proc->i4_init_done) 1602 { 1603 ihevcd_init_proc_ctxt(ps_proc, 0); 1604 } 1605 ps_sps = ps_proc->ps_sps; 1606 ps_codec = ps_proc->ps_codec; 1607 ps_out_buffer = ps_proc->ps_out_buffer; 1608 num_rows = 1 << ps_sps->i1_log2_ctb_size; 1609 1610 num_rows = MIN(num_rows, (ps_codec->i4_disp_ht - (s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size))); 1611 1612 if(num_rows < 0) 1613 num_rows = 0; 1614 1615 ihevcd_fmt_conv(ps_proc->ps_codec, ps_proc, ps_out_buffer->pu1_bufs[0], ps_out_buffer->pu1_bufs[1], ps_out_buffer->pu1_bufs[2], 1616 s_job.i2_ctb_y << ps_sps->i1_log2_ctb_size, num_rows); 1617 } 1618 } 1619 //ithread_exit(0); 1620 return; 1621 } 1622 1623
