/dalvik/dx/tests/101-verify-wide-math/ |
run | 51 oneop lshr
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/external/llvm/unittests/IR/ |
ConstantRangeTest.cpp | 484 TEST_F(ConstantRangeTest, Lshr) { 485 EXPECT_EQ(Full.lshr(Full), Full); 486 EXPECT_EQ(Full.lshr(Empty), Empty); 487 EXPECT_EQ(Full.lshr(One), ConstantRange(APInt(16, 0), 489 EXPECT_EQ(Full.lshr(Some), ConstantRange(APInt(16, 0), 491 EXPECT_EQ(Full.lshr(Wrap), Full); 492 EXPECT_EQ(Empty.lshr(Empty), Empty); 493 EXPECT_EQ(Empty.lshr(One), Empty); 494 EXPECT_EQ(Empty.lshr(Some), Empty); 495 EXPECT_EQ(Empty.lshr(Wrap), Empty) [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMAddressingModes.h | 612 uint32_t Sign = Imm.lshr(31).getZExtValue() & 1; 613 int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127 640 uint64_t Sign = Imm.lshr(63).getZExtValue() & 1; 641 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023
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/external/llvm/include/llvm/IR/ |
ConstantRange.h | 247 /// lshr - Return a new range representing the possible values resulting 250 ConstantRange lshr(const ConstantRange &Other) const;
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64AddressingModes.h | 375 uint32_t Sign = Imm.lshr(31).getZExtValue() & 1; 376 int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127 403 uint64_t Sign = Imm.lshr(63).getZExtValue() & 1; 404 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023
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/external/llvm/lib/Transforms/InstCombine/ |
InstCombineSimplifyDemanded.cpp | 610 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt)); 630 case Instruction::LShr: 647 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); 648 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); 694 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); 695 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); 700 SignBit = APIntOps::lshr(SignBit, ShiftAmt); [all...] |
InstCombineShifts.cpp | 66 /// %F = lshr i128 %E, 64 90 // lshr iff we know that the bits we would otherwise be shifting in are 141 case Instruction::LShr: { 146 // We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2). 149 // We can always turn lshr(c)+shl(c) -> and(c2). 154 // We can always turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but it isn't 233 // We turn shl(c)+lshr(c) -> and(c2) if the input doesn't already hav [all...] |
/external/llvm/include/llvm/ADT/ |
APInt.h | 536 return getAllOnesValue(numBits).lshr(numBits - loBitsSet); 847 APInt LLVM_ATTRIBUTE_UNUSED_RESULT lshr(unsigned shiftAmt) const; 876 APInt LLVM_ATTRIBUTE_UNUSED_RESULT lshr(const APInt &shiftAmt) const; [all...] |
APSInt.h | 109 return IsUnsigned ? APSInt(lshr(Amt), true) : APSInt(ashr(Amt), false);
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/external/llvm/lib/Support/ |
APInt.cpp | 673 return APIntOps::lshr(*this, BitWidth - numBits); 678 return APIntOps::lshr(APIntOps::shl(*this, BitWidth - numBits), [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
TargetLowering.cpp | 633 if (SimplifyDemandedBits(InOp, NewMask.lshr(ShAmt), 643 if (ShAmt < InnerBits && NewMask.lshr(InnerBits) == 0 && 669 NewMask.lshr(InnerBits - InnerShAmt + ShAmt) == 0 && 726 KnownZero = KnownZero.lshr(ShAmt); 727 KnownOne = KnownOne.lshr(ShAmt); 763 KnownZero = KnownZero.lshr(ShAmt) [all...] |
SelectionDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/utils/vim/ |
llvm.vim | 30 syn keyword llvmStatement inttoptr invoke landingpad load lshr malloc max min
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/external/llvm/lib/IR/ |
ConstantRange.cpp | 699 ConstantRange::lshr(const ConstantRange &Other) const { function in class:ConstantRange 703 APInt max = getUnsignedMax().lshr(Other.getUnsignedMin()); 704 APInt min = getUnsignedMin().lshr(Other.getUnsignedMax());
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ConstantFold.cpp | 211 V = V.lshr(ByteStart*8); 252 case Instruction::LShr: { [all...] |
/external/clang/lib/CodeGen/ |
CGExprConstant.cpp | 187 Tmp = Tmp.lshr(NewFieldWidth); 196 FieldValue = FieldValue.lshr(BitsInPreviousByte); 254 FieldValue.lshr(FieldValue.getBitWidth() - CharWidth).trunc(CharWidth); 259 FieldValue = FieldValue.lshr(CharWidth); [all...] |
/external/llvm/lib/Analysis/ |
ValueTracking.cpp | 486 case Instruction::LShr: 494 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); 495 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); 509 KnownZero = APIntOps::lshr(KnownZero, ShiftAmt); 510 KnownOne = APIntOps::lshr(KnownOne, ShiftAmt); [all...] |
LazyValueInfo.cpp | 744 case Instruction::LShr: 745 Result.markConstantRange(LHSRange.lshr(RHSRange)); [all...] |
InstructionSimplify.cpp | [all...] |
ScalarEvolution.cpp | 755 Mult = Mult.lshr(TwoFactors); [all...] |
/external/llvm/lib/AsmParser/ |
LLLexer.cpp | 704 INSTKEYWORD(shl, Shl); INSTKEYWORD(lshr, LShr); INSTKEYWORD(ashr, AShr);
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/external/llvm/lib/ExecutionEngine/Interpreter/ |
Execution.cpp | [all...] |
/external/llvm/unittests/ADT/ |
APIntTest.cpp | 152 EXPECT_EQ(zero, one.lshr(1));
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/external/llvm/lib/Target/AArch64/ |
AArch64ISelDAGToDAG.cpp | [all...] |