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      1 /*
      2  * Copyright (C) 2014 The Android Open Source Project
      3  *
      4  * Licensed under the Apache License, Version 2.0 (the "License");
      5  * you may not use this file except in compliance with the License.
      6  * You may obtain a copy of the License at
      7  *
      8  *      http://www.apache.org/licenses/LICENSE-2.0
      9  *
     10  * Unless required by applicable law or agreed to in writing, software
     11  * distributed under the License is distributed on an "AS IS" BASIS,
     12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13  * See the License for the specific language governing permissions and
     14  * limitations under the License.
     15  */
     16 
     17 #ifndef ART_COMPILER_DEX_REG_LOCATION_H_
     18 #define ART_COMPILER_DEX_REG_LOCATION_H_
     19 
     20 #include "reg_storage.h"
     21 
     22 namespace art {
     23 
     24 
     25 /*
     26  * Whereas a SSA name describes a definition of a Dalvik vreg, the RegLocation describes
     27  * the type of an SSA name (and, can also be used by code generators to record where the
     28  * value is located (i.e. - physical register, frame, spill, etc.).  For each SSA name (SReg)
     29  * there is a RegLocation.
     30  * A note on SSA names:
     31  *   o SSA names for Dalvik vRegs v0..vN will be assigned 0..N.  These represent the "vN_0"
     32  *     names.  Negative SSA names represent special values not present in the Dalvik byte code.
     33  *     For example, SSA name -1 represents an invalid SSA name, and SSA name -2 represents the
     34  *     the Method pointer.  SSA names < -2 are reserved for future use.
     35  *   o The vN_0 names for non-argument Dalvik should in practice never be used (as they would
     36  *     represent the read of an undefined local variable).  The first definition of the
     37  *     underlying Dalvik vReg will result in a vN_1 name.
     38  *
     39  * FIXME: The orig_sreg field was added as a workaround for llvm bitcode generation.  With
     40  * the latest restructuring, we should be able to remove it and rely on s_reg_low throughout.
     41  */
     42 struct RegLocation {
     43   RegLocationType location:3;
     44   unsigned wide:1;
     45   unsigned defined:1;   // Do we know the type?
     46   unsigned is_const:1;  // Constant, value in mir_graph->constant_values[].
     47   unsigned fp:1;        // Floating point?
     48   unsigned core:1;      // Non-floating point?
     49   unsigned ref:1;       // Something GC cares about.
     50   unsigned high_word:1;  // High word of pair?
     51   unsigned home:1;      // Does this represent the home location?
     52   RegStorage reg;       // Encoded physical registers.
     53   int16_t s_reg_low;    // SSA name for low Dalvik word.
     54   int16_t orig_sreg;    // TODO: remove after Bitcode gen complete
     55                         // and consolidate usage w/ s_reg_low.
     56 };
     57 
     58 }  // namespace art
     59 
     60 #endif  // ART_COMPILER_DEX_REG_LOCATION_H_
     61