1 /* 2 * Copyright (C) 2013 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 #ifndef BIONIC_ATOMIC_AARCH64_H 17 #define BIONIC_ATOMIC_AARCH64_H 18 19 /* For ARMv8, we can use the 'dmb' instruction directly */ 20 __ATOMIC_INLINE__ void __bionic_memory_barrier() { 21 __asm__ __volatile__ ( "dmb ish" : : : "memory" ); 22 } 23 24 /* Compare-and-swap, without any explicit barriers. Note that this function 25 * returns 0 on success, and 1 on failure. The opposite convention is typically 26 * used on other platforms. 27 */ 28 __ATOMIC_INLINE__ int __bionic_cmpxchg(int32_t old_value, int32_t new_value, volatile int32_t* ptr) { 29 int32_t tmp, oldval; 30 __asm__ __volatile__ ( 31 "// atomic_cmpxchg\n" 32 "1: ldxr %w1, [%3]\n" 33 " cmp %w1, %w4\n" 34 " b.ne 2f\n" 35 " stxr %w0, %w5, [%3]\n" 36 " cbnz %w0, 1b\n" 37 "2:" 38 : "=&r" (tmp), "=&r" (oldval), "+o"(*ptr) 39 : "r" (ptr), "Ir" (old_value), "r" (new_value) 40 : "cc", "memory"); 41 return oldval != old_value; 42 } 43 44 /* Swap, without any explicit barriers. */ 45 __ATOMIC_INLINE__ int32_t __bionic_swap(int32_t new_value, volatile int32_t* ptr) { 46 int32_t prev, status; 47 __asm__ __volatile__ ( 48 "// atomic_swap\n" 49 "1: ldxr %w0, [%3]\n" 50 " stxr %w1, %w4, [%3]\n" 51 " cbnz %w1, 1b\n" 52 : "=&r" (prev), "=&r" (status), "+o" (*ptr) 53 : "r" (ptr), "r" (new_value) 54 : "cc", "memory"); 55 return prev; 56 } 57 58 /* Atomic decrement, without explicit barriers. */ 59 __ATOMIC_INLINE__ int32_t __bionic_atomic_dec(volatile int32_t* ptr) { 60 int32_t prev, tmp, status; 61 __asm__ __volatile__ ( 62 "1: ldxr %w0, [%4]\n" 63 " sub %w1, %w0, #1\n" 64 " stxr %w2, %w1, [%4]\n" 65 " cbnz %w2, 1b" 66 : "=&r" (prev), "=&r" (tmp), "=&r" (status), "+m"(*ptr) 67 : "r" (ptr) 68 : "cc", "memory"); 69 return prev; 70 } 71 72 #endif /* BIONIC_ATOMICS_AARCH64_H */ 73
