1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPI_LINUX_PERF_EVENT_H 20 #define _UAPI_LINUX_PERF_EVENT_H 21 #include <linux/types.h> 22 #include <linux/ioctl.h> 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #include <asm/byteorder.h> 25 enum perf_type_id { 26 PERF_TYPE_HARDWARE = 0, 27 PERF_TYPE_SOFTWARE = 1, 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 PERF_TYPE_TRACEPOINT = 2, 30 PERF_TYPE_HW_CACHE = 3, 31 PERF_TYPE_RAW = 4, 32 PERF_TYPE_BREAKPOINT = 5, 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 PERF_TYPE_MAX, 35 }; 36 enum perf_hw_id { 37 PERF_COUNT_HW_CPU_CYCLES = 0, 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 PERF_COUNT_HW_INSTRUCTIONS = 1, 40 PERF_COUNT_HW_CACHE_REFERENCES = 2, 41 PERF_COUNT_HW_CACHE_MISSES = 3, 42 PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 PERF_COUNT_HW_BRANCH_MISSES = 5, 45 PERF_COUNT_HW_BUS_CYCLES = 6, 46 PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, 47 PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 PERF_COUNT_HW_REF_CPU_CYCLES = 9, 50 PERF_COUNT_HW_MAX, 51 }; 52 enum perf_hw_cache_id { 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 PERF_COUNT_HW_CACHE_L1D = 0, 55 PERF_COUNT_HW_CACHE_L1I = 1, 56 PERF_COUNT_HW_CACHE_LL = 2, 57 PERF_COUNT_HW_CACHE_DTLB = 3, 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 PERF_COUNT_HW_CACHE_ITLB = 4, 60 PERF_COUNT_HW_CACHE_BPU = 5, 61 PERF_COUNT_HW_CACHE_NODE = 6, 62 PERF_COUNT_HW_CACHE_MAX, 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 }; 65 enum perf_hw_cache_op_id { 66 PERF_COUNT_HW_CACHE_OP_READ = 0, 67 PERF_COUNT_HW_CACHE_OP_WRITE = 1, 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, 70 PERF_COUNT_HW_CACHE_OP_MAX, 71 }; 72 enum perf_hw_cache_op_result_id { 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, 75 PERF_COUNT_HW_CACHE_RESULT_MISS = 1, 76 PERF_COUNT_HW_CACHE_RESULT_MAX, 77 }; 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 enum perf_sw_ids { 80 PERF_COUNT_SW_CPU_CLOCK = 0, 81 PERF_COUNT_SW_TASK_CLOCK = 1, 82 PERF_COUNT_SW_PAGE_FAULTS = 2, 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 PERF_COUNT_SW_CONTEXT_SWITCHES = 3, 85 PERF_COUNT_SW_CPU_MIGRATIONS = 4, 86 PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, 87 PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, 90 PERF_COUNT_SW_EMULATION_FAULTS = 8, 91 PERF_COUNT_SW_MAX, 92 }; 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 enum perf_event_sample_format { 95 PERF_SAMPLE_IP = 1U << 0, 96 PERF_SAMPLE_TID = 1U << 1, 97 PERF_SAMPLE_TIME = 1U << 2, 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 PERF_SAMPLE_ADDR = 1U << 3, 100 PERF_SAMPLE_READ = 1U << 4, 101 PERF_SAMPLE_CALLCHAIN = 1U << 5, 102 PERF_SAMPLE_ID = 1U << 6, 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 PERF_SAMPLE_CPU = 1U << 7, 105 PERF_SAMPLE_PERIOD = 1U << 8, 106 PERF_SAMPLE_STREAM_ID = 1U << 9, 107 PERF_SAMPLE_RAW = 1U << 10, 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 PERF_SAMPLE_BRANCH_STACK = 1U << 11, 110 PERF_SAMPLE_REGS_USER = 1U << 12, 111 PERF_SAMPLE_STACK_USER = 1U << 13, 112 PERF_SAMPLE_WEIGHT = 1U << 14, 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 PERF_SAMPLE_DATA_SRC = 1U << 15, 115 PERF_SAMPLE_MAX = 1U << 16, 116 }; 117 enum perf_branch_sample_type { 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 PERF_SAMPLE_BRANCH_USER = 1U << 0, 120 PERF_SAMPLE_BRANCH_KERNEL = 1U << 1, 121 PERF_SAMPLE_BRANCH_HV = 1U << 2, 122 PERF_SAMPLE_BRANCH_ANY = 1U << 3, 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, 125 PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, 126 PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, 127 PERF_SAMPLE_BRANCH_MAX = 1U << 7, 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 }; 130 #define PERF_SAMPLE_BRANCH_PLM_ALL (PERF_SAMPLE_BRANCH_USER| PERF_SAMPLE_BRANCH_KERNEL| PERF_SAMPLE_BRANCH_HV) 131 enum perf_sample_regs_abi { 132 PERF_SAMPLE_REGS_ABI_NONE = 0, 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 PERF_SAMPLE_REGS_ABI_32 = 1, 135 PERF_SAMPLE_REGS_ABI_64 = 2, 136 }; 137 enum perf_event_read_format { 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, 140 PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, 141 PERF_FORMAT_ID = 1U << 2, 142 PERF_FORMAT_GROUP = 1U << 3, 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 PERF_FORMAT_MAX = 1U << 4, 145 }; 146 #define PERF_ATTR_SIZE_VER0 64 147 #define PERF_ATTR_SIZE_VER1 72 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 #define PERF_ATTR_SIZE_VER2 80 150 #define PERF_ATTR_SIZE_VER3 96 151 struct perf_event_attr { 152 __u32 type; 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 __u32 size; 155 __u64 config; 156 union { 157 __u64 sample_period; 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 __u64 sample_freq; 160 }; 161 __u64 sample_type; 162 __u64 read_format; 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 __u64 disabled : 1, 165 inherit : 1, 166 pinned : 1, 167 exclusive : 1, 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 exclude_user : 1, 170 exclude_kernel : 1, 171 exclude_hv : 1, 172 exclude_idle : 1, 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 mmap : 1, 175 comm : 1, 176 freq : 1, 177 inherit_stat : 1, 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 enable_on_exec : 1, 180 task : 1, 181 watermark : 1, 182 precise_ip : 2, 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 mmap_data : 1, 185 sample_id_all : 1, 186 exclude_host : 1, 187 exclude_guest : 1, 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 exclude_callchain_kernel : 1, 190 exclude_callchain_user : 1, 191 __reserved_1 : 41; 192 union { 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 __u32 wakeup_events; 195 __u32 wakeup_watermark; 196 }; 197 __u32 bp_type; 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 union { 200 __u64 bp_addr; 201 __u64 config1; 202 }; 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 union { 205 __u64 bp_len; 206 __u64 config2; 207 }; 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 __u64 branch_sample_type; 210 __u64 sample_regs_user; 211 __u32 sample_stack_user; 212 __u32 __reserved_2; 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 }; 215 #define perf_flags(attr) (*(&(attr)->read_format + 1)) 216 #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) 217 #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) 218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 219 #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) 220 #define PERF_EVENT_IOC_RESET _IO ('$', 3) 221 #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) 222 #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) 223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 224 #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) 225 enum perf_event_ioc_flags { 226 PERF_IOC_FLAG_GROUP = 1U << 0, 227 }; 228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 229 struct perf_event_mmap_page { 230 __u32 version; 231 __u32 compat_version; 232 __u32 lock; 233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 234 __u32 index; 235 __s64 offset; 236 __u64 time_enabled; 237 __u64 time_running; 238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 239 union { 240 __u64 capabilities; 241 __u64 cap_usr_time : 1, 242 cap_usr_rdpmc : 1, 243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 244 cap_____res : 62; 245 }; 246 __u16 pmc_width; 247 __u16 time_shift; 248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 249 __u32 time_mult; 250 __u64 time_offset; 251 __u64 __reserved[120]; 252 __u64 data_head; 253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 254 __u64 data_tail; 255 }; 256 #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) 257 #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) 258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 259 #define PERF_RECORD_MISC_KERNEL (1 << 0) 260 #define PERF_RECORD_MISC_USER (2 << 0) 261 #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) 262 #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) 263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 264 #define PERF_RECORD_MISC_GUEST_USER (5 << 0) 265 #define PERF_RECORD_MISC_MMAP_DATA (1 << 13) 266 #define PERF_RECORD_MISC_EXACT_IP (1 << 14) 267 #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) 268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 269 struct perf_event_header { 270 __u32 type; 271 __u16 misc; 272 __u16 size; 273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 274 }; 275 enum perf_event_type { 276 PERF_RECORD_MMAP = 1, 277 PERF_RECORD_LOST = 2, 278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 279 PERF_RECORD_COMM = 3, 280 PERF_RECORD_EXIT = 4, 281 PERF_RECORD_THROTTLE = 5, 282 PERF_RECORD_UNTHROTTLE = 6, 283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 284 PERF_RECORD_FORK = 7, 285 PERF_RECORD_READ = 8, 286 PERF_RECORD_SAMPLE = 9, 287 PERF_RECORD_MAX, 288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 289 }; 290 #define PERF_MAX_STACK_DEPTH 127 291 enum perf_callchain_context { 292 PERF_CONTEXT_HV = (__u64)-32, 293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 294 PERF_CONTEXT_KERNEL = (__u64)-128, 295 PERF_CONTEXT_USER = (__u64)-512, 296 PERF_CONTEXT_GUEST = (__u64)-2048, 297 PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, 298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 299 PERF_CONTEXT_GUEST_USER = (__u64)-2560, 300 PERF_CONTEXT_MAX = (__u64)-4095, 301 }; 302 #define PERF_FLAG_FD_NO_GROUP (1U << 0) 303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 304 #define PERF_FLAG_FD_OUTPUT (1U << 1) 305 #define PERF_FLAG_PID_CGROUP (1U << 2) 306 union perf_mem_data_src { 307 __u64 val; 308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 309 struct { 310 __u64 mem_op:5, 311 mem_lvl:14, 312 mem_snoop:5, 313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 314 mem_lock:2, 315 mem_dtlb:7, 316 mem_rsvd:31; 317 }; 318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 319 }; 320 #define PERF_MEM_OP_NA 0x01 321 #define PERF_MEM_OP_LOAD 0x02 322 #define PERF_MEM_OP_STORE 0x04 323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 324 #define PERF_MEM_OP_PFETCH 0x08 325 #define PERF_MEM_OP_EXEC 0x10 326 #define PERF_MEM_OP_SHIFT 0 327 #define PERF_MEM_LVL_NA 0x01 328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 329 #define PERF_MEM_LVL_HIT 0x02 330 #define PERF_MEM_LVL_MISS 0x04 331 #define PERF_MEM_LVL_L1 0x08 332 #define PERF_MEM_LVL_LFB 0x10 333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 334 #define PERF_MEM_LVL_L2 0x20 335 #define PERF_MEM_LVL_L3 0x40 336 #define PERF_MEM_LVL_LOC_RAM 0x80 337 #define PERF_MEM_LVL_REM_RAM1 0x100 338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 339 #define PERF_MEM_LVL_REM_RAM2 0x200 340 #define PERF_MEM_LVL_REM_CCE1 0x400 341 #define PERF_MEM_LVL_REM_CCE2 0x800 342 #define PERF_MEM_LVL_IO 0x1000 343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 344 #define PERF_MEM_LVL_UNC 0x2000 345 #define PERF_MEM_LVL_SHIFT 5 346 #define PERF_MEM_SNOOP_NA 0x01 347 #define PERF_MEM_SNOOP_NONE 0x02 348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 349 #define PERF_MEM_SNOOP_HIT 0x04 350 #define PERF_MEM_SNOOP_MISS 0x08 351 #define PERF_MEM_SNOOP_HITM 0x10 352 #define PERF_MEM_SNOOP_SHIFT 19 353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 354 #define PERF_MEM_LOCK_NA 0x01 355 #define PERF_MEM_LOCK_LOCKED 0x02 356 #define PERF_MEM_LOCK_SHIFT 24 357 #define PERF_MEM_TLB_NA 0x01 358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 359 #define PERF_MEM_TLB_HIT 0x02 360 #define PERF_MEM_TLB_MISS 0x04 361 #define PERF_MEM_TLB_L1 0x08 362 #define PERF_MEM_TLB_L2 0x10 363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 364 #define PERF_MEM_TLB_WK 0x20 365 #define PERF_MEM_TLB_OS 0x40 366 #define PERF_MEM_TLB_SHIFT 26 367 #define PERF_MEM_S(a, s) (((u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) 368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 369 #endif 370
