1 ;; ######################################################################## 2 ;; Macros 3 ;; ######################################################################## 4 5 ; descriptor type, base, limit, p_dpl_s, g_db_a 6 %macro descriptor 5 7 dw %3 ; Limit 15-0 8 dw %2 ; Base 15-0 9 db %2 >> 16 ; Base 23-16 10 db ((%4 & 0xF) << 4) | (%1 & 0xF ) ; p_dpl_s_type 11 db (%5 << 4) | ((%3 & 0xF0000) >> 16) ; g_db_a limit 19:16 12 db %2 >> 24 ; Base 31-24 13 %endmacro 14 15 ; cdesc64 base, limit, dpl 16 %macro cdesc64 3 17 descriptor 0xB, %1, %2, 0x9 | (%3 & 0x3) << 1, 0xD 18 %endmacro 19 20 ; gates type, offset, selector, p_dpl_s 21 %macro gates 4 22 dw %2 ; Offset 15-00 23 dw %3 ; Selector 24 db 0 ; Ist 25 db ((%4 & 0xF) << 4) | (%1 & 0xF) ; p_dpl_s_type 26 dw %2 >> 16 ; Offset 31-16 27 dd %2 >> 32 ; Offset 63-32 28 %endmacro 29 30 ; idesc64 offset, selector, ring 31 %macro idesc64 3 32 gates 0xE, %1, %2, 0x8 | ((%3 & 0x3) << 1) 33 %endmacro 34 35 36 ; pageDirectory2M addr, nx, a, pcd, pwt, u, w, p 37 %macro pageDirectory2M 8 38 db %2 << 7 39 dw %1 >> 40 40 dd %1 >> 8 41 db (%3 << 5) | (%4 << 4) | (%5 << 3) | (%6 << 2) | (%7 << 1) | %8 42 %endmacro 43 44 ; pageEntry2M addr, nx, pat, g, d, a, pcd, pwt, u, w, p 45 %macro pageEntry2M 11 46 db %2 << 7 47 db %1 >> 48 48 dd %1 >> 16 49 dw (%3 << 12) | (%4 << 8) | (%5 << 6) | (%6 << 5) | (%7 << 4) | (%8 << 3) | (%9 << 2) | (%10 << 1) | %11 | 0x80 50 %endmacro 51 52 53 ;; ######################################################################## 54 ;; Code Section 55 ;; ######################################################################## 56 57 SECTION CODE ABSOLUTE=0xFFFFFFFF00000000 FLAT USE64 58 59 test_code: 60 61 ;; Your Code Goes Here 62 add r8, r15 63 64 hlt 65 66 ;; ######################################################################## 67 ;; Setup Section 68 ;; ######################################################################## 69 70 SECTION SETUP ALIGN=16 FLAT USE16 71 72 setup: 73 74 xor edx, edx ; Enable Var MTRRs 75 mov eax, 0x0806 ; WriteBack 76 mov ecx, 0x2FF 77 wrmsr 78 79 mov ebx, cr0 80 or ebx, 0x00000021 ; Protect Mode On, Int 16 for FPU 81 and ebx, 0x9FFFFFFF ; Turn Caches on 82 mov cr0, ebx 83 84 mov edx, cr4 85 or edx, 0x00000620 ; Enable PAE, SSE OSFXSR, SEE OSXMMEXCPT 86 mov cr4, edx 87 88 mov edx, pageMapL4 ; load pagetables 89 mov cr3, edx 90 91 mov ecx, 0x80000080 92 rdmsr ; Read EFER 93 bts eax, 8 ; Enable Long Mode (LME=1) 94 wrmsr ; Write EFER 95 96 bts ebx, 31 ; Enable Paging (PG=1) 97 mov cr0, ebx 98 99 ;; At this point LME=1, PAE=1, PG=1, CS.L=0, CS.D=0 100 101 lgdt [pgdt] ; Set GDT 102 lidt [pidt] ; Set IDT 103 104 jmp 0x8 : long_mode 105 106 long_mode: 107 108 BITS 64 109 110 mov rax, qword test_code ; jmp to testcode 111 jmp [rax] 112 113 114 115 ;; ######################################################################## 116 ;; Long Mode IDT 117 ;; ######################################################################## 118 119 SECTION IDTP ALIGN=16 FLAT USE64 120 121 ;; cdesc32 base, limit, dpl 122 gdt0: dq 0 ; 0x0000 - Null descriptor 123 cdesc64 zero, 0xFFFFF, 0 ; 0x0008 - Code Selector 124 gdt_: 125 126 ;; idesc64 offset, selector, dpl 127 idt0: idesc64 isrL, 0x0008, 0 ; 0x00, 0 #DE, Divide Error 128 idesc64 isrL, 0x0008, 0 ; 0x01, 1 #DB, Debug Fault 129 idesc64 isrL, 0x0008, 0 ; 0x02, 2, ---, NMI 130 idesc64 isrL, 0x0008, 0 ; 0x03, 3, #BP, Breakpoint 131 idesc64 isrL, 0x0008, 0 ; 0x04, 4, #OF, INTO detected Overflow 132 idesc64 isrL, 0x0008, 0 ; 0x05, 5, #BR, Bound Range Exceeded 133 idesc64 isrL, 0x0008, 0 ; 0x06, 6, #UD, Invalid Opcode 134 idesc64 isrL, 0x0008, 0 ; 0x07, 7, #NM, Device Not Available 135 idesc64 isrL, 0x0008, 0 ; 0x08, 8, #DF, Double Fault 136 idesc64 isrL, 0x0008, 0 ; 0x09 9, ---, Coprocessor Segment Overrun 137 idesc64 isrL, 0x0008, 0 ; 0x0A, 10, #TS, Invalid TSS 138 idesc64 isrL, 0x0008, 0 ; 0x0B, 11, #NP, Segment Not Present 139 idesc64 isrL, 0x0008, 0 ; 0x0C, 12, #SS, Stack Fault 140 idesc64 isrL, 0x0008, 0 ; 0x0D, 13, #GP, General Protection Fault 141 idesc64 isrL, 0x0008, 0 ; 0x0E, 14, #PF, Page Fault 142 idesc64 isrL, 0x0008, 0 ; 0x0F, 15, ---, Reserved 143 idesc64 isrL, 0x0008, 0 ; 0x10, 16, #MF, Floating Point Fault 144 idesc64 isrL, 0x0008, 0 ; 0x11, 17, #AC, Alignment Check 145 idesc64 isrL, 0x0008, 0 ; 0x12 18, #MC, Machine Check 146 idesc64 isrL, 0x0008, 0 ; 0x13, 19, #XF, SSE Fault 147 idt_: 148 149 pgdt: dw (gdt_ - gdt0) ; Limit 150 dd gdt0 ; base 151 152 pidt: dw (idt_ - idt0) ; Limit 153 dd idt0 ; base 154 155 isrL: mov eax, 0xDEADBEEF ; Default Interrupt Handler 156 out 0x80, eax 157 hlt 158 159 ;; ######################################################################## 160 ;; Real Mode IDT 161 ;; ######################################################################## 162 163 SECTION IDTR ABSOLUTE=0x00000000 FLAT USE16 164 165 ;; FORMAT IP:CS 166 zero: dw isrR, 0 ; 0x00, 0 #DE, Divide Error 167 dw isrR, 0 ; 0x01, 1 #DB, Debug Fault 168 dw isrR, 0 ; 0x02, 2, ---, NMI 169 dw isrR, 0 ; 0x03, 3, #BP, Breakpoint 170 dw isrR, 0 ; 0x04, 4, #OF, INTO detected Overflow 171 dw isrR, 0 ; 0x05, 5, #BR, Bound Range Exceeded 172 dw isrR, 0 ; 0x06, 6, #UD, Invalid Opcode 173 dw isrR, 0 ; 0x07, 7, #NM, Device Not Available 174 dw isrR, 0 ; 0x08, 8, #DF, Double Fault 175 dw isrR, 0 ; 0x09 9, ---, Coprocessor Segment Overrun 176 dw isrR, 0 ; 0x0A, 10, #TS, Invalid TSS 177 dw isrR, 0 ; 0x0B, 11, #NP, Segment Not Present 178 dw isrR, 0 ; 0x0C, 12, #SS, Stack Fault 179 dw isrR, 0 ; 0x0D, 13, #GP, General Protection Fault 180 dw isrR, 0 ; 0x0E, 14, #PF, Page Fault 181 dw isrR, 0 ; 0x0F, 15, ---, Reserved 182 dw isrR, 0 ; 0x10, 16, #MF, Floating Point Fault 183 dw isrR, 0 ; 0x11, 17, #AC, Alignment Check 184 dw isrR, 0 ; 0x12 18, #MC, Machine Check 185 dw isrR, 0 ; 0x13, 19, #XF, SSE Fault 186 187 isrR: mov eax, 0xDEADBEEF ; Default Real Interrupt Handler 188 out 0x80, eax 189 hlt 190 191 ;; ######################################################################## 192 ;; 2 Meg Page Tables 193 ;; ######################################################################## 194 195 SECTION PAGE ALIGN=4096 FLAT 196 197 pageDirE: 198 %assign addr 0 199 %rep 512 200 ; pageEntry addr, nx, pat, g, d, a, pcd, pwt, u, w, p 201 pageEntry2M addr, 0, 0, 0, 1, 1, 0, 0, 1, 1, 1 ; Accessed, WB, User, Writable, Present 202 %assign addr addr + 0x200000 203 %endrep 204 205 pageDirP: 206 %rep 512 207 ; pageDirPointer addr, nx, a, pcd, pwt, u, w, p 208 pageDirectory2M pageDirE, 0, 1, 0, 0, 1, 1, 1 ; Accessed, WB, User, Writable, Present 209 %endrep 210 211 pageMapL4: 212 %rep 512 213 ; pageDirectory addr, nx, a, pcd, pwt, u, w, p 214 pageDirectory2M pageDirP, 0, 1, 0, 0, 1, 1, 1 ; Accessed, WB, User, Writable, Present 215 %endrep 216 217 ;; ######################################################################## 218 ;; SMM Handler 219 ;; ######################################################################## 220 221 SECTION SMM ABSOLUTE=0x00038000 USE16 222 223 rsm 224 225 ;; ######################################################################## 226 ;; Reset Vector 227 ;; ######################################################################## 228 229 SECTION RESET ABSOLUTE=0xFFFFFFF0 USE16 230 231 jmp far setup 232
