1 /*===-- udivsi3.S - 32-bit unsigned integer divide ------------------------===// 2 * 3 * The LLVM Compiler Infrastructure 4 * 5 * This file is dual licensed under the MIT and the University of Illinois Open 6 * Source Licenses. See LICENSE.TXT for details. 7 * 8 *===----------------------------------------------------------------------===// 9 * 10 * This file implements the __udivsi3 (32-bit unsigned integer divide) 11 * function for the ARM 32-bit architecture. 12 * 13 *===----------------------------------------------------------------------===*/ 14 15 #include "../assembly.h" 16 17 .syntax unified 18 .text 19 20 .p2align 2 21 DEFINE_AEABI_FUNCTION_ALIAS(__aeabi_uidiv, __udivsi3) 22 DEFINE_COMPILERRT_FUNCTION(__udivsi3) 23 #if __ARM_ARCH_EXT_IDIV__ 24 tst r1, r1 25 beq LOCAL_LABEL(divby0) 26 mov r3, r0 27 udiv r0, r3, r1 28 mls r1, r0, r1, r3 29 bx lr 30 #else 31 cmp r1, #1 32 bcc LOCAL_LABEL(divby0) 33 JMPc(lr, eq) 34 cmp r0, r1 35 movcc r0, #0 36 JMPc(lr, cc) 37 /* 38 * Implement division using binary long division algorithm. 39 * 40 * r0 is the numerator, r1 the denominator. 41 * 42 * The code before JMP computes the correct shift I, so that 43 * r0 and (r1 << I) have the highest bit set in the same position. 44 * At the time of JMP, ip := .Ldiv0block - 12 * I. 45 * This depends on the fixed instruction size of block. 46 * 47 * block(shift) implements the test-and-update-quotient core. 48 * It assumes (r0 << shift) can be computed without overflow and 49 * that (r0 << shift) < 2 * r1. The quotient is stored in r3. 50 */ 51 52 # ifdef __ARM_FEATURE_CLZ 53 clz ip, r0 54 clz r3, r1 55 /* r0 >= r1 implies clz(r0) <= clz(r1), so ip <= r3. */ 56 sub r3, r3, ip 57 adr ip, LOCAL_LABEL(div0block) 58 sub ip, ip, r3, lsl #2 59 sub ip, ip, r3, lsl #3 60 mov r3, #0 61 bx ip 62 # else 63 mov r2, r0 64 adr ip, LOCAL_LABEL(div0block) 65 66 lsr r3, r2, #16 67 cmp r3, r1 68 movhs r2, r3 69 subhs ip, ip, #(16 * 12) 70 71 lsr r3, r2, #8 72 cmp r3, r1 73 movhs r2, r3 74 subhs ip, ip, #(8 * 12) 75 76 lsr r3, r2, #4 77 cmp r3, r1 78 movhs r2, r3 79 subhs ip, #(4 * 12) 80 81 lsr r3, r2, #2 82 cmp r3, r1 83 movhs r2, r3 84 subhs ip, ip, #(2 * 12) 85 86 /* Last block, no need to update r2 or r3. */ 87 cmp r1, r2, lsr #1 88 subls ip, ip, #(1 * 12) 89 90 mov r3, #0 91 92 JMP(ip) 93 # endif 94 95 #define IMM # 96 97 #define block(shift) \ 98 cmp r0, r1, lsl IMM shift; \ 99 addhs r3, r3, IMM (1 << shift); \ 100 subhs r0, r0, r1, lsl IMM shift 101 102 block(31) 103 block(30) 104 block(29) 105 block(28) 106 block(27) 107 block(26) 108 block(25) 109 block(24) 110 block(23) 111 block(22) 112 block(21) 113 block(20) 114 block(19) 115 block(18) 116 block(17) 117 block(16) 118 block(15) 119 block(14) 120 block(13) 121 block(12) 122 block(11) 123 block(10) 124 block(9) 125 block(8) 126 block(7) 127 block(6) 128 block(5) 129 block(4) 130 block(3) 131 block(2) 132 block(1) 133 LOCAL_LABEL(div0block): 134 block(0) 135 136 mov r0, r3 137 JMP(lr) 138 #endif /* __ARM_ARCH_EXT_IDIV__ */ 139 140 LOCAL_LABEL(divby0): 141 mov r0, #0 142 #ifdef __ARM_EABI__ 143 b __aeabi_idiv0 144 #else 145 JMP(lr) 146 #endif 147 148 END_COMPILERRT_FUNCTION(__udivsi3) 149
