1 //==- HexagonInstrFormats.td - Hexagon Instruction Formats --*- tablegen -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file describes the Hexagon V4 instruction classes in TableGen format. 11 // 12 //===----------------------------------------------------------------------===// 13 14 //----------------------------------------------------------------------------// 15 // Hexagon Instruction Flags 16 // 17 // *** Must match BaseInfo.h *** 18 //----------------------------------------------------------------------------// 19 20 def TypeMEMOP : IType<9>; 21 def TypeNV : IType<10>; 22 def TypePREFIX : IType<30>; 23 24 //----------------------------------------------------------------------------// 25 // Instruction Classes Definitions 26 //----------------------------------------------------------------------------// 27 28 // 29 // NV type instructions. 30 // 31 class NVInst<dag outs, dag ins, string asmstr, list<dag> pattern = [], 32 string cstr = "", InstrItinClass itin = NCJ_tc_3or4stall_SLOT0> 33 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeNV>; 34 35 class NVInst_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [], 36 string cstr = "", InstrItinClass itin = NCJ_tc_3or4stall_SLOT0> 37 : NVInst<outs, ins, asmstr, pattern, cstr, itin>; 38 39 // Definition of Post increment new value store. 40 class NVInstPost_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [], 41 string cstr = "", InstrItinClass itin = ST_tc_st_SLOT0> 42 : NVInst<outs, ins, asmstr, pattern, cstr, itin>; 43 44 // Post increment ST Instruction. 45 let mayStore = 1 in 46 class NVInstPI_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [], 47 string cstr = "", InstrItinClass itin = ST_tc_st_SLOT0> 48 : NVInst<outs, ins, asmstr, pattern, cstr, itin>; 49 50 // New-value conditional branch. 51 class NCJInst<dag outs, dag ins, string asmstr, list<dag> pattern = [], 52 string cstr = ""> 53 : NVInst<outs, ins, asmstr, pattern, cstr>; 54 55 let mayLoad = 1, mayStore = 1 in 56 class MEMInst<dag outs, dag ins, string asmstr, list<dag> pattern = [], 57 string cstr = "", InstrItinClass itin = V4LDST_tc_st_SLOT0> 58 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeMEMOP>; 59 60 class MEMInst_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [], 61 string cstr = "", InstrItinClass itin = V4LDST_tc_st_SLOT0> 62 : MEMInst<outs, ins, asmstr, pattern, cstr, itin>; 63 64 let isCodeGenOnly = 1 in 65 class EXTENDERInst<dag outs, dag ins, string asmstr, list<dag> pattern = []> 66 : InstHexagon<outs, ins, asmstr, pattern, "", EXTENDER_tc_1_SLOT0123, 67 TypePREFIX>; 68
