1 ; RUN: llc -O3 < %s -aarch64-atomic-cfg-tidy=0 | FileCheck %s 2 target triple = "arm64-apple-ios" 3 4 ; rdar://12462006 5 ; CSE between "icmp reg reg" and "sub reg reg". 6 ; Both can be in the same basic block or in different basic blocks. 7 define i8* @t1(i8* %base, i32* nocapture %offset, i32 %size) nounwind { 8 entry: 9 ; CHECK-LABEL: t1: 10 ; CHECK: subs 11 ; CHECK-NOT: cmp 12 ; CHECK-NOT: sub 13 ; CHECK: b.ge 14 ; CHECK: sub 15 ; CHECK: sub 16 ; CHECK-NOT: sub 17 ; CHECK: ret 18 %0 = load i32* %offset, align 4 19 %cmp = icmp slt i32 %0, %size 20 %s = sub nsw i32 %0, %size 21 br i1 %cmp, label %return, label %if.end 22 23 if.end: 24 %sub = sub nsw i32 %0, %size 25 %s2 = sub nsw i32 %s, %size 26 %s3 = sub nsw i32 %sub, %s2 27 store i32 %s3, i32* %offset, align 4 28 %add.ptr = getelementptr inbounds i8* %base, i32 %sub 29 br label %return 30 31 return: 32 %retval.0 = phi i8* [ %add.ptr, %if.end ], [ null, %entry ] 33 ret i8* %retval.0 34 } 35 36 ; CSE between "icmp reg imm" and "sub reg imm". 37 define i8* @t2(i8* %base, i32* nocapture %offset) nounwind { 38 entry: 39 ; CHECK-LABEL: t2: 40 ; CHECK: subs 41 ; CHECK-NOT: cmp 42 ; CHECK-NOT: sub 43 ; CHECK: b.lt 44 ; CHECK-NOT: sub 45 ; CHECK: ret 46 %0 = load i32* %offset, align 4 47 %cmp = icmp slt i32 %0, 1 48 br i1 %cmp, label %return, label %if.end 49 50 if.end: 51 %sub = sub nsw i32 %0, 1 52 store i32 %sub, i32* %offset, align 4 53 %add.ptr = getelementptr inbounds i8* %base, i32 %sub 54 br label %return 55 56 return: 57 %retval.0 = phi i8* [ %add.ptr, %if.end ], [ null, %entry ] 58 ret i8* %retval.0 59 } 60
