1 ; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK 2 3 %struct.int8x8x2_t = type { [2 x <8 x i8>] } 4 %struct.int16x4x2_t = type { [2 x <4 x i16>] } 5 %struct.int32x2x2_t = type { [2 x <2 x i32>] } 6 %struct.uint8x8x2_t = type { [2 x <8 x i8>] } 7 %struct.uint16x4x2_t = type { [2 x <4 x i16>] } 8 %struct.uint32x2x2_t = type { [2 x <2 x i32>] } 9 %struct.float32x2x2_t = type { [2 x <2 x float>] } 10 %struct.poly8x8x2_t = type { [2 x <8 x i8>] } 11 %struct.poly16x4x2_t = type { [2 x <4 x i16>] } 12 %struct.int8x16x2_t = type { [2 x <16 x i8>] } 13 %struct.int16x8x2_t = type { [2 x <8 x i16>] } 14 %struct.int32x4x2_t = type { [2 x <4 x i32>] } 15 %struct.uint8x16x2_t = type { [2 x <16 x i8>] } 16 %struct.uint16x8x2_t = type { [2 x <8 x i16>] } 17 %struct.uint32x4x2_t = type { [2 x <4 x i32>] } 18 %struct.float32x4x2_t = type { [2 x <4 x float>] } 19 %struct.poly8x16x2_t = type { [2 x <16 x i8>] } 20 %struct.poly16x8x2_t = type { [2 x <8 x i16>] } 21 22 define <8 x i8> @test_vuzp1_s8(<8 x i8> %a, <8 x i8> %b) { 23 ; CHECK-LABEL: test_vuzp1_s8: 24 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 25 entry: 26 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 27 ret <8 x i8> %shuffle.i 28 } 29 30 define <16 x i8> @test_vuzp1q_s8(<16 x i8> %a, <16 x i8> %b) { 31 ; CHECK-LABEL: test_vuzp1q_s8: 32 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 33 entry: 34 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 35 ret <16 x i8> %shuffle.i 36 } 37 38 define <4 x i16> @test_vuzp1_s16(<4 x i16> %a, <4 x i16> %b) { 39 ; CHECK-LABEL: test_vuzp1_s16: 40 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 41 entry: 42 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 43 ret <4 x i16> %shuffle.i 44 } 45 46 define <8 x i16> @test_vuzp1q_s16(<8 x i16> %a, <8 x i16> %b) { 47 ; CHECK-LABEL: test_vuzp1q_s16: 48 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 49 entry: 50 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 51 ret <8 x i16> %shuffle.i 52 } 53 54 define <2 x i32> @test_vuzp1_s32(<2 x i32> %a, <2 x i32> %b) { 55 ; CHECK-LABEL: test_vuzp1_s32: 56 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 57 entry: 58 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 59 ret <2 x i32> %shuffle.i 60 } 61 62 define <4 x i32> @test_vuzp1q_s32(<4 x i32> %a, <4 x i32> %b) { 63 ; CHECK-LABEL: test_vuzp1q_s32: 64 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 65 entry: 66 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 67 ret <4 x i32> %shuffle.i 68 } 69 70 define <2 x i64> @test_vuzp1q_s64(<2 x i64> %a, <2 x i64> %b) { 71 ; CHECK-LABEL: test_vuzp1q_s64: 72 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 73 entry: 74 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 75 ret <2 x i64> %shuffle.i 76 } 77 78 define <8 x i8> @test_vuzp1_u8(<8 x i8> %a, <8 x i8> %b) { 79 ; CHECK-LABEL: test_vuzp1_u8: 80 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 81 entry: 82 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 83 ret <8 x i8> %shuffle.i 84 } 85 86 define <16 x i8> @test_vuzp1q_u8(<16 x i8> %a, <16 x i8> %b) { 87 ; CHECK-LABEL: test_vuzp1q_u8: 88 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 89 entry: 90 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 91 ret <16 x i8> %shuffle.i 92 } 93 94 define <4 x i16> @test_vuzp1_u16(<4 x i16> %a, <4 x i16> %b) { 95 ; CHECK-LABEL: test_vuzp1_u16: 96 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 97 entry: 98 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 99 ret <4 x i16> %shuffle.i 100 } 101 102 define <8 x i16> @test_vuzp1q_u16(<8 x i16> %a, <8 x i16> %b) { 103 ; CHECK-LABEL: test_vuzp1q_u16: 104 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 105 entry: 106 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 107 ret <8 x i16> %shuffle.i 108 } 109 110 define <2 x i32> @test_vuzp1_u32(<2 x i32> %a, <2 x i32> %b) { 111 ; CHECK-LABEL: test_vuzp1_u32: 112 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 113 entry: 114 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 115 ret <2 x i32> %shuffle.i 116 } 117 118 define <4 x i32> @test_vuzp1q_u32(<4 x i32> %a, <4 x i32> %b) { 119 ; CHECK-LABEL: test_vuzp1q_u32: 120 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 121 entry: 122 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 123 ret <4 x i32> %shuffle.i 124 } 125 126 define <2 x i64> @test_vuzp1q_u64(<2 x i64> %a, <2 x i64> %b) { 127 ; CHECK-LABEL: test_vuzp1q_u64: 128 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 129 entry: 130 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 131 ret <2 x i64> %shuffle.i 132 } 133 134 define <2 x float> @test_vuzp1_f32(<2 x float> %a, <2 x float> %b) { 135 ; CHECK-LABEL: test_vuzp1_f32: 136 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 137 entry: 138 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 139 ret <2 x float> %shuffle.i 140 } 141 142 define <4 x float> @test_vuzp1q_f32(<4 x float> %a, <4 x float> %b) { 143 ; CHECK-LABEL: test_vuzp1q_f32: 144 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 145 entry: 146 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 147 ret <4 x float> %shuffle.i 148 } 149 150 define <2 x double> @test_vuzp1q_f64(<2 x double> %a, <2 x double> %b) { 151 ; CHECK-LABEL: test_vuzp1q_f64: 152 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 153 entry: 154 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2> 155 ret <2 x double> %shuffle.i 156 } 157 158 define <8 x i8> @test_vuzp1_p8(<8 x i8> %a, <8 x i8> %b) { 159 ; CHECK-LABEL: test_vuzp1_p8: 160 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 161 entry: 162 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 163 ret <8 x i8> %shuffle.i 164 } 165 166 define <16 x i8> @test_vuzp1q_p8(<16 x i8> %a, <16 x i8> %b) { 167 ; CHECK-LABEL: test_vuzp1q_p8: 168 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 169 entry: 170 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 171 ret <16 x i8> %shuffle.i 172 } 173 174 define <4 x i16> @test_vuzp1_p16(<4 x i16> %a, <4 x i16> %b) { 175 ; CHECK-LABEL: test_vuzp1_p16: 176 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 177 entry: 178 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 179 ret <4 x i16> %shuffle.i 180 } 181 182 define <8 x i16> @test_vuzp1q_p16(<8 x i16> %a, <8 x i16> %b) { 183 ; CHECK-LABEL: test_vuzp1q_p16: 184 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 185 entry: 186 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 187 ret <8 x i16> %shuffle.i 188 } 189 190 define <8 x i8> @test_vuzp2_s8(<8 x i8> %a, <8 x i8> %b) { 191 ; CHECK-LABEL: test_vuzp2_s8: 192 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 193 entry: 194 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 195 ret <8 x i8> %shuffle.i 196 } 197 198 define <16 x i8> @test_vuzp2q_s8(<16 x i8> %a, <16 x i8> %b) { 199 ; CHECK-LABEL: test_vuzp2q_s8: 200 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 201 entry: 202 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 203 ret <16 x i8> %shuffle.i 204 } 205 206 define <4 x i16> @test_vuzp2_s16(<4 x i16> %a, <4 x i16> %b) { 207 ; CHECK-LABEL: test_vuzp2_s16: 208 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 209 entry: 210 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 211 ret <4 x i16> %shuffle.i 212 } 213 214 define <8 x i16> @test_vuzp2q_s16(<8 x i16> %a, <8 x i16> %b) { 215 ; CHECK-LABEL: test_vuzp2q_s16: 216 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 217 entry: 218 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 219 ret <8 x i16> %shuffle.i 220 } 221 222 define <2 x i32> @test_vuzp2_s32(<2 x i32> %a, <2 x i32> %b) { 223 ; CHECK-LABEL: test_vuzp2_s32: 224 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 225 entry: 226 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 227 ret <2 x i32> %shuffle.i 228 } 229 230 define <4 x i32> @test_vuzp2q_s32(<4 x i32> %a, <4 x i32> %b) { 231 ; CHECK-LABEL: test_vuzp2q_s32: 232 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 233 entry: 234 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 235 ret <4 x i32> %shuffle.i 236 } 237 238 define <2 x i64> @test_vuzp2q_s64(<2 x i64> %a, <2 x i64> %b) { 239 ; CHECK-LABEL: test_vuzp2q_s64: 240 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 241 entry: 242 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 243 ret <2 x i64> %shuffle.i 244 } 245 246 define <8 x i8> @test_vuzp2_u8(<8 x i8> %a, <8 x i8> %b) { 247 ; CHECK-LABEL: test_vuzp2_u8: 248 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 249 entry: 250 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 251 ret <8 x i8> %shuffle.i 252 } 253 254 define <16 x i8> @test_vuzp2q_u8(<16 x i8> %a, <16 x i8> %b) { 255 ; CHECK-LABEL: test_vuzp2q_u8: 256 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 257 entry: 258 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 259 ret <16 x i8> %shuffle.i 260 } 261 262 define <4 x i16> @test_vuzp2_u16(<4 x i16> %a, <4 x i16> %b) { 263 ; CHECK-LABEL: test_vuzp2_u16: 264 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 265 entry: 266 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 267 ret <4 x i16> %shuffle.i 268 } 269 270 define <8 x i16> @test_vuzp2q_u16(<8 x i16> %a, <8 x i16> %b) { 271 ; CHECK-LABEL: test_vuzp2q_u16: 272 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 273 entry: 274 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 275 ret <8 x i16> %shuffle.i 276 } 277 278 define <2 x i32> @test_vuzp2_u32(<2 x i32> %a, <2 x i32> %b) { 279 ; CHECK-LABEL: test_vuzp2_u32: 280 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 281 entry: 282 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 283 ret <2 x i32> %shuffle.i 284 } 285 286 define <4 x i32> @test_vuzp2q_u32(<4 x i32> %a, <4 x i32> %b) { 287 ; CHECK-LABEL: test_vuzp2q_u32: 288 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 289 entry: 290 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 291 ret <4 x i32> %shuffle.i 292 } 293 294 define <2 x i64> @test_vuzp2q_u64(<2 x i64> %a, <2 x i64> %b) { 295 ; CHECK-LABEL: test_vuzp2q_u64: 296 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 297 entry: 298 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 299 ret <2 x i64> %shuffle.i 300 } 301 302 define <2 x float> @test_vuzp2_f32(<2 x float> %a, <2 x float> %b) { 303 ; CHECK-LABEL: test_vuzp2_f32: 304 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 305 entry: 306 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 307 ret <2 x float> %shuffle.i 308 } 309 310 define <4 x float> @test_vuzp2q_f32(<4 x float> %a, <4 x float> %b) { 311 ; CHECK-LABEL: test_vuzp2q_f32: 312 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 313 entry: 314 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 315 ret <4 x float> %shuffle.i 316 } 317 318 define <2 x double> @test_vuzp2q_f64(<2 x double> %a, <2 x double> %b) { 319 ; CHECK-LABEL: test_vuzp2q_f64: 320 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 321 entry: 322 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3> 323 ret <2 x double> %shuffle.i 324 } 325 326 define <8 x i8> @test_vuzp2_p8(<8 x i8> %a, <8 x i8> %b) { 327 ; CHECK-LABEL: test_vuzp2_p8: 328 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 329 entry: 330 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 331 ret <8 x i8> %shuffle.i 332 } 333 334 define <16 x i8> @test_vuzp2q_p8(<16 x i8> %a, <16 x i8> %b) { 335 ; CHECK-LABEL: test_vuzp2q_p8: 336 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 337 entry: 338 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 339 ret <16 x i8> %shuffle.i 340 } 341 342 define <4 x i16> @test_vuzp2_p16(<4 x i16> %a, <4 x i16> %b) { 343 ; CHECK-LABEL: test_vuzp2_p16: 344 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 345 entry: 346 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 347 ret <4 x i16> %shuffle.i 348 } 349 350 define <8 x i16> @test_vuzp2q_p16(<8 x i16> %a, <8 x i16> %b) { 351 ; CHECK-LABEL: test_vuzp2q_p16: 352 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 353 entry: 354 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 355 ret <8 x i16> %shuffle.i 356 } 357 358 define <8 x i8> @test_vzip1_s8(<8 x i8> %a, <8 x i8> %b) { 359 ; CHECK-LABEL: test_vzip1_s8: 360 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 361 entry: 362 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 363 ret <8 x i8> %shuffle.i 364 } 365 366 define <16 x i8> @test_vzip1q_s8(<16 x i8> %a, <16 x i8> %b) { 367 ; CHECK-LABEL: test_vzip1q_s8: 368 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 369 entry: 370 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 371 ret <16 x i8> %shuffle.i 372 } 373 374 define <4 x i16> @test_vzip1_s16(<4 x i16> %a, <4 x i16> %b) { 375 ; CHECK-LABEL: test_vzip1_s16: 376 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 377 entry: 378 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 379 ret <4 x i16> %shuffle.i 380 } 381 382 define <8 x i16> @test_vzip1q_s16(<8 x i16> %a, <8 x i16> %b) { 383 ; CHECK-LABEL: test_vzip1q_s16: 384 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 385 entry: 386 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 387 ret <8 x i16> %shuffle.i 388 } 389 390 define <2 x i32> @test_vzip1_s32(<2 x i32> %a, <2 x i32> %b) { 391 ; CHECK-LABEL: test_vzip1_s32: 392 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 393 entry: 394 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 395 ret <2 x i32> %shuffle.i 396 } 397 398 define <4 x i32> @test_vzip1q_s32(<4 x i32> %a, <4 x i32> %b) { 399 ; CHECK-LABEL: test_vzip1q_s32: 400 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 401 entry: 402 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 403 ret <4 x i32> %shuffle.i 404 } 405 406 define <2 x i64> @test_vzip1q_s64(<2 x i64> %a, <2 x i64> %b) { 407 ; CHECK-LABEL: test_vzip1q_s64: 408 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 409 entry: 410 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 411 ret <2 x i64> %shuffle.i 412 } 413 414 define <8 x i8> @test_vzip1_u8(<8 x i8> %a, <8 x i8> %b) { 415 ; CHECK-LABEL: test_vzip1_u8: 416 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 417 entry: 418 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 419 ret <8 x i8> %shuffle.i 420 } 421 422 define <16 x i8> @test_vzip1q_u8(<16 x i8> %a, <16 x i8> %b) { 423 ; CHECK-LABEL: test_vzip1q_u8: 424 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 425 entry: 426 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 427 ret <16 x i8> %shuffle.i 428 } 429 430 define <4 x i16> @test_vzip1_u16(<4 x i16> %a, <4 x i16> %b) { 431 ; CHECK-LABEL: test_vzip1_u16: 432 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 433 entry: 434 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 435 ret <4 x i16> %shuffle.i 436 } 437 438 define <8 x i16> @test_vzip1q_u16(<8 x i16> %a, <8 x i16> %b) { 439 ; CHECK-LABEL: test_vzip1q_u16: 440 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 441 entry: 442 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 443 ret <8 x i16> %shuffle.i 444 } 445 446 define <2 x i32> @test_vzip1_u32(<2 x i32> %a, <2 x i32> %b) { 447 ; CHECK-LABEL: test_vzip1_u32: 448 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 449 entry: 450 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 451 ret <2 x i32> %shuffle.i 452 } 453 454 define <4 x i32> @test_vzip1q_u32(<4 x i32> %a, <4 x i32> %b) { 455 ; CHECK-LABEL: test_vzip1q_u32: 456 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 457 entry: 458 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 459 ret <4 x i32> %shuffle.i 460 } 461 462 define <2 x i64> @test_vzip1q_u64(<2 x i64> %a, <2 x i64> %b) { 463 ; CHECK-LABEL: test_vzip1q_u64: 464 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 465 entry: 466 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 467 ret <2 x i64> %shuffle.i 468 } 469 470 define <2 x float> @test_vzip1_f32(<2 x float> %a, <2 x float> %b) { 471 ; CHECK-LABEL: test_vzip1_f32: 472 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 473 entry: 474 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 475 ret <2 x float> %shuffle.i 476 } 477 478 define <4 x float> @test_vzip1q_f32(<4 x float> %a, <4 x float> %b) { 479 ; CHECK-LABEL: test_vzip1q_f32: 480 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 481 entry: 482 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 483 ret <4 x float> %shuffle.i 484 } 485 486 define <2 x double> @test_vzip1q_f64(<2 x double> %a, <2 x double> %b) { 487 ; CHECK-LABEL: test_vzip1q_f64: 488 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 489 entry: 490 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2> 491 ret <2 x double> %shuffle.i 492 } 493 494 define <8 x i8> @test_vzip1_p8(<8 x i8> %a, <8 x i8> %b) { 495 ; CHECK-LABEL: test_vzip1_p8: 496 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 497 entry: 498 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 499 ret <8 x i8> %shuffle.i 500 } 501 502 define <16 x i8> @test_vzip1q_p8(<16 x i8> %a, <16 x i8> %b) { 503 ; CHECK-LABEL: test_vzip1q_p8: 504 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 505 entry: 506 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 507 ret <16 x i8> %shuffle.i 508 } 509 510 define <4 x i16> @test_vzip1_p16(<4 x i16> %a, <4 x i16> %b) { 511 ; CHECK-LABEL: test_vzip1_p16: 512 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 513 entry: 514 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 515 ret <4 x i16> %shuffle.i 516 } 517 518 define <8 x i16> @test_vzip1q_p16(<8 x i16> %a, <8 x i16> %b) { 519 ; CHECK-LABEL: test_vzip1q_p16: 520 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 521 entry: 522 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 523 ret <8 x i16> %shuffle.i 524 } 525 526 define <8 x i8> @test_vzip2_s8(<8 x i8> %a, <8 x i8> %b) { 527 ; CHECK-LABEL: test_vzip2_s8: 528 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 529 entry: 530 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 531 ret <8 x i8> %shuffle.i 532 } 533 534 define <16 x i8> @test_vzip2q_s8(<16 x i8> %a, <16 x i8> %b) { 535 ; CHECK-LABEL: test_vzip2q_s8: 536 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 537 entry: 538 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 539 ret <16 x i8> %shuffle.i 540 } 541 542 define <4 x i16> @test_vzip2_s16(<4 x i16> %a, <4 x i16> %b) { 543 ; CHECK-LABEL: test_vzip2_s16: 544 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 545 entry: 546 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 547 ret <4 x i16> %shuffle.i 548 } 549 550 define <8 x i16> @test_vzip2q_s16(<8 x i16> %a, <8 x i16> %b) { 551 ; CHECK-LABEL: test_vzip2q_s16: 552 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 553 entry: 554 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 555 ret <8 x i16> %shuffle.i 556 } 557 558 define <2 x i32> @test_vzip2_s32(<2 x i32> %a, <2 x i32> %b) { 559 ; CHECK-LABEL: test_vzip2_s32: 560 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 561 entry: 562 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 563 ret <2 x i32> %shuffle.i 564 } 565 566 define <4 x i32> @test_vzip2q_s32(<4 x i32> %a, <4 x i32> %b) { 567 ; CHECK-LABEL: test_vzip2q_s32: 568 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 569 entry: 570 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 571 ret <4 x i32> %shuffle.i 572 } 573 574 define <2 x i64> @test_vzip2q_s64(<2 x i64> %a, <2 x i64> %b) { 575 ; CHECK-LABEL: test_vzip2q_s64: 576 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 577 entry: 578 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 579 ret <2 x i64> %shuffle.i 580 } 581 582 define <8 x i8> @test_vzip2_u8(<8 x i8> %a, <8 x i8> %b) { 583 ; CHECK-LABEL: test_vzip2_u8: 584 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 585 entry: 586 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 587 ret <8 x i8> %shuffle.i 588 } 589 590 define <16 x i8> @test_vzip2q_u8(<16 x i8> %a, <16 x i8> %b) { 591 ; CHECK-LABEL: test_vzip2q_u8: 592 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 593 entry: 594 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 595 ret <16 x i8> %shuffle.i 596 } 597 598 define <4 x i16> @test_vzip2_u16(<4 x i16> %a, <4 x i16> %b) { 599 ; CHECK-LABEL: test_vzip2_u16: 600 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 601 entry: 602 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 603 ret <4 x i16> %shuffle.i 604 } 605 606 define <8 x i16> @test_vzip2q_u16(<8 x i16> %a, <8 x i16> %b) { 607 ; CHECK-LABEL: test_vzip2q_u16: 608 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 609 entry: 610 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 611 ret <8 x i16> %shuffle.i 612 } 613 614 define <2 x i32> @test_vzip2_u32(<2 x i32> %a, <2 x i32> %b) { 615 ; CHECK-LABEL: test_vzip2_u32: 616 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 617 entry: 618 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 619 ret <2 x i32> %shuffle.i 620 } 621 622 define <4 x i32> @test_vzip2q_u32(<4 x i32> %a, <4 x i32> %b) { 623 ; CHECK-LABEL: test_vzip2q_u32: 624 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 625 entry: 626 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 627 ret <4 x i32> %shuffle.i 628 } 629 630 define <2 x i64> @test_vzip2q_u64(<2 x i64> %a, <2 x i64> %b) { 631 ; CHECK-LABEL: test_vzip2q_u64: 632 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 633 entry: 634 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 635 ret <2 x i64> %shuffle.i 636 } 637 638 define <2 x float> @test_vzip2_f32(<2 x float> %a, <2 x float> %b) { 639 ; CHECK-LABEL: test_vzip2_f32: 640 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 641 entry: 642 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 643 ret <2 x float> %shuffle.i 644 } 645 646 define <4 x float> @test_vzip2q_f32(<4 x float> %a, <4 x float> %b) { 647 ; CHECK-LABEL: test_vzip2q_f32: 648 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 649 entry: 650 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 651 ret <4 x float> %shuffle.i 652 } 653 654 define <2 x double> @test_vzip2q_f64(<2 x double> %a, <2 x double> %b) { 655 ; CHECK-LABEL: test_vzip2q_f64: 656 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 657 entry: 658 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3> 659 ret <2 x double> %shuffle.i 660 } 661 662 define <8 x i8> @test_vzip2_p8(<8 x i8> %a, <8 x i8> %b) { 663 ; CHECK-LABEL: test_vzip2_p8: 664 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 665 entry: 666 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 667 ret <8 x i8> %shuffle.i 668 } 669 670 define <16 x i8> @test_vzip2q_p8(<16 x i8> %a, <16 x i8> %b) { 671 ; CHECK-LABEL: test_vzip2q_p8: 672 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 673 entry: 674 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 675 ret <16 x i8> %shuffle.i 676 } 677 678 define <4 x i16> @test_vzip2_p16(<4 x i16> %a, <4 x i16> %b) { 679 ; CHECK-LABEL: test_vzip2_p16: 680 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 681 entry: 682 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 683 ret <4 x i16> %shuffle.i 684 } 685 686 define <8 x i16> @test_vzip2q_p16(<8 x i16> %a, <8 x i16> %b) { 687 ; CHECK-LABEL: test_vzip2q_p16: 688 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 689 entry: 690 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 691 ret <8 x i16> %shuffle.i 692 } 693 694 define <8 x i8> @test_vtrn1_s8(<8 x i8> %a, <8 x i8> %b) { 695 ; CHECK-LABEL: test_vtrn1_s8: 696 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 697 entry: 698 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 699 ret <8 x i8> %shuffle.i 700 } 701 702 define <16 x i8> @test_vtrn1q_s8(<16 x i8> %a, <16 x i8> %b) { 703 ; CHECK-LABEL: test_vtrn1q_s8: 704 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 705 entry: 706 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 707 ret <16 x i8> %shuffle.i 708 } 709 710 define <4 x i16> @test_vtrn1_s16(<4 x i16> %a, <4 x i16> %b) { 711 ; CHECK-LABEL: test_vtrn1_s16: 712 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 713 entry: 714 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 715 ret <4 x i16> %shuffle.i 716 } 717 718 define <8 x i16> @test_vtrn1q_s16(<8 x i16> %a, <8 x i16> %b) { 719 ; CHECK-LABEL: test_vtrn1q_s16: 720 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 721 entry: 722 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 723 ret <8 x i16> %shuffle.i 724 } 725 726 define <2 x i32> @test_vtrn1_s32(<2 x i32> %a, <2 x i32> %b) { 727 ; CHECK-LABEL: test_vtrn1_s32: 728 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 729 entry: 730 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 731 ret <2 x i32> %shuffle.i 732 } 733 734 define <4 x i32> @test_vtrn1q_s32(<4 x i32> %a, <4 x i32> %b) { 735 ; CHECK-LABEL: test_vtrn1q_s32: 736 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 737 entry: 738 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 739 ret <4 x i32> %shuffle.i 740 } 741 742 define <2 x i64> @test_vtrn1q_s64(<2 x i64> %a, <2 x i64> %b) { 743 ; CHECK-LABEL: test_vtrn1q_s64: 744 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 745 entry: 746 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 747 ret <2 x i64> %shuffle.i 748 } 749 750 define <8 x i8> @test_vtrn1_u8(<8 x i8> %a, <8 x i8> %b) { 751 ; CHECK-LABEL: test_vtrn1_u8: 752 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 753 entry: 754 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 755 ret <8 x i8> %shuffle.i 756 } 757 758 define <16 x i8> @test_vtrn1q_u8(<16 x i8> %a, <16 x i8> %b) { 759 ; CHECK-LABEL: test_vtrn1q_u8: 760 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 761 entry: 762 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 763 ret <16 x i8> %shuffle.i 764 } 765 766 define <4 x i16> @test_vtrn1_u16(<4 x i16> %a, <4 x i16> %b) { 767 ; CHECK-LABEL: test_vtrn1_u16: 768 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 769 entry: 770 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 771 ret <4 x i16> %shuffle.i 772 } 773 774 define <8 x i16> @test_vtrn1q_u16(<8 x i16> %a, <8 x i16> %b) { 775 ; CHECK-LABEL: test_vtrn1q_u16: 776 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 777 entry: 778 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 779 ret <8 x i16> %shuffle.i 780 } 781 782 define <2 x i32> @test_vtrn1_u32(<2 x i32> %a, <2 x i32> %b) { 783 ; CHECK-LABEL: test_vtrn1_u32: 784 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 785 entry: 786 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 787 ret <2 x i32> %shuffle.i 788 } 789 790 define <4 x i32> @test_vtrn1q_u32(<4 x i32> %a, <4 x i32> %b) { 791 ; CHECK-LABEL: test_vtrn1q_u32: 792 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 793 entry: 794 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 795 ret <4 x i32> %shuffle.i 796 } 797 798 define <2 x i64> @test_vtrn1q_u64(<2 x i64> %a, <2 x i64> %b) { 799 ; CHECK-LABEL: test_vtrn1q_u64: 800 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 801 entry: 802 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 0, i32 2> 803 ret <2 x i64> %shuffle.i 804 } 805 806 define <2 x float> @test_vtrn1_f32(<2 x float> %a, <2 x float> %b) { 807 ; CHECK-LABEL: test_vtrn1_f32: 808 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 809 entry: 810 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 811 ret <2 x float> %shuffle.i 812 } 813 814 define <4 x float> @test_vtrn1q_f32(<4 x float> %a, <4 x float> %b) { 815 ; CHECK-LABEL: test_vtrn1q_f32: 816 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 817 entry: 818 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 819 ret <4 x float> %shuffle.i 820 } 821 822 define <2 x double> @test_vtrn1q_f64(<2 x double> %a, <2 x double> %b) { 823 ; CHECK-LABEL: test_vtrn1q_f64: 824 ; CHECK: zip1 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 825 entry: 826 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 2> 827 ret <2 x double> %shuffle.i 828 } 829 830 define <8 x i8> @test_vtrn1_p8(<8 x i8> %a, <8 x i8> %b) { 831 ; CHECK-LABEL: test_vtrn1_p8: 832 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 833 entry: 834 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 835 ret <8 x i8> %shuffle.i 836 } 837 838 define <16 x i8> @test_vtrn1q_p8(<16 x i8> %a, <16 x i8> %b) { 839 ; CHECK-LABEL: test_vtrn1q_p8: 840 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 841 entry: 842 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 843 ret <16 x i8> %shuffle.i 844 } 845 846 define <4 x i16> @test_vtrn1_p16(<4 x i16> %a, <4 x i16> %b) { 847 ; CHECK-LABEL: test_vtrn1_p16: 848 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 849 entry: 850 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 851 ret <4 x i16> %shuffle.i 852 } 853 854 define <8 x i16> @test_vtrn1q_p16(<8 x i16> %a, <8 x i16> %b) { 855 ; CHECK-LABEL: test_vtrn1q_p16: 856 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 857 entry: 858 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 859 ret <8 x i16> %shuffle.i 860 } 861 862 define <8 x i8> @test_vtrn2_s8(<8 x i8> %a, <8 x i8> %b) { 863 ; CHECK-LABEL: test_vtrn2_s8: 864 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 865 entry: 866 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 867 ret <8 x i8> %shuffle.i 868 } 869 870 define <16 x i8> @test_vtrn2q_s8(<16 x i8> %a, <16 x i8> %b) { 871 ; CHECK-LABEL: test_vtrn2q_s8: 872 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 873 entry: 874 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 875 ret <16 x i8> %shuffle.i 876 } 877 878 define <4 x i16> @test_vtrn2_s16(<4 x i16> %a, <4 x i16> %b) { 879 ; CHECK-LABEL: test_vtrn2_s16: 880 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 881 entry: 882 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 883 ret <4 x i16> %shuffle.i 884 } 885 886 define <8 x i16> @test_vtrn2q_s16(<8 x i16> %a, <8 x i16> %b) { 887 ; CHECK-LABEL: test_vtrn2q_s16: 888 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 889 entry: 890 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 891 ret <8 x i16> %shuffle.i 892 } 893 894 define <2 x i32> @test_vtrn2_s32(<2 x i32> %a, <2 x i32> %b) { 895 ; CHECK-LABEL: test_vtrn2_s32: 896 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 897 entry: 898 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 899 ret <2 x i32> %shuffle.i 900 } 901 902 define <4 x i32> @test_vtrn2q_s32(<4 x i32> %a, <4 x i32> %b) { 903 ; CHECK-LABEL: test_vtrn2q_s32: 904 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 905 entry: 906 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 907 ret <4 x i32> %shuffle.i 908 } 909 910 define <2 x i64> @test_vtrn2q_s64(<2 x i64> %a, <2 x i64> %b) { 911 ; CHECK-LABEL: test_vtrn2q_s64: 912 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 913 entry: 914 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 915 ret <2 x i64> %shuffle.i 916 } 917 918 define <8 x i8> @test_vtrn2_u8(<8 x i8> %a, <8 x i8> %b) { 919 ; CHECK-LABEL: test_vtrn2_u8: 920 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 921 entry: 922 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 923 ret <8 x i8> %shuffle.i 924 } 925 926 define <16 x i8> @test_vtrn2q_u8(<16 x i8> %a, <16 x i8> %b) { 927 ; CHECK-LABEL: test_vtrn2q_u8: 928 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 929 entry: 930 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 931 ret <16 x i8> %shuffle.i 932 } 933 934 define <4 x i16> @test_vtrn2_u16(<4 x i16> %a, <4 x i16> %b) { 935 ; CHECK-LABEL: test_vtrn2_u16: 936 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 937 entry: 938 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 939 ret <4 x i16> %shuffle.i 940 } 941 942 define <8 x i16> @test_vtrn2q_u16(<8 x i16> %a, <8 x i16> %b) { 943 ; CHECK-LABEL: test_vtrn2q_u16: 944 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 945 entry: 946 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 947 ret <8 x i16> %shuffle.i 948 } 949 950 define <2 x i32> @test_vtrn2_u32(<2 x i32> %a, <2 x i32> %b) { 951 ; CHECK-LABEL: test_vtrn2_u32: 952 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 953 entry: 954 %shuffle.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 955 ret <2 x i32> %shuffle.i 956 } 957 958 define <4 x i32> @test_vtrn2q_u32(<4 x i32> %a, <4 x i32> %b) { 959 ; CHECK-LABEL: test_vtrn2q_u32: 960 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 961 entry: 962 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 963 ret <4 x i32> %shuffle.i 964 } 965 966 define <2 x i64> @test_vtrn2q_u64(<2 x i64> %a, <2 x i64> %b) { 967 ; CHECK-LABEL: test_vtrn2q_u64: 968 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 969 entry: 970 %shuffle.i = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 3> 971 ret <2 x i64> %shuffle.i 972 } 973 974 define <2 x float> @test_vtrn2_f32(<2 x float> %a, <2 x float> %b) { 975 ; CHECK-LABEL: test_vtrn2_f32: 976 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 977 entry: 978 %shuffle.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 979 ret <2 x float> %shuffle.i 980 } 981 982 define <4 x float> @test_vtrn2q_f32(<4 x float> %a, <4 x float> %b) { 983 ; CHECK-LABEL: test_vtrn2q_f32: 984 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 985 entry: 986 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 987 ret <4 x float> %shuffle.i 988 } 989 990 define <2 x double> @test_vtrn2q_f64(<2 x double> %a, <2 x double> %b) { 991 ; CHECK-LABEL: test_vtrn2q_f64: 992 ; CHECK: zip2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 993 entry: 994 %shuffle.i = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 3> 995 ret <2 x double> %shuffle.i 996 } 997 998 define <8 x i8> @test_vtrn2_p8(<8 x i8> %a, <8 x i8> %b) { 999 ; CHECK-LABEL: test_vtrn2_p8: 1000 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1001 entry: 1002 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1003 ret <8 x i8> %shuffle.i 1004 } 1005 1006 define <16 x i8> @test_vtrn2q_p8(<16 x i8> %a, <16 x i8> %b) { 1007 ; CHECK-LABEL: test_vtrn2q_p8: 1008 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1009 entry: 1010 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1011 ret <16 x i8> %shuffle.i 1012 } 1013 1014 define <4 x i16> @test_vtrn2_p16(<4 x i16> %a, <4 x i16> %b) { 1015 ; CHECK-LABEL: test_vtrn2_p16: 1016 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1017 entry: 1018 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1019 ret <4 x i16> %shuffle.i 1020 } 1021 1022 define <8 x i16> @test_vtrn2q_p16(<8 x i16> %a, <8 x i16> %b) { 1023 ; CHECK-LABEL: test_vtrn2q_p16: 1024 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1025 entry: 1026 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1027 ret <8 x i16> %shuffle.i 1028 } 1029 1030 define <8 x i8> @test_same_vuzp1_s8(<8 x i8> %a) { 1031 ; CHECK-LABEL: test_same_vuzp1_s8: 1032 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1033 entry: 1034 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1035 ret <8 x i8> %shuffle.i 1036 } 1037 1038 define <16 x i8> @test_same_vuzp1q_s8(<16 x i8> %a) { 1039 ; CHECK-LABEL: test_same_vuzp1q_s8: 1040 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1041 entry: 1042 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1043 ret <16 x i8> %shuffle.i 1044 } 1045 1046 define <4 x i16> @test_same_vuzp1_s16(<4 x i16> %a) { 1047 ; CHECK-LABEL: test_same_vuzp1_s16: 1048 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1049 entry: 1050 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1051 ret <4 x i16> %shuffle.i 1052 } 1053 1054 define <8 x i16> @test_same_vuzp1q_s16(<8 x i16> %a) { 1055 ; CHECK-LABEL: test_same_vuzp1q_s16: 1056 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1057 entry: 1058 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1059 ret <8 x i16> %shuffle.i 1060 } 1061 1062 define <4 x i32> @test_same_vuzp1q_s32(<4 x i32> %a) { 1063 ; CHECK-LABEL: test_same_vuzp1q_s32: 1064 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1065 entry: 1066 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1067 ret <4 x i32> %shuffle.i 1068 } 1069 1070 define <8 x i8> @test_same_vuzp1_u8(<8 x i8> %a) { 1071 ; CHECK-LABEL: test_same_vuzp1_u8: 1072 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1073 entry: 1074 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1075 ret <8 x i8> %shuffle.i 1076 } 1077 1078 define <16 x i8> @test_same_vuzp1q_u8(<16 x i8> %a) { 1079 ; CHECK-LABEL: test_same_vuzp1q_u8: 1080 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1081 entry: 1082 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1083 ret <16 x i8> %shuffle.i 1084 } 1085 1086 define <4 x i16> @test_same_vuzp1_u16(<4 x i16> %a) { 1087 ; CHECK-LABEL: test_same_vuzp1_u16: 1088 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1089 entry: 1090 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1091 ret <4 x i16> %shuffle.i 1092 } 1093 1094 define <8 x i16> @test_same_vuzp1q_u16(<8 x i16> %a) { 1095 ; CHECK-LABEL: test_same_vuzp1q_u16: 1096 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1097 entry: 1098 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1099 ret <8 x i16> %shuffle.i 1100 } 1101 1102 define <4 x i32> @test_same_vuzp1q_u32(<4 x i32> %a) { 1103 ; CHECK-LABEL: test_same_vuzp1q_u32: 1104 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1105 entry: 1106 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1107 ret <4 x i32> %shuffle.i 1108 } 1109 1110 define <4 x float> @test_same_vuzp1q_f32(<4 x float> %a) { 1111 ; CHECK-LABEL: test_same_vuzp1q_f32: 1112 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1113 entry: 1114 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1115 ret <4 x float> %shuffle.i 1116 } 1117 1118 define <8 x i8> @test_same_vuzp1_p8(<8 x i8> %a) { 1119 ; CHECK-LABEL: test_same_vuzp1_p8: 1120 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1121 entry: 1122 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1123 ret <8 x i8> %shuffle.i 1124 } 1125 1126 define <16 x i8> @test_same_vuzp1q_p8(<16 x i8> %a) { 1127 ; CHECK-LABEL: test_same_vuzp1q_p8: 1128 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1129 entry: 1130 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1131 ret <16 x i8> %shuffle.i 1132 } 1133 1134 define <4 x i16> @test_same_vuzp1_p16(<4 x i16> %a) { 1135 ; CHECK-LABEL: test_same_vuzp1_p16: 1136 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1137 entry: 1138 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1139 ret <4 x i16> %shuffle.i 1140 } 1141 1142 define <8 x i16> @test_same_vuzp1q_p16(<8 x i16> %a) { 1143 ; CHECK-LABEL: test_same_vuzp1q_p16: 1144 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1145 entry: 1146 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1147 ret <8 x i16> %shuffle.i 1148 } 1149 1150 define <8 x i8> @test_same_vuzp2_s8(<8 x i8> %a) { 1151 ; CHECK-LABEL: test_same_vuzp2_s8: 1152 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1153 entry: 1154 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1155 ret <8 x i8> %shuffle.i 1156 } 1157 1158 define <16 x i8> @test_same_vuzp2q_s8(<16 x i8> %a) { 1159 ; CHECK-LABEL: test_same_vuzp2q_s8: 1160 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1161 entry: 1162 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1163 ret <16 x i8> %shuffle.i 1164 } 1165 1166 define <4 x i16> @test_same_vuzp2_s16(<4 x i16> %a) { 1167 ; CHECK-LABEL: test_same_vuzp2_s16: 1168 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1169 entry: 1170 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1171 ret <4 x i16> %shuffle.i 1172 } 1173 1174 define <8 x i16> @test_same_vuzp2q_s16(<8 x i16> %a) { 1175 ; CHECK-LABEL: test_same_vuzp2q_s16: 1176 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1177 entry: 1178 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1179 ret <8 x i16> %shuffle.i 1180 } 1181 1182 define <4 x i32> @test_same_vuzp2q_s32(<4 x i32> %a) { 1183 ; CHECK-LABEL: test_same_vuzp2q_s32: 1184 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1185 entry: 1186 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1187 ret <4 x i32> %shuffle.i 1188 } 1189 1190 define <8 x i8> @test_same_vuzp2_u8(<8 x i8> %a) { 1191 ; CHECK-LABEL: test_same_vuzp2_u8: 1192 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1193 entry: 1194 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1195 ret <8 x i8> %shuffle.i 1196 } 1197 1198 define <16 x i8> @test_same_vuzp2q_u8(<16 x i8> %a) { 1199 ; CHECK-LABEL: test_same_vuzp2q_u8: 1200 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1201 entry: 1202 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1203 ret <16 x i8> %shuffle.i 1204 } 1205 1206 define <4 x i16> @test_same_vuzp2_u16(<4 x i16> %a) { 1207 ; CHECK-LABEL: test_same_vuzp2_u16: 1208 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1209 entry: 1210 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1211 ret <4 x i16> %shuffle.i 1212 } 1213 1214 define <8 x i16> @test_same_vuzp2q_u16(<8 x i16> %a) { 1215 ; CHECK-LABEL: test_same_vuzp2q_u16: 1216 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1217 entry: 1218 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1219 ret <8 x i16> %shuffle.i 1220 } 1221 1222 define <4 x i32> @test_same_vuzp2q_u32(<4 x i32> %a) { 1223 ; CHECK-LABEL: test_same_vuzp2q_u32: 1224 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1225 entry: 1226 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1227 ret <4 x i32> %shuffle.i 1228 } 1229 1230 define <4 x float> @test_same_vuzp2q_f32(<4 x float> %a) { 1231 ; CHECK-LABEL: test_same_vuzp2q_f32: 1232 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1233 entry: 1234 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1235 ret <4 x float> %shuffle.i 1236 } 1237 1238 define <8 x i8> @test_same_vuzp2_p8(<8 x i8> %a) { 1239 ; CHECK-LABEL: test_same_vuzp2_p8: 1240 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1241 entry: 1242 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1243 ret <8 x i8> %shuffle.i 1244 } 1245 1246 define <16 x i8> @test_same_vuzp2q_p8(<16 x i8> %a) { 1247 ; CHECK-LABEL: test_same_vuzp2q_p8: 1248 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1249 entry: 1250 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1251 ret <16 x i8> %shuffle.i 1252 } 1253 1254 define <4 x i16> @test_same_vuzp2_p16(<4 x i16> %a) { 1255 ; CHECK-LABEL: test_same_vuzp2_p16: 1256 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1257 entry: 1258 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1259 ret <4 x i16> %shuffle.i 1260 } 1261 1262 define <8 x i16> @test_same_vuzp2q_p16(<8 x i16> %a) { 1263 ; CHECK-LABEL: test_same_vuzp2q_p16: 1264 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1265 entry: 1266 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1267 ret <8 x i16> %shuffle.i 1268 } 1269 1270 define <8 x i8> @test_same_vzip1_s8(<8 x i8> %a) { 1271 ; CHECK-LABEL: test_same_vzip1_s8: 1272 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1273 entry: 1274 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1275 ret <8 x i8> %shuffle.i 1276 } 1277 1278 define <16 x i8> @test_same_vzip1q_s8(<16 x i8> %a) { 1279 ; CHECK-LABEL: test_same_vzip1q_s8: 1280 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1281 entry: 1282 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 1283 ret <16 x i8> %shuffle.i 1284 } 1285 1286 define <4 x i16> @test_same_vzip1_s16(<4 x i16> %a) { 1287 ; CHECK-LABEL: test_same_vzip1_s16: 1288 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1289 entry: 1290 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1291 ret <4 x i16> %shuffle.i 1292 } 1293 1294 define <8 x i16> @test_same_vzip1q_s16(<8 x i16> %a) { 1295 ; CHECK-LABEL: test_same_vzip1q_s16: 1296 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1297 entry: 1298 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1299 ret <8 x i16> %shuffle.i 1300 } 1301 1302 define <4 x i32> @test_same_vzip1q_s32(<4 x i32> %a) { 1303 ; CHECK-LABEL: test_same_vzip1q_s32: 1304 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1305 entry: 1306 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1307 ret <4 x i32> %shuffle.i 1308 } 1309 1310 define <8 x i8> @test_same_vzip1_u8(<8 x i8> %a) { 1311 ; CHECK-LABEL: test_same_vzip1_u8: 1312 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1313 entry: 1314 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1315 ret <8 x i8> %shuffle.i 1316 } 1317 1318 define <16 x i8> @test_same_vzip1q_u8(<16 x i8> %a) { 1319 ; CHECK-LABEL: test_same_vzip1q_u8: 1320 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1321 entry: 1322 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 1323 ret <16 x i8> %shuffle.i 1324 } 1325 1326 define <4 x i16> @test_same_vzip1_u16(<4 x i16> %a) { 1327 ; CHECK-LABEL: test_same_vzip1_u16: 1328 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1329 entry: 1330 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1331 ret <4 x i16> %shuffle.i 1332 } 1333 1334 define <8 x i16> @test_same_vzip1q_u16(<8 x i16> %a) { 1335 ; CHECK-LABEL: test_same_vzip1q_u16: 1336 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1337 entry: 1338 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1339 ret <8 x i16> %shuffle.i 1340 } 1341 1342 define <4 x i32> @test_same_vzip1q_u32(<4 x i32> %a) { 1343 ; CHECK-LABEL: test_same_vzip1q_u32: 1344 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1345 entry: 1346 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1347 ret <4 x i32> %shuffle.i 1348 } 1349 1350 define <4 x float> @test_same_vzip1q_f32(<4 x float> %a) { 1351 ; CHECK-LABEL: test_same_vzip1q_f32: 1352 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1353 entry: 1354 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1355 ret <4 x float> %shuffle.i 1356 } 1357 1358 define <8 x i8> @test_same_vzip1_p8(<8 x i8> %a) { 1359 ; CHECK-LABEL: test_same_vzip1_p8: 1360 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1361 entry: 1362 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1363 ret <8 x i8> %shuffle.i 1364 } 1365 1366 define <16 x i8> @test_same_vzip1q_p8(<16 x i8> %a) { 1367 ; CHECK-LABEL: test_same_vzip1q_p8: 1368 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1369 entry: 1370 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 1371 ret <16 x i8> %shuffle.i 1372 } 1373 1374 define <4 x i16> @test_same_vzip1_p16(<4 x i16> %a) { 1375 ; CHECK-LABEL: test_same_vzip1_p16: 1376 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1377 entry: 1378 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 1379 ret <4 x i16> %shuffle.i 1380 } 1381 1382 define <8 x i16> @test_same_vzip1q_p16(<8 x i16> %a) { 1383 ; CHECK-LABEL: test_same_vzip1q_p16: 1384 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1385 entry: 1386 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1387 ret <8 x i16> %shuffle.i 1388 } 1389 1390 define <8 x i8> @test_same_vzip2_s8(<8 x i8> %a) { 1391 ; CHECK-LABEL: test_same_vzip2_s8: 1392 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1393 entry: 1394 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1395 ret <8 x i8> %shuffle.i 1396 } 1397 1398 define <16 x i8> @test_same_vzip2q_s8(<16 x i8> %a) { 1399 ; CHECK-LABEL: test_same_vzip2q_s8: 1400 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1401 entry: 1402 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 1403 ret <16 x i8> %shuffle.i 1404 } 1405 1406 define <4 x i16> @test_same_vzip2_s16(<4 x i16> %a) { 1407 ; CHECK-LABEL: test_same_vzip2_s16: 1408 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1409 entry: 1410 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1411 ret <4 x i16> %shuffle.i 1412 } 1413 1414 define <8 x i16> @test_same_vzip2q_s16(<8 x i16> %a) { 1415 ; CHECK-LABEL: test_same_vzip2q_s16: 1416 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1417 entry: 1418 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1419 ret <8 x i16> %shuffle.i 1420 } 1421 1422 define <4 x i32> @test_same_vzip2q_s32(<4 x i32> %a) { 1423 ; CHECK-LABEL: test_same_vzip2q_s32: 1424 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1425 entry: 1426 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1427 ret <4 x i32> %shuffle.i 1428 } 1429 1430 define <8 x i8> @test_same_vzip2_u8(<8 x i8> %a) { 1431 ; CHECK-LABEL: test_same_vzip2_u8: 1432 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1433 entry: 1434 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1435 ret <8 x i8> %shuffle.i 1436 } 1437 1438 define <16 x i8> @test_same_vzip2q_u8(<16 x i8> %a) { 1439 ; CHECK-LABEL: test_same_vzip2q_u8: 1440 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1441 entry: 1442 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 1443 ret <16 x i8> %shuffle.i 1444 } 1445 1446 define <4 x i16> @test_same_vzip2_u16(<4 x i16> %a) { 1447 ; CHECK-LABEL: test_same_vzip2_u16: 1448 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1449 entry: 1450 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1451 ret <4 x i16> %shuffle.i 1452 } 1453 1454 define <8 x i16> @test_same_vzip2q_u16(<8 x i16> %a) { 1455 ; CHECK-LABEL: test_same_vzip2q_u16: 1456 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1457 entry: 1458 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1459 ret <8 x i16> %shuffle.i 1460 } 1461 1462 define <4 x i32> @test_same_vzip2q_u32(<4 x i32> %a) { 1463 ; CHECK-LABEL: test_same_vzip2q_u32: 1464 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1465 entry: 1466 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1467 ret <4 x i32> %shuffle.i 1468 } 1469 1470 define <4 x float> @test_same_vzip2q_f32(<4 x float> %a) { 1471 ; CHECK-LABEL: test_same_vzip2q_f32: 1472 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1473 entry: 1474 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1475 ret <4 x float> %shuffle.i 1476 } 1477 1478 define <8 x i8> @test_same_vzip2_p8(<8 x i8> %a) { 1479 ; CHECK-LABEL: test_same_vzip2_p8: 1480 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1481 entry: 1482 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1483 ret <8 x i8> %shuffle.i 1484 } 1485 1486 define <16 x i8> @test_same_vzip2q_p8(<16 x i8> %a) { 1487 ; CHECK-LABEL: test_same_vzip2q_p8: 1488 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1489 entry: 1490 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 1491 ret <16 x i8> %shuffle.i 1492 } 1493 1494 define <4 x i16> @test_same_vzip2_p16(<4 x i16> %a) { 1495 ; CHECK-LABEL: test_same_vzip2_p16: 1496 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1497 entry: 1498 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 1499 ret <4 x i16> %shuffle.i 1500 } 1501 1502 define <8 x i16> @test_same_vzip2q_p16(<8 x i16> %a) { 1503 ; CHECK-LABEL: test_same_vzip2q_p16: 1504 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1505 entry: 1506 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 1507 ret <8 x i16> %shuffle.i 1508 } 1509 1510 define <8 x i8> @test_same_vtrn1_s8(<8 x i8> %a) { 1511 ; CHECK-LABEL: test_same_vtrn1_s8: 1512 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1513 entry: 1514 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1515 ret <8 x i8> %shuffle.i 1516 } 1517 1518 define <16 x i8> @test_same_vtrn1q_s8(<16 x i8> %a) { 1519 ; CHECK-LABEL: test_same_vtrn1q_s8: 1520 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1521 entry: 1522 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 1523 ret <16 x i8> %shuffle.i 1524 } 1525 1526 define <4 x i16> @test_same_vtrn1_s16(<4 x i16> %a) { 1527 ; CHECK-LABEL: test_same_vtrn1_s16: 1528 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1529 entry: 1530 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1531 ret <4 x i16> %shuffle.i 1532 } 1533 1534 define <8 x i16> @test_same_vtrn1q_s16(<8 x i16> %a) { 1535 ; CHECK-LABEL: test_same_vtrn1q_s16: 1536 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1537 entry: 1538 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1539 ret <8 x i16> %shuffle.i 1540 } 1541 1542 define <4 x i32> @test_same_vtrn1q_s32(<4 x i32> %a) { 1543 ; CHECK-LABEL: test_same_vtrn1q_s32: 1544 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1545 entry: 1546 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1547 ret <4 x i32> %shuffle.i 1548 } 1549 1550 define <8 x i8> @test_same_vtrn1_u8(<8 x i8> %a) { 1551 ; CHECK-LABEL: test_same_vtrn1_u8: 1552 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1553 entry: 1554 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1555 ret <8 x i8> %shuffle.i 1556 } 1557 1558 define <16 x i8> @test_same_vtrn1q_u8(<16 x i8> %a) { 1559 ; CHECK-LABEL: test_same_vtrn1q_u8: 1560 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1561 entry: 1562 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 1563 ret <16 x i8> %shuffle.i 1564 } 1565 1566 define <4 x i16> @test_same_vtrn1_u16(<4 x i16> %a) { 1567 ; CHECK-LABEL: test_same_vtrn1_u16: 1568 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1569 entry: 1570 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1571 ret <4 x i16> %shuffle.i 1572 } 1573 1574 define <8 x i16> @test_same_vtrn1q_u16(<8 x i16> %a) { 1575 ; CHECK-LABEL: test_same_vtrn1q_u16: 1576 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1577 entry: 1578 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1579 ret <8 x i16> %shuffle.i 1580 } 1581 1582 define <4 x i32> @test_same_vtrn1q_u32(<4 x i32> %a) { 1583 ; CHECK-LABEL: test_same_vtrn1q_u32: 1584 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1585 entry: 1586 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1587 ret <4 x i32> %shuffle.i 1588 } 1589 1590 define <4 x float> @test_same_vtrn1q_f32(<4 x float> %a) { 1591 ; CHECK-LABEL: test_same_vtrn1q_f32: 1592 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1593 entry: 1594 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1595 ret <4 x float> %shuffle.i 1596 } 1597 1598 define <8 x i8> @test_same_vtrn1_p8(<8 x i8> %a) { 1599 ; CHECK-LABEL: test_same_vtrn1_p8: 1600 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1601 entry: 1602 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1603 ret <8 x i8> %shuffle.i 1604 } 1605 1606 define <16 x i8> @test_same_vtrn1q_p8(<16 x i8> %a) { 1607 ; CHECK-LABEL: test_same_vtrn1q_p8: 1608 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1609 entry: 1610 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 1611 ret <16 x i8> %shuffle.i 1612 } 1613 1614 define <4 x i16> @test_same_vtrn1_p16(<4 x i16> %a) { 1615 ; CHECK-LABEL: test_same_vtrn1_p16: 1616 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1617 entry: 1618 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 1619 ret <4 x i16> %shuffle.i 1620 } 1621 1622 define <8 x i16> @test_same_vtrn1q_p16(<8 x i16> %a) { 1623 ; CHECK-LABEL: test_same_vtrn1q_p16: 1624 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1625 entry: 1626 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 1627 ret <8 x i16> %shuffle.i 1628 } 1629 1630 define <8 x i8> @test_same_vtrn2_s8(<8 x i8> %a) { 1631 ; CHECK-LABEL: test_same_vtrn2_s8: 1632 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1633 entry: 1634 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1635 ret <8 x i8> %shuffle.i 1636 } 1637 1638 define <16 x i8> @test_same_vtrn2q_s8(<16 x i8> %a) { 1639 ; CHECK-LABEL: test_same_vtrn2q_s8: 1640 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1641 entry: 1642 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1643 ret <16 x i8> %shuffle.i 1644 } 1645 1646 define <4 x i16> @test_same_vtrn2_s16(<4 x i16> %a) { 1647 ; CHECK-LABEL: test_same_vtrn2_s16: 1648 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1649 entry: 1650 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1651 ret <4 x i16> %shuffle.i 1652 } 1653 1654 define <8 x i16> @test_same_vtrn2q_s16(<8 x i16> %a) { 1655 ; CHECK-LABEL: test_same_vtrn2q_s16: 1656 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1657 entry: 1658 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1659 ret <8 x i16> %shuffle.i 1660 } 1661 1662 define <4 x i32> @test_same_vtrn2q_s32(<4 x i32> %a) { 1663 ; CHECK-LABEL: test_same_vtrn2q_s32: 1664 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1665 entry: 1666 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1667 ret <4 x i32> %shuffle.i 1668 } 1669 1670 define <8 x i8> @test_same_vtrn2_u8(<8 x i8> %a) { 1671 ; CHECK-LABEL: test_same_vtrn2_u8: 1672 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1673 entry: 1674 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1675 ret <8 x i8> %shuffle.i 1676 } 1677 1678 define <16 x i8> @test_same_vtrn2q_u8(<16 x i8> %a) { 1679 ; CHECK-LABEL: test_same_vtrn2q_u8: 1680 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1681 entry: 1682 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1683 ret <16 x i8> %shuffle.i 1684 } 1685 1686 define <4 x i16> @test_same_vtrn2_u16(<4 x i16> %a) { 1687 ; CHECK-LABEL: test_same_vtrn2_u16: 1688 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1689 entry: 1690 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1691 ret <4 x i16> %shuffle.i 1692 } 1693 1694 define <8 x i16> @test_same_vtrn2q_u16(<8 x i16> %a) { 1695 ; CHECK-LABEL: test_same_vtrn2q_u16: 1696 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1697 entry: 1698 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1699 ret <8 x i16> %shuffle.i 1700 } 1701 1702 define <4 x i32> @test_same_vtrn2q_u32(<4 x i32> %a) { 1703 ; CHECK-LABEL: test_same_vtrn2q_u32: 1704 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1705 entry: 1706 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1707 ret <4 x i32> %shuffle.i 1708 } 1709 1710 define <4 x float> @test_same_vtrn2q_f32(<4 x float> %a) { 1711 ; CHECK-LABEL: test_same_vtrn2q_f32: 1712 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1713 entry: 1714 %shuffle.i = shufflevector <4 x float> %a, <4 x float> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1715 ret <4 x float> %shuffle.i 1716 } 1717 1718 define <8 x i8> @test_same_vtrn2_p8(<8 x i8> %a) { 1719 ; CHECK-LABEL: test_same_vtrn2_p8: 1720 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1721 entry: 1722 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1723 ret <8 x i8> %shuffle.i 1724 } 1725 1726 define <16 x i8> @test_same_vtrn2q_p8(<16 x i8> %a) { 1727 ; CHECK-LABEL: test_same_vtrn2q_p8: 1728 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1729 entry: 1730 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> %a, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 1731 ret <16 x i8> %shuffle.i 1732 } 1733 1734 define <4 x i16> @test_same_vtrn2_p16(<4 x i16> %a) { 1735 ; CHECK-LABEL: test_same_vtrn2_p16: 1736 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1737 entry: 1738 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> %a, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 1739 ret <4 x i16> %shuffle.i 1740 } 1741 1742 define <8 x i16> @test_same_vtrn2q_p16(<8 x i16> %a) { 1743 ; CHECK-LABEL: test_same_vtrn2q_p16: 1744 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1745 entry: 1746 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> %a, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 1747 ret <8 x i16> %shuffle.i 1748 } 1749 1750 1751 define <8 x i8> @test_undef_vuzp1_s8(<8 x i8> %a) { 1752 ; CHECK-LABEL: test_undef_vuzp1_s8: 1753 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1754 entry: 1755 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1756 ret <8 x i8> %shuffle.i 1757 } 1758 1759 define <16 x i8> @test_undef_vuzp1q_s8(<16 x i8> %a) { 1760 ; CHECK-LABEL: test_undef_vuzp1q_s8: 1761 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1762 entry: 1763 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1764 ret <16 x i8> %shuffle.i 1765 } 1766 1767 define <4 x i16> @test_undef_vuzp1_s16(<4 x i16> %a) { 1768 ; CHECK-LABEL: test_undef_vuzp1_s16: 1769 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1770 entry: 1771 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1772 ret <4 x i16> %shuffle.i 1773 } 1774 1775 define <8 x i16> @test_undef_vuzp1q_s16(<8 x i16> %a) { 1776 ; CHECK-LABEL: test_undef_vuzp1q_s16: 1777 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1778 entry: 1779 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1780 ret <8 x i16> %shuffle.i 1781 } 1782 1783 define <4 x i32> @test_undef_vuzp1q_s32(<4 x i32> %a) { 1784 ; CHECK-LABEL: test_undef_vuzp1q_s32: 1785 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1786 entry: 1787 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1788 ret <4 x i32> %shuffle.i 1789 } 1790 1791 define <8 x i8> @test_undef_vuzp1_u8(<8 x i8> %a) { 1792 ; CHECK-LABEL: test_undef_vuzp1_u8: 1793 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1794 entry: 1795 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1796 ret <8 x i8> %shuffle.i 1797 } 1798 1799 define <16 x i8> @test_undef_vuzp1q_u8(<16 x i8> %a) { 1800 ; CHECK-LABEL: test_undef_vuzp1q_u8: 1801 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1802 entry: 1803 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1804 ret <16 x i8> %shuffle.i 1805 } 1806 1807 define <4 x i16> @test_undef_vuzp1_u16(<4 x i16> %a) { 1808 ; CHECK-LABEL: test_undef_vuzp1_u16: 1809 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1810 entry: 1811 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1812 ret <4 x i16> %shuffle.i 1813 } 1814 1815 define <8 x i16> @test_undef_vuzp1q_u16(<8 x i16> %a) { 1816 ; CHECK-LABEL: test_undef_vuzp1q_u16: 1817 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1818 entry: 1819 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1820 ret <8 x i16> %shuffle.i 1821 } 1822 1823 define <4 x i32> @test_undef_vuzp1q_u32(<4 x i32> %a) { 1824 ; CHECK-LABEL: test_undef_vuzp1q_u32: 1825 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1826 entry: 1827 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1828 ret <4 x i32> %shuffle.i 1829 } 1830 1831 define <4 x float> @test_undef_vuzp1q_f32(<4 x float> %a) { 1832 ; CHECK-LABEL: test_undef_vuzp1q_f32: 1833 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1834 entry: 1835 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1836 ret <4 x float> %shuffle.i 1837 } 1838 1839 define <8 x i8> @test_undef_vuzp1_p8(<8 x i8> %a) { 1840 ; CHECK-LABEL: test_undef_vuzp1_p8: 1841 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1842 entry: 1843 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1844 ret <8 x i8> %shuffle.i 1845 } 1846 1847 define <16 x i8> @test_undef_vuzp1q_p8(<16 x i8> %a) { 1848 ; CHECK-LABEL: test_undef_vuzp1q_p8: 1849 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1850 entry: 1851 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 1852 ret <16 x i8> %shuffle.i 1853 } 1854 1855 define <4 x i16> @test_undef_vuzp1_p16(<4 x i16> %a) { 1856 ; CHECK-LABEL: test_undef_vuzp1_p16: 1857 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1858 entry: 1859 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 1860 ret <4 x i16> %shuffle.i 1861 } 1862 1863 define <8 x i16> @test_undef_vuzp1q_p16(<8 x i16> %a) { 1864 ; CHECK-LABEL: test_undef_vuzp1q_p16: 1865 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1866 entry: 1867 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 1868 ret <8 x i16> %shuffle.i 1869 } 1870 1871 define <8 x i8> @test_undef_vuzp2_s8(<8 x i8> %a) { 1872 ; CHECK-LABEL: test_undef_vuzp2_s8: 1873 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1874 entry: 1875 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1876 ret <8 x i8> %shuffle.i 1877 } 1878 1879 define <16 x i8> @test_undef_vuzp2q_s8(<16 x i8> %a) { 1880 ; CHECK-LABEL: test_undef_vuzp2q_s8: 1881 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1882 entry: 1883 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1884 ret <16 x i8> %shuffle.i 1885 } 1886 1887 define <4 x i16> @test_undef_vuzp2_s16(<4 x i16> %a) { 1888 ; CHECK-LABEL: test_undef_vuzp2_s16: 1889 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1890 entry: 1891 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1892 ret <4 x i16> %shuffle.i 1893 } 1894 1895 define <8 x i16> @test_undef_vuzp2q_s16(<8 x i16> %a) { 1896 ; CHECK-LABEL: test_undef_vuzp2q_s16: 1897 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1898 entry: 1899 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1900 ret <8 x i16> %shuffle.i 1901 } 1902 1903 define <4 x i32> @test_undef_vuzp2q_s32(<4 x i32> %a) { 1904 ; CHECK-LABEL: test_undef_vuzp2q_s32: 1905 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1906 entry: 1907 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1908 ret <4 x i32> %shuffle.i 1909 } 1910 1911 define <8 x i8> @test_undef_vuzp2_u8(<8 x i8> %a) { 1912 ; CHECK-LABEL: test_undef_vuzp2_u8: 1913 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1914 entry: 1915 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1916 ret <8 x i8> %shuffle.i 1917 } 1918 1919 define <16 x i8> @test_undef_vuzp2q_u8(<16 x i8> %a) { 1920 ; CHECK-LABEL: test_undef_vuzp2q_u8: 1921 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1922 entry: 1923 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1924 ret <16 x i8> %shuffle.i 1925 } 1926 1927 define <4 x i16> @test_undef_vuzp2_u16(<4 x i16> %a) { 1928 ; CHECK-LABEL: test_undef_vuzp2_u16: 1929 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1930 entry: 1931 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1932 ret <4 x i16> %shuffle.i 1933 } 1934 1935 define <8 x i16> @test_undef_vuzp2q_u16(<8 x i16> %a) { 1936 ; CHECK-LABEL: test_undef_vuzp2q_u16: 1937 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1938 entry: 1939 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1940 ret <8 x i16> %shuffle.i 1941 } 1942 1943 define <4 x i32> @test_undef_vuzp2q_u32(<4 x i32> %a) { 1944 ; CHECK-LABEL: test_undef_vuzp2q_u32: 1945 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1946 entry: 1947 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1948 ret <4 x i32> %shuffle.i 1949 } 1950 1951 define <4 x float> @test_undef_vuzp2q_f32(<4 x float> %a) { 1952 ; CHECK-LABEL: test_undef_vuzp2q_f32: 1953 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 1954 entry: 1955 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1956 ret <4 x float> %shuffle.i 1957 } 1958 1959 define <8 x i8> @test_undef_vuzp2_p8(<8 x i8> %a) { 1960 ; CHECK-LABEL: test_undef_vuzp2_p8: 1961 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1962 entry: 1963 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1964 ret <8 x i8> %shuffle.i 1965 } 1966 1967 define <16 x i8> @test_undef_vuzp2q_p8(<16 x i8> %a) { 1968 ; CHECK-LABEL: test_undef_vuzp2q_p8: 1969 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 1970 entry: 1971 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 1972 ret <16 x i8> %shuffle.i 1973 } 1974 1975 define <4 x i16> @test_undef_vuzp2_p16(<4 x i16> %a) { 1976 ; CHECK-LABEL: test_undef_vuzp2_p16: 1977 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 1978 entry: 1979 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 1980 ret <4 x i16> %shuffle.i 1981 } 1982 1983 define <8 x i16> @test_undef_vuzp2q_p16(<8 x i16> %a) { 1984 ; CHECK-LABEL: test_undef_vuzp2q_p16: 1985 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 1986 entry: 1987 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 1988 ret <8 x i16> %shuffle.i 1989 } 1990 1991 define <8 x i8> @test_undef_vzip1_s8(<8 x i8> %a) { 1992 ; CHECK-LABEL: test_undef_vzip1_s8: 1993 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 1994 entry: 1995 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 1996 ret <8 x i8> %shuffle.i 1997 } 1998 1999 define <16 x i8> @test_undef_vzip1q_s8(<16 x i8> %a) { 2000 ; CHECK-LABEL: test_undef_vzip1q_s8: 2001 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2002 entry: 2003 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 2004 ret <16 x i8> %shuffle.i 2005 } 2006 2007 define <4 x i16> @test_undef_vzip1_s16(<4 x i16> %a) { 2008 ; CHECK-LABEL: test_undef_vzip1_s16: 2009 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2010 entry: 2011 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2012 ret <4 x i16> %shuffle.i 2013 } 2014 2015 define <8 x i16> @test_undef_vzip1q_s16(<8 x i16> %a) { 2016 ; CHECK-LABEL: test_undef_vzip1q_s16: 2017 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2018 entry: 2019 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2020 ret <8 x i16> %shuffle.i 2021 } 2022 2023 define <4 x i32> @test_undef_vzip1q_s32(<4 x i32> %a) { 2024 ; CHECK-LABEL: test_undef_vzip1q_s32: 2025 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2026 entry: 2027 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2028 ret <4 x i32> %shuffle.i 2029 } 2030 2031 define <8 x i8> @test_undef_vzip1_u8(<8 x i8> %a) { 2032 ; CHECK-LABEL: test_undef_vzip1_u8: 2033 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2034 entry: 2035 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2036 ret <8 x i8> %shuffle.i 2037 } 2038 2039 define <16 x i8> @test_undef_vzip1q_u8(<16 x i8> %a) { 2040 ; CHECK-LABEL: test_undef_vzip1q_u8: 2041 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2042 entry: 2043 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 2044 ret <16 x i8> %shuffle.i 2045 } 2046 2047 define <4 x i16> @test_undef_vzip1_u16(<4 x i16> %a) { 2048 ; CHECK-LABEL: test_undef_vzip1_u16: 2049 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2050 entry: 2051 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2052 ret <4 x i16> %shuffle.i 2053 } 2054 2055 define <8 x i16> @test_undef_vzip1q_u16(<8 x i16> %a) { 2056 ; CHECK-LABEL: test_undef_vzip1q_u16: 2057 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2058 entry: 2059 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2060 ret <8 x i16> %shuffle.i 2061 } 2062 2063 define <4 x i32> @test_undef_vzip1q_u32(<4 x i32> %a) { 2064 ; CHECK-LABEL: test_undef_vzip1q_u32: 2065 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2066 entry: 2067 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2068 ret <4 x i32> %shuffle.i 2069 } 2070 2071 define <4 x float> @test_undef_vzip1q_f32(<4 x float> %a) { 2072 ; CHECK-LABEL: test_undef_vzip1q_f32: 2073 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2074 entry: 2075 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2076 ret <4 x float> %shuffle.i 2077 } 2078 2079 define <8 x i8> @test_undef_vzip1_p8(<8 x i8> %a) { 2080 ; CHECK-LABEL: test_undef_vzip1_p8: 2081 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2082 entry: 2083 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2084 ret <8 x i8> %shuffle.i 2085 } 2086 2087 define <16 x i8> @test_undef_vzip1q_p8(<16 x i8> %a) { 2088 ; CHECK-LABEL: test_undef_vzip1q_p8: 2089 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2090 entry: 2091 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 2092 ret <16 x i8> %shuffle.i 2093 } 2094 2095 define <4 x i16> @test_undef_vzip1_p16(<4 x i16> %a) { 2096 ; CHECK-LABEL: test_undef_vzip1_p16: 2097 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2098 entry: 2099 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2100 ret <4 x i16> %shuffle.i 2101 } 2102 2103 define <8 x i16> @test_undef_vzip1q_p16(<8 x i16> %a) { 2104 ; CHECK-LABEL: test_undef_vzip1q_p16: 2105 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2106 entry: 2107 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2108 ret <8 x i16> %shuffle.i 2109 } 2110 2111 define <8 x i8> @test_undef_vzip2_s8(<8 x i8> %a) { 2112 ; CHECK-LABEL: test_undef_vzip2_s8: 2113 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2114 entry: 2115 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2116 ret <8 x i8> %shuffle.i 2117 } 2118 2119 define <16 x i8> @test_undef_vzip2q_s8(<16 x i8> %a) { 2120 ; CHECK-LABEL: test_undef_vzip2q_s8: 2121 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2122 entry: 2123 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 2124 ret <16 x i8> %shuffle.i 2125 } 2126 2127 define <4 x i16> @test_undef_vzip2_s16(<4 x i16> %a) { 2128 ; CHECK-LABEL: test_undef_vzip2_s16: 2129 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2130 entry: 2131 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2132 ret <4 x i16> %shuffle.i 2133 } 2134 2135 define <8 x i16> @test_undef_vzip2q_s16(<8 x i16> %a) { 2136 ; CHECK-LABEL: test_undef_vzip2q_s16: 2137 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2138 entry: 2139 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2140 ret <8 x i16> %shuffle.i 2141 } 2142 2143 define <4 x i32> @test_undef_vzip2q_s32(<4 x i32> %a) { 2144 ; CHECK-LABEL: test_undef_vzip2q_s32: 2145 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2146 entry: 2147 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2148 ret <4 x i32> %shuffle.i 2149 } 2150 2151 define <8 x i8> @test_undef_vzip2_u8(<8 x i8> %a) { 2152 ; CHECK-LABEL: test_undef_vzip2_u8: 2153 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2154 entry: 2155 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2156 ret <8 x i8> %shuffle.i 2157 } 2158 2159 define <16 x i8> @test_undef_vzip2q_u8(<16 x i8> %a) { 2160 ; CHECK-LABEL: test_undef_vzip2q_u8: 2161 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2162 entry: 2163 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 2164 ret <16 x i8> %shuffle.i 2165 } 2166 2167 define <4 x i16> @test_undef_vzip2_u16(<4 x i16> %a) { 2168 ; CHECK-LABEL: test_undef_vzip2_u16: 2169 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2170 entry: 2171 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2172 ret <4 x i16> %shuffle.i 2173 } 2174 2175 define <8 x i16> @test_undef_vzip2q_u16(<8 x i16> %a) { 2176 ; CHECK-LABEL: test_undef_vzip2q_u16: 2177 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2178 entry: 2179 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2180 ret <8 x i16> %shuffle.i 2181 } 2182 2183 define <4 x i32> @test_undef_vzip2q_u32(<4 x i32> %a) { 2184 ; CHECK-LABEL: test_undef_vzip2q_u32: 2185 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2186 entry: 2187 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2188 ret <4 x i32> %shuffle.i 2189 } 2190 2191 define <4 x float> @test_undef_vzip2q_f32(<4 x float> %a) { 2192 ; CHECK-LABEL: test_undef_vzip2q_f32: 2193 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2194 entry: 2195 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2196 ret <4 x float> %shuffle.i 2197 } 2198 2199 define <8 x i8> @test_undef_vzip2_p8(<8 x i8> %a) { 2200 ; CHECK-LABEL: test_undef_vzip2_p8: 2201 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2202 entry: 2203 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2204 ret <8 x i8> %shuffle.i 2205 } 2206 2207 define <16 x i8> @test_undef_vzip2q_p8(<16 x i8> %a) { 2208 ; CHECK-LABEL: test_undef_vzip2q_p8: 2209 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2210 entry: 2211 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 2212 ret <16 x i8> %shuffle.i 2213 } 2214 2215 define <4 x i16> @test_undef_vzip2_p16(<4 x i16> %a) { 2216 ; CHECK-LABEL: test_undef_vzip2_p16: 2217 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2218 entry: 2219 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2220 ret <4 x i16> %shuffle.i 2221 } 2222 2223 define <8 x i16> @test_undef_vzip2q_p16(<8 x i16> %a) { 2224 ; CHECK-LABEL: test_undef_vzip2q_p16: 2225 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2226 entry: 2227 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2228 ret <8 x i16> %shuffle.i 2229 } 2230 2231 define <8 x i8> @test_undef_vtrn1_s8(<8 x i8> %a) { 2232 ; CHECK-LABEL: test_undef_vtrn1_s8: 2233 ; CHECK: ret 2234 entry: 2235 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2236 ret <8 x i8> %shuffle.i 2237 } 2238 2239 define <16 x i8> @test_undef_vtrn1q_s8(<16 x i8> %a) { 2240 ; CHECK-LABEL: test_undef_vtrn1q_s8: 2241 ; CHECK: ret 2242 entry: 2243 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 2244 ret <16 x i8> %shuffle.i 2245 } 2246 2247 define <4 x i16> @test_undef_vtrn1_s16(<4 x i16> %a) { 2248 ; CHECK-LABEL: test_undef_vtrn1_s16: 2249 ; CHECK: ret 2250 entry: 2251 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2252 ret <4 x i16> %shuffle.i 2253 } 2254 2255 define <8 x i16> @test_undef_vtrn1q_s16(<8 x i16> %a) { 2256 ; CHECK-LABEL: test_undef_vtrn1q_s16: 2257 ; CHECK: ret 2258 entry: 2259 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2260 ret <8 x i16> %shuffle.i 2261 } 2262 2263 define <4 x i32> @test_undef_vtrn1q_s32(<4 x i32> %a) { 2264 ; CHECK-LABEL: test_undef_vtrn1q_s32: 2265 ; CHECK: ret 2266 entry: 2267 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2268 ret <4 x i32> %shuffle.i 2269 } 2270 2271 define <8 x i8> @test_undef_vtrn1_u8(<8 x i8> %a) { 2272 ; CHECK-LABEL: test_undef_vtrn1_u8: 2273 ; CHECK: ret 2274 entry: 2275 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2276 ret <8 x i8> %shuffle.i 2277 } 2278 2279 define <16 x i8> @test_undef_vtrn1q_u8(<16 x i8> %a) { 2280 ; CHECK-LABEL: test_undef_vtrn1q_u8: 2281 ; CHECK: ret 2282 entry: 2283 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 2284 ret <16 x i8> %shuffle.i 2285 } 2286 2287 define <4 x i16> @test_undef_vtrn1_u16(<4 x i16> %a) { 2288 ; CHECK-LABEL: test_undef_vtrn1_u16: 2289 ; CHECK: ret 2290 entry: 2291 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2292 ret <4 x i16> %shuffle.i 2293 } 2294 2295 define <8 x i16> @test_undef_vtrn1q_u16(<8 x i16> %a) { 2296 ; CHECK-LABEL: test_undef_vtrn1q_u16: 2297 ; CHECK: ret 2298 entry: 2299 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2300 ret <8 x i16> %shuffle.i 2301 } 2302 2303 define <4 x i32> @test_undef_vtrn1q_u32(<4 x i32> %a) { 2304 ; CHECK-LABEL: test_undef_vtrn1q_u32: 2305 ; CHECK: ret 2306 entry: 2307 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2308 ret <4 x i32> %shuffle.i 2309 } 2310 2311 define <4 x float> @test_undef_vtrn1q_f32(<4 x float> %a) { 2312 ; CHECK-LABEL: test_undef_vtrn1q_f32: 2313 ; CHECK: ret 2314 entry: 2315 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2316 ret <4 x float> %shuffle.i 2317 } 2318 2319 define <8 x i8> @test_undef_vtrn1_p8(<8 x i8> %a) { 2320 ; CHECK-LABEL: test_undef_vtrn1_p8: 2321 ; CHECK: ret 2322 entry: 2323 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2324 ret <8 x i8> %shuffle.i 2325 } 2326 2327 define <16 x i8> @test_undef_vtrn1q_p8(<16 x i8> %a) { 2328 ; CHECK-LABEL: test_undef_vtrn1q_p8: 2329 ; CHECK: ret 2330 entry: 2331 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 2332 ret <16 x i8> %shuffle.i 2333 } 2334 2335 define <4 x i16> @test_undef_vtrn1_p16(<4 x i16> %a) { 2336 ; CHECK-LABEL: test_undef_vtrn1_p16: 2337 ; CHECK: ret 2338 entry: 2339 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2340 ret <4 x i16> %shuffle.i 2341 } 2342 2343 define <8 x i16> @test_undef_vtrn1q_p16(<8 x i16> %a) { 2344 ; CHECK-LABEL: test_undef_vtrn1q_p16: 2345 ; CHECK: ret 2346 entry: 2347 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2348 ret <8 x i16> %shuffle.i 2349 } 2350 2351 define <8 x i8> @test_undef_vtrn2_s8(<8 x i8> %a) { 2352 ; CHECK-LABEL: test_undef_vtrn2_s8: 2353 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2354 entry: 2355 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2356 ret <8 x i8> %shuffle.i 2357 } 2358 2359 define <16 x i8> @test_undef_vtrn2q_s8(<16 x i8> %a) { 2360 ; CHECK-LABEL: test_undef_vtrn2q_s8: 2361 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2362 entry: 2363 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 2364 ret <16 x i8> %shuffle.i 2365 } 2366 2367 define <4 x i16> @test_undef_vtrn2_s16(<4 x i16> %a) { 2368 ; CHECK-LABEL: test_undef_vtrn2_s16: 2369 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2370 entry: 2371 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2372 ret <4 x i16> %shuffle.i 2373 } 2374 2375 define <8 x i16> @test_undef_vtrn2q_s16(<8 x i16> %a) { 2376 ; CHECK-LABEL: test_undef_vtrn2q_s16: 2377 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2378 entry: 2379 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2380 ret <8 x i16> %shuffle.i 2381 } 2382 2383 define <4 x i32> @test_undef_vtrn2q_s32(<4 x i32> %a) { 2384 ; CHECK-LABEL: test_undef_vtrn2q_s32: 2385 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2386 entry: 2387 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2388 ret <4 x i32> %shuffle.i 2389 } 2390 2391 define <8 x i8> @test_undef_vtrn2_u8(<8 x i8> %a) { 2392 ; CHECK-LABEL: test_undef_vtrn2_u8: 2393 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2394 entry: 2395 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2396 ret <8 x i8> %shuffle.i 2397 } 2398 2399 define <16 x i8> @test_undef_vtrn2q_u8(<16 x i8> %a) { 2400 ; CHECK-LABEL: test_undef_vtrn2q_u8: 2401 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2402 entry: 2403 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 2404 ret <16 x i8> %shuffle.i 2405 } 2406 2407 define <4 x i16> @test_undef_vtrn2_u16(<4 x i16> %a) { 2408 ; CHECK-LABEL: test_undef_vtrn2_u16: 2409 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2410 entry: 2411 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2412 ret <4 x i16> %shuffle.i 2413 } 2414 2415 define <8 x i16> @test_undef_vtrn2q_u16(<8 x i16> %a) { 2416 ; CHECK-LABEL: test_undef_vtrn2q_u16: 2417 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2418 entry: 2419 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2420 ret <8 x i16> %shuffle.i 2421 } 2422 2423 define <4 x i32> @test_undef_vtrn2q_u32(<4 x i32> %a) { 2424 ; CHECK-LABEL: test_undef_vtrn2q_u32: 2425 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2426 entry: 2427 %shuffle.i = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2428 ret <4 x i32> %shuffle.i 2429 } 2430 2431 define <4 x float> @test_undef_vtrn2q_f32(<4 x float> %a) { 2432 ; CHECK-LABEL: test_undef_vtrn2q_f32: 2433 ; CHECK: rev64 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2434 entry: 2435 %shuffle.i = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2436 ret <4 x float> %shuffle.i 2437 } 2438 2439 define <8 x i8> @test_undef_vtrn2_p8(<8 x i8> %a) { 2440 ; CHECK-LABEL: test_undef_vtrn2_p8: 2441 ; CHECK: rev16 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2442 entry: 2443 %shuffle.i = shufflevector <8 x i8> %a, <8 x i8> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2444 ret <8 x i8> %shuffle.i 2445 } 2446 2447 define <16 x i8> @test_undef_vtrn2q_p8(<16 x i8> %a) { 2448 ; CHECK-LABEL: test_undef_vtrn2q_p8: 2449 ; CHECK: rev16 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2450 entry: 2451 %shuffle.i = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 2452 ret <16 x i8> %shuffle.i 2453 } 2454 2455 define <4 x i16> @test_undef_vtrn2_p16(<4 x i16> %a) { 2456 ; CHECK-LABEL: test_undef_vtrn2_p16: 2457 ; CHECK: rev32 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2458 entry: 2459 %shuffle.i = shufflevector <4 x i16> %a, <4 x i16> undef, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2460 ret <4 x i16> %shuffle.i 2461 } 2462 2463 define <8 x i16> @test_undef_vtrn2q_p16(<8 x i16> %a) { 2464 ; CHECK-LABEL: test_undef_vtrn2q_p16: 2465 ; CHECK: rev32 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2466 entry: 2467 %shuffle.i = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2468 ret <8 x i16> %shuffle.i 2469 } 2470 2471 define %struct.int8x8x2_t @test_vuzp_s8(<8 x i8> %a, <8 x i8> %b) { 2472 ; CHECK-LABEL: test_vuzp_s8: 2473 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2474 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2475 entry: 2476 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2477 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2478 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 2479 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 2480 ret %struct.int8x8x2_t %.fca.0.1.insert 2481 } 2482 2483 define %struct.int16x4x2_t @test_vuzp_s16(<4 x i16> %a, <4 x i16> %b) { 2484 ; CHECK-LABEL: test_vuzp_s16: 2485 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2486 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2487 entry: 2488 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2489 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2490 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0 2491 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1 2492 ret %struct.int16x4x2_t %.fca.0.1.insert 2493 } 2494 2495 define %struct.int32x2x2_t @test_vuzp_s32(<2 x i32> %a, <2 x i32> %b) { 2496 ; CHECK-LABEL: test_vuzp_s32: 2497 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2498 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2499 entry: 2500 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 2501 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 2502 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0 2503 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1 2504 ret %struct.int32x2x2_t %.fca.0.1.insert 2505 } 2506 2507 define %struct.uint8x8x2_t @test_vuzp_u8(<8 x i8> %a, <8 x i8> %b) { 2508 ; CHECK-LABEL: test_vuzp_u8: 2509 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2510 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2511 entry: 2512 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2513 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2514 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 2515 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 2516 ret %struct.uint8x8x2_t %.fca.0.1.insert 2517 } 2518 2519 define %struct.uint16x4x2_t @test_vuzp_u16(<4 x i16> %a, <4 x i16> %b) { 2520 ; CHECK-LABEL: test_vuzp_u16: 2521 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2522 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2523 entry: 2524 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2525 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2526 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0 2527 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1 2528 ret %struct.uint16x4x2_t %.fca.0.1.insert 2529 } 2530 2531 define %struct.uint32x2x2_t @test_vuzp_u32(<2 x i32> %a, <2 x i32> %b) { 2532 ; CHECK-LABEL: test_vuzp_u32: 2533 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2534 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2535 entry: 2536 %vuzp.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 2537 %vuzp1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 2538 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vuzp.i, 0, 0 2539 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vuzp1.i, 0, 1 2540 ret %struct.uint32x2x2_t %.fca.0.1.insert 2541 } 2542 2543 define %struct.float32x2x2_t @test_vuzp_f32(<2 x float> %a, <2 x float> %b) { 2544 ; CHECK-LABEL: test_vuzp_f32: 2545 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2546 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2547 entry: 2548 %vuzp.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 2549 %vuzp1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 2550 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vuzp.i, 0, 0 2551 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vuzp1.i, 0, 1 2552 ret %struct.float32x2x2_t %.fca.0.1.insert 2553 } 2554 2555 define %struct.poly8x8x2_t @test_vuzp_p8(<8 x i8> %a, <8 x i8> %b) { 2556 ; CHECK-LABEL: test_vuzp_p8: 2557 ; CHECK: uzp1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2558 ; CHECK: uzp2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2559 entry: 2560 %vuzp.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2561 %vuzp1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2562 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 2563 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 2564 ret %struct.poly8x8x2_t %.fca.0.1.insert 2565 } 2566 2567 define %struct.poly16x4x2_t @test_vuzp_p16(<4 x i16> %a, <4 x i16> %b) { 2568 ; CHECK-LABEL: test_vuzp_p16: 2569 ; CHECK: uzp1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2570 ; CHECK: uzp2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2571 entry: 2572 %vuzp.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2573 %vuzp1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2574 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vuzp.i, 0, 0 2575 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vuzp1.i, 0, 1 2576 ret %struct.poly16x4x2_t %.fca.0.1.insert 2577 } 2578 2579 define %struct.int8x16x2_t @test_vuzpq_s8(<16 x i8> %a, <16 x i8> %b) { 2580 ; CHECK-LABEL: test_vuzpq_s8: 2581 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2582 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2583 entry: 2584 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 2585 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 2586 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0 2587 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1 2588 ret %struct.int8x16x2_t %.fca.0.1.insert 2589 } 2590 2591 define %struct.int16x8x2_t @test_vuzpq_s16(<8 x i16> %a, <8 x i16> %b) { 2592 ; CHECK-LABEL: test_vuzpq_s16: 2593 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2594 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2595 entry: 2596 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2597 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2598 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0 2599 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1 2600 ret %struct.int16x8x2_t %.fca.0.1.insert 2601 } 2602 2603 define %struct.int32x4x2_t @test_vuzpq_s32(<4 x i32> %a, <4 x i32> %b) { 2604 ; CHECK-LABEL: test_vuzpq_s32: 2605 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2606 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2607 entry: 2608 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2609 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2610 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0 2611 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1 2612 ret %struct.int32x4x2_t %.fca.0.1.insert 2613 } 2614 2615 define %struct.uint8x16x2_t @test_vuzpq_u8(<16 x i8> %a, <16 x i8> %b) { 2616 ; CHECK-LABEL: test_vuzpq_u8: 2617 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2618 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2619 entry: 2620 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 2621 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 2622 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0 2623 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1 2624 ret %struct.uint8x16x2_t %.fca.0.1.insert 2625 } 2626 2627 define %struct.uint16x8x2_t @test_vuzpq_u16(<8 x i16> %a, <8 x i16> %b) { 2628 ; CHECK-LABEL: test_vuzpq_u16: 2629 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2630 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2631 entry: 2632 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2633 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2634 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0 2635 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1 2636 ret %struct.uint16x8x2_t %.fca.0.1.insert 2637 } 2638 2639 define %struct.uint32x4x2_t @test_vuzpq_u32(<4 x i32> %a, <4 x i32> %b) { 2640 ; CHECK-LABEL: test_vuzpq_u32: 2641 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2642 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2643 entry: 2644 %vuzp.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2645 %vuzp1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2646 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vuzp.i, 0, 0 2647 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vuzp1.i, 0, 1 2648 ret %struct.uint32x4x2_t %.fca.0.1.insert 2649 } 2650 2651 define %struct.float32x4x2_t @test_vuzpq_f32(<4 x float> %a, <4 x float> %b) { 2652 ; CHECK-LABEL: test_vuzpq_f32: 2653 ; CHECK: uzp1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2654 ; CHECK: uzp2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2655 entry: 2656 %vuzp.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 2, i32 4, i32 6> 2657 %vuzp1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 3, i32 5, i32 7> 2658 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vuzp.i, 0, 0 2659 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vuzp1.i, 0, 1 2660 ret %struct.float32x4x2_t %.fca.0.1.insert 2661 } 2662 2663 define %struct.poly8x16x2_t @test_vuzpq_p8(<16 x i8> %a, <16 x i8> %b) { 2664 ; CHECK-LABEL: test_vuzpq_p8: 2665 ; CHECK: uzp1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2666 ; CHECK: uzp2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2667 entry: 2668 %vuzp.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30> 2669 %vuzp1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31> 2670 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vuzp.i, 0, 0 2671 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vuzp1.i, 0, 1 2672 ret %struct.poly8x16x2_t %.fca.0.1.insert 2673 } 2674 2675 define %struct.poly16x8x2_t @test_vuzpq_p16(<8 x i16> %a, <8 x i16> %b) { 2676 ; CHECK-LABEL: test_vuzpq_p16: 2677 ; CHECK: uzp1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2678 ; CHECK: uzp2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2679 entry: 2680 %vuzp.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 2681 %vuzp1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 2682 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vuzp.i, 0, 0 2683 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vuzp1.i, 0, 1 2684 ret %struct.poly16x8x2_t %.fca.0.1.insert 2685 } 2686 2687 define %struct.int8x8x2_t @test_vzip_s8(<8 x i8> %a, <8 x i8> %b) { 2688 ; CHECK-LABEL: test_vzip_s8: 2689 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2690 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2691 entry: 2692 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2693 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2694 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vzip.i, 0, 0 2695 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1 2696 ret %struct.int8x8x2_t %.fca.0.1.insert 2697 } 2698 2699 define %struct.int16x4x2_t @test_vzip_s16(<4 x i16> %a, <4 x i16> %b) { 2700 ; CHECK-LABEL: test_vzip_s16: 2701 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2702 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2703 entry: 2704 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2705 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2706 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vzip.i, 0, 0 2707 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1 2708 ret %struct.int16x4x2_t %.fca.0.1.insert 2709 } 2710 2711 define %struct.int32x2x2_t @test_vzip_s32(<2 x i32> %a, <2 x i32> %b) { 2712 ; CHECK-LABEL: test_vzip_s32: 2713 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2714 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2715 entry: 2716 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 2717 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 2718 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vzip.i, 0, 0 2719 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1 2720 ret %struct.int32x2x2_t %.fca.0.1.insert 2721 } 2722 2723 define %struct.uint8x8x2_t @test_vzip_u8(<8 x i8> %a, <8 x i8> %b) { 2724 ; CHECK-LABEL: test_vzip_u8: 2725 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2726 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2727 entry: 2728 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2729 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2730 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vzip.i, 0, 0 2731 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1 2732 ret %struct.uint8x8x2_t %.fca.0.1.insert 2733 } 2734 2735 define %struct.uint16x4x2_t @test_vzip_u16(<4 x i16> %a, <4 x i16> %b) { 2736 ; CHECK-LABEL: test_vzip_u16: 2737 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2738 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2739 entry: 2740 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2741 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2742 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vzip.i, 0, 0 2743 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1 2744 ret %struct.uint16x4x2_t %.fca.0.1.insert 2745 } 2746 2747 define %struct.uint32x2x2_t @test_vzip_u32(<2 x i32> %a, <2 x i32> %b) { 2748 ; CHECK-LABEL: test_vzip_u32: 2749 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2750 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2751 entry: 2752 %vzip.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 2753 %vzip1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 2754 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vzip.i, 0, 0 2755 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vzip1.i, 0, 1 2756 ret %struct.uint32x2x2_t %.fca.0.1.insert 2757 } 2758 2759 define %struct.float32x2x2_t @test_vzip_f32(<2 x float> %a, <2 x float> %b) { 2760 ; CHECK-LABEL: test_vzip_f32: 2761 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2762 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2763 entry: 2764 %vzip.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 2765 %vzip1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 2766 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vzip.i, 0, 0 2767 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vzip1.i, 0, 1 2768 ret %struct.float32x2x2_t %.fca.0.1.insert 2769 } 2770 2771 define %struct.poly8x8x2_t @test_vzip_p8(<8 x i8> %a, <8 x i8> %b) { 2772 ; CHECK-LABEL: test_vzip_p8: 2773 ; CHECK: zip1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2774 ; CHECK: zip2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2775 entry: 2776 %vzip.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2777 %vzip1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2778 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vzip.i, 0, 0 2779 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vzip1.i, 0, 1 2780 ret %struct.poly8x8x2_t %.fca.0.1.insert 2781 } 2782 2783 define %struct.poly16x4x2_t @test_vzip_p16(<4 x i16> %a, <4 x i16> %b) { 2784 ; CHECK-LABEL: test_vzip_p16: 2785 ; CHECK: zip1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2786 ; CHECK: zip2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2787 entry: 2788 %vzip.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2789 %vzip1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2790 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vzip.i, 0, 0 2791 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vzip1.i, 0, 1 2792 ret %struct.poly16x4x2_t %.fca.0.1.insert 2793 } 2794 2795 define %struct.int8x16x2_t @test_vzipq_s8(<16 x i8> %a, <16 x i8> %b) { 2796 ; CHECK-LABEL: test_vzipq_s8: 2797 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2798 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2799 entry: 2800 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 2801 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 2802 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vzip.i, 0, 0 2803 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1 2804 ret %struct.int8x16x2_t %.fca.0.1.insert 2805 } 2806 2807 define %struct.int16x8x2_t @test_vzipq_s16(<8 x i16> %a, <8 x i16> %b) { 2808 ; CHECK-LABEL: test_vzipq_s16: 2809 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2810 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2811 entry: 2812 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2813 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2814 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vzip.i, 0, 0 2815 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1 2816 ret %struct.int16x8x2_t %.fca.0.1.insert 2817 } 2818 2819 define %struct.int32x4x2_t @test_vzipq_s32(<4 x i32> %a, <4 x i32> %b) { 2820 ; CHECK-LABEL: test_vzipq_s32: 2821 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2822 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2823 entry: 2824 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2825 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2826 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vzip.i, 0, 0 2827 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1 2828 ret %struct.int32x4x2_t %.fca.0.1.insert 2829 } 2830 2831 define %struct.uint8x16x2_t @test_vzipq_u8(<16 x i8> %a, <16 x i8> %b) { 2832 ; CHECK-LABEL: test_vzipq_u8: 2833 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2834 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2835 entry: 2836 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 2837 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 2838 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vzip.i, 0, 0 2839 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1 2840 ret %struct.uint8x16x2_t %.fca.0.1.insert 2841 } 2842 2843 define %struct.uint16x8x2_t @test_vzipq_u16(<8 x i16> %a, <8 x i16> %b) { 2844 ; CHECK-LABEL: test_vzipq_u16: 2845 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2846 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2847 entry: 2848 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2849 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2850 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vzip.i, 0, 0 2851 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1 2852 ret %struct.uint16x8x2_t %.fca.0.1.insert 2853 } 2854 2855 define %struct.uint32x4x2_t @test_vzipq_u32(<4 x i32> %a, <4 x i32> %b) { 2856 ; CHECK-LABEL: test_vzipq_u32: 2857 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2858 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2859 entry: 2860 %vzip.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2861 %vzip1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2862 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vzip.i, 0, 0 2863 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vzip1.i, 0, 1 2864 ret %struct.uint32x4x2_t %.fca.0.1.insert 2865 } 2866 2867 define %struct.float32x4x2_t @test_vzipq_f32(<4 x float> %a, <4 x float> %b) { 2868 ; CHECK-LABEL: test_vzipq_f32: 2869 ; CHECK: zip1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2870 ; CHECK: zip2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 2871 entry: 2872 %vzip.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 5> 2873 %vzip1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 6, i32 3, i32 7> 2874 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vzip.i, 0, 0 2875 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vzip1.i, 0, 1 2876 ret %struct.float32x4x2_t %.fca.0.1.insert 2877 } 2878 2879 define %struct.poly8x16x2_t @test_vzipq_p8(<16 x i8> %a, <16 x i8> %b) { 2880 ; CHECK-LABEL: test_vzipq_p8: 2881 ; CHECK: zip1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2882 ; CHECK: zip2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 2883 entry: 2884 %vzip.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23> 2885 %vzip1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31> 2886 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vzip.i, 0, 0 2887 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vzip1.i, 0, 1 2888 ret %struct.poly8x16x2_t %.fca.0.1.insert 2889 } 2890 2891 define %struct.poly16x8x2_t @test_vzipq_p16(<8 x i16> %a, <8 x i16> %b) { 2892 ; CHECK-LABEL: test_vzipq_p16: 2893 ; CHECK: zip1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2894 ; CHECK: zip2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 2895 entry: 2896 %vzip.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11> 2897 %vzip1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15> 2898 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vzip.i, 0, 0 2899 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vzip1.i, 0, 1 2900 ret %struct.poly16x8x2_t %.fca.0.1.insert 2901 } 2902 2903 define %struct.int8x8x2_t @test_vtrn_s8(<8 x i8> %a, <8 x i8> %b) { 2904 ; CHECK-LABEL: test_vtrn_s8: 2905 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2906 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2907 entry: 2908 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2909 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2910 %.fca.0.0.insert = insertvalue %struct.int8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0 2911 %.fca.0.1.insert = insertvalue %struct.int8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1 2912 ret %struct.int8x8x2_t %.fca.0.1.insert 2913 } 2914 2915 define %struct.int16x4x2_t @test_vtrn_s16(<4 x i16> %a, <4 x i16> %b) { 2916 ; CHECK-LABEL: test_vtrn_s16: 2917 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2918 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2919 entry: 2920 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2921 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2922 %.fca.0.0.insert = insertvalue %struct.int16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0 2923 %.fca.0.1.insert = insertvalue %struct.int16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1 2924 ret %struct.int16x4x2_t %.fca.0.1.insert 2925 } 2926 2927 define %struct.int32x2x2_t @test_vtrn_s32(<2 x i32> %a, <2 x i32> %b) { 2928 ; CHECK-LABEL: test_vtrn_s32: 2929 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2930 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2931 entry: 2932 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 2933 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 2934 %.fca.0.0.insert = insertvalue %struct.int32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0 2935 %.fca.0.1.insert = insertvalue %struct.int32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1 2936 ret %struct.int32x2x2_t %.fca.0.1.insert 2937 } 2938 2939 define %struct.uint8x8x2_t @test_vtrn_u8(<8 x i8> %a, <8 x i8> %b) { 2940 ; CHECK-LABEL: test_vtrn_u8: 2941 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2942 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2943 entry: 2944 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2945 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2946 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0 2947 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1 2948 ret %struct.uint8x8x2_t %.fca.0.1.insert 2949 } 2950 2951 define %struct.uint16x4x2_t @test_vtrn_u16(<4 x i16> %a, <4 x i16> %b) { 2952 ; CHECK-LABEL: test_vtrn_u16: 2953 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2954 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 2955 entry: 2956 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 2957 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 2958 %.fca.0.0.insert = insertvalue %struct.uint16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0 2959 %.fca.0.1.insert = insertvalue %struct.uint16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1 2960 ret %struct.uint16x4x2_t %.fca.0.1.insert 2961 } 2962 2963 define %struct.uint32x2x2_t @test_vtrn_u32(<2 x i32> %a, <2 x i32> %b) { 2964 ; CHECK-LABEL: test_vtrn_u32: 2965 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2966 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2967 entry: 2968 %vtrn.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 0, i32 2> 2969 %vtrn1.i = shufflevector <2 x i32> %a, <2 x i32> %b, <2 x i32> <i32 1, i32 3> 2970 %.fca.0.0.insert = insertvalue %struct.uint32x2x2_t undef, <2 x i32> %vtrn.i, 0, 0 2971 %.fca.0.1.insert = insertvalue %struct.uint32x2x2_t %.fca.0.0.insert, <2 x i32> %vtrn1.i, 0, 1 2972 ret %struct.uint32x2x2_t %.fca.0.1.insert 2973 } 2974 2975 define %struct.float32x2x2_t @test_vtrn_f32(<2 x float> %a, <2 x float> %b) { 2976 ; CHECK-LABEL: test_vtrn_f32: 2977 ; CHECK: zip1 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2978 ; CHECK: zip2 {{v[0-9]+}}.2s, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s 2979 entry: 2980 %vtrn.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 0, i32 2> 2981 %vtrn1.i = shufflevector <2 x float> %a, <2 x float> %b, <2 x i32> <i32 1, i32 3> 2982 %.fca.0.0.insert = insertvalue %struct.float32x2x2_t undef, <2 x float> %vtrn.i, 0, 0 2983 %.fca.0.1.insert = insertvalue %struct.float32x2x2_t %.fca.0.0.insert, <2 x float> %vtrn1.i, 0, 1 2984 ret %struct.float32x2x2_t %.fca.0.1.insert 2985 } 2986 2987 define %struct.poly8x8x2_t @test_vtrn_p8(<8 x i8> %a, <8 x i8> %b) { 2988 ; CHECK-LABEL: test_vtrn_p8: 2989 ; CHECK: trn1 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2990 ; CHECK: trn2 {{v[0-9]+}}.8b, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b 2991 entry: 2992 %vtrn.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 2993 %vtrn1.i = shufflevector <8 x i8> %a, <8 x i8> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 2994 %.fca.0.0.insert = insertvalue %struct.poly8x8x2_t undef, <8 x i8> %vtrn.i, 0, 0 2995 %.fca.0.1.insert = insertvalue %struct.poly8x8x2_t %.fca.0.0.insert, <8 x i8> %vtrn1.i, 0, 1 2996 ret %struct.poly8x8x2_t %.fca.0.1.insert 2997 } 2998 2999 define %struct.poly16x4x2_t @test_vtrn_p16(<4 x i16> %a, <4 x i16> %b) { 3000 ; CHECK-LABEL: test_vtrn_p16: 3001 ; CHECK: trn1 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 3002 ; CHECK: trn2 {{v[0-9]+}}.4h, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h 3003 entry: 3004 %vtrn.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3005 %vtrn1.i = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3006 %.fca.0.0.insert = insertvalue %struct.poly16x4x2_t undef, <4 x i16> %vtrn.i, 0, 0 3007 %.fca.0.1.insert = insertvalue %struct.poly16x4x2_t %.fca.0.0.insert, <4 x i16> %vtrn1.i, 0, 1 3008 ret %struct.poly16x4x2_t %.fca.0.1.insert 3009 } 3010 3011 define %struct.int8x16x2_t @test_vtrnq_s8(<16 x i8> %a, <16 x i8> %b) { 3012 ; CHECK-LABEL: test_vtrnq_s8: 3013 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 3014 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 3015 entry: 3016 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 3017 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 3018 %.fca.0.0.insert = insertvalue %struct.int8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0 3019 %.fca.0.1.insert = insertvalue %struct.int8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1 3020 ret %struct.int8x16x2_t %.fca.0.1.insert 3021 } 3022 3023 define %struct.int16x8x2_t @test_vtrnq_s16(<8 x i16> %a, <8 x i16> %b) { 3024 ; CHECK-LABEL: test_vtrnq_s16: 3025 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 3026 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 3027 entry: 3028 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3029 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3030 %.fca.0.0.insert = insertvalue %struct.int16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0 3031 %.fca.0.1.insert = insertvalue %struct.int16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1 3032 ret %struct.int16x8x2_t %.fca.0.1.insert 3033 } 3034 3035 define %struct.int32x4x2_t @test_vtrnq_s32(<4 x i32> %a, <4 x i32> %b) { 3036 ; CHECK-LABEL: test_vtrnq_s32: 3037 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 3038 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 3039 entry: 3040 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3041 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3042 %.fca.0.0.insert = insertvalue %struct.int32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0 3043 %.fca.0.1.insert = insertvalue %struct.int32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1 3044 ret %struct.int32x4x2_t %.fca.0.1.insert 3045 } 3046 3047 define %struct.uint8x16x2_t @test_vtrnq_u8(<16 x i8> %a, <16 x i8> %b) { 3048 ; CHECK-LABEL: test_vtrnq_u8: 3049 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 3050 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 3051 entry: 3052 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 3053 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 3054 %.fca.0.0.insert = insertvalue %struct.uint8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0 3055 %.fca.0.1.insert = insertvalue %struct.uint8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1 3056 ret %struct.uint8x16x2_t %.fca.0.1.insert 3057 } 3058 3059 define %struct.uint16x8x2_t @test_vtrnq_u16(<8 x i16> %a, <8 x i16> %b) { 3060 ; CHECK-LABEL: test_vtrnq_u16: 3061 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 3062 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 3063 entry: 3064 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3065 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3066 %.fca.0.0.insert = insertvalue %struct.uint16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0 3067 %.fca.0.1.insert = insertvalue %struct.uint16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1 3068 ret %struct.uint16x8x2_t %.fca.0.1.insert 3069 } 3070 3071 define %struct.uint32x4x2_t @test_vtrnq_u32(<4 x i32> %a, <4 x i32> %b) { 3072 ; CHECK-LABEL: test_vtrnq_u32: 3073 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 3074 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 3075 entry: 3076 %vtrn.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3077 %vtrn1.i = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3078 %.fca.0.0.insert = insertvalue %struct.uint32x4x2_t undef, <4 x i32> %vtrn.i, 0, 0 3079 %.fca.0.1.insert = insertvalue %struct.uint32x4x2_t %.fca.0.0.insert, <4 x i32> %vtrn1.i, 0, 1 3080 ret %struct.uint32x4x2_t %.fca.0.1.insert 3081 } 3082 3083 define %struct.float32x4x2_t @test_vtrnq_f32(<4 x float> %a, <4 x float> %b) { 3084 ; CHECK-LABEL: test_vtrnq_f32: 3085 ; CHECK: trn1 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 3086 ; CHECK: trn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 3087 entry: 3088 %vtrn.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 4, i32 2, i32 6> 3089 %vtrn1.i = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 5, i32 3, i32 7> 3090 %.fca.0.0.insert = insertvalue %struct.float32x4x2_t undef, <4 x float> %vtrn.i, 0, 0 3091 %.fca.0.1.insert = insertvalue %struct.float32x4x2_t %.fca.0.0.insert, <4 x float> %vtrn1.i, 0, 1 3092 ret %struct.float32x4x2_t %.fca.0.1.insert 3093 } 3094 3095 define %struct.poly8x16x2_t @test_vtrnq_p8(<16 x i8> %a, <16 x i8> %b) { 3096 ; CHECK-LABEL: test_vtrnq_p8: 3097 ; CHECK: trn1 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 3098 ; CHECK: trn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.16b, {{v[0-9]+}}.16b 3099 entry: 3100 %vtrn.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 2, i32 18, i32 4, i32 20, i32 6, i32 22, i32 8, i32 24, i32 10, i32 26, i32 12, i32 28, i32 14, i32 30> 3101 %vtrn1.i = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 1, i32 17, i32 3, i32 19, i32 5, i32 21, i32 7, i32 23, i32 9, i32 25, i32 11, i32 27, i32 13, i32 29, i32 15, i32 31> 3102 %.fca.0.0.insert = insertvalue %struct.poly8x16x2_t undef, <16 x i8> %vtrn.i, 0, 0 3103 %.fca.0.1.insert = insertvalue %struct.poly8x16x2_t %.fca.0.0.insert, <16 x i8> %vtrn1.i, 0, 1 3104 ret %struct.poly8x16x2_t %.fca.0.1.insert 3105 } 3106 3107 define %struct.poly16x8x2_t @test_vtrnq_p16(<8 x i16> %a, <8 x i16> %b) { 3108 ; CHECK-LABEL: test_vtrnq_p16: 3109 ; CHECK: trn1 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 3110 ; CHECK: trn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 3111 entry: 3112 %vtrn.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14> 3113 %vtrn1.i = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 1, i32 9, i32 3, i32 11, i32 5, i32 13, i32 7, i32 15> 3114 %.fca.0.0.insert = insertvalue %struct.poly16x8x2_t undef, <8 x i16> %vtrn.i, 0, 0 3115 %.fca.0.1.insert = insertvalue %struct.poly16x8x2_t %.fca.0.0.insert, <8 x i16> %vtrn1.i, 0, 1 3116 ret %struct.poly16x8x2_t %.fca.0.1.insert 3117 } 3118 3119 define %struct.uint8x8x2_t @test_uzp(<16 x i8> %y) { 3120 ; CHECK-LABEL: test_uzp: 3121 3122 %vuzp.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14> 3123 %vuzp1.i = shufflevector <16 x i8> %y, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15> 3124 %.fca.0.0.insert = insertvalue %struct.uint8x8x2_t undef, <8 x i8> %vuzp.i, 0, 0 3125 %.fca.0.1.insert = insertvalue %struct.uint8x8x2_t %.fca.0.0.insert, <8 x i8> %vuzp1.i, 0, 1 3126 ret %struct.uint8x8x2_t %.fca.0.1.insert 3127 3128 } 3129
