1 ; RUN: llc -mtriple=arm-eabi -mattr=+vfp2 %s -o - \ 2 ; RUN: | FileCheck %s -check-prefix=VFP2 3 4 ; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - \ 5 ; RUN: | FileCheck %s -check-prefix=VFP2 6 7 ; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \ 8 ; RUN: | FileCheck %s -check-prefix=VFP2 9 10 ; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \ 11 ; RUN: | FileCheck %s -check-prefix=NEON 12 13 ; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \ 14 ; RUN: | FileCheck %s -check-prefix=NEON 15 16 ; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a9 %s -o - \ 17 ; RUN: | FileCheck %s -check-prefix=VFP2 18 19 define i32 @test1(float %a, float %b) { 20 ; VFP2-LABEL: test1: 21 ; VFP2: vcvt.s32.f32 s{{.}}, s{{.}} 22 ; NEON-LABEL: test1: 23 ; NEON: vadd.f32 [[D0:d[0-9]+]] 24 ; NEON: vcvt.s32.f32 d0, [[D0]] 25 entry: 26 %0 = fadd float %a, %b 27 %1 = fptosi float %0 to i32 28 ret i32 %1 29 } 30 31 define i32 @test2(float %a, float %b) { 32 ; VFP2-LABEL: test2: 33 ; VFP2: vcvt.u32.f32 s{{.}}, s{{.}} 34 ; NEON-LABEL: test2: 35 ; NEON: vadd.f32 [[D0:d[0-9]+]] 36 ; NEON: vcvt.u32.f32 d0, [[D0]] 37 entry: 38 %0 = fadd float %a, %b 39 %1 = fptoui float %0 to i32 40 ret i32 %1 41 } 42 43 define float @test3(i32 %a, i32 %b) { 44 ; VFP2-LABEL: test3: 45 ; VFP2: vcvt.f32.u32 s{{.}}, s{{.}} 46 ; NEON-LABEL: test3: 47 ; NEON: vcvt.f32.u32 d 48 entry: 49 %0 = add i32 %a, %b 50 %1 = uitofp i32 %0 to float 51 ret float %1 52 } 53 54 define float @test4(i32 %a, i32 %b) { 55 ; VFP2-LABEL: test4: 56 ; VFP2: vcvt.f32.s32 s{{.}}, s{{.}} 57 ; NEON-LABEL: test4: 58 ; NEON: vcvt.f32.s32 d 59 entry: 60 %0 = add i32 %a, %b 61 %1 = sitofp i32 %0 to float 62 ret float %1 63 } 64
