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      1 ; RUN: llc < %s -mtriple=armv7 -mattr=+db | FileCheck %s
      2 
      3 @x1 = global i32 0, align 4
      4 @x2 = global i32 0, align 4
      5 
      6 define void @test() {
      7 entry:
      8   br label %for.body
      9 
     10 for.body:                                         ; preds = %for.body, %entry
     11   %i.013 = phi i32 [ 1, %entry ], [ %inc6, %for.body ]
     12   store atomic i32 %i.013, i32* @x1 seq_cst, align 4
     13   store atomic i32 %i.013, i32* @x1 seq_cst, align 4
     14   store atomic i32 %i.013, i32* @x2 seq_cst, align 4
     15   %inc6 = add nsw i32 %i.013, 1
     16   %exitcond = icmp eq i32 %inc6, 2
     17   br i1 %exitcond, label %for.end, label %for.body
     18 
     19 for.end:                                          ; preds = %for.body
     20   ret void
     21 
     22 ; The for.body contains 3 seq_cst stores.
     23 ; Hence it should have 3 dmb;str;dmb sequences with the middle dmbs collapsed
     24 ; CHECK: %for.body
     25 ; CHECK-NOT: str
     26 ; CHECK: dmb
     27 ; CHECK-NOT: dmb
     28 ; CHECK: str
     29 
     30 ; CHECK-NOT: str
     31 ; CHECK: dmb
     32 ; CHECK-NOT: dmb
     33 ; CHECK: str
     34 
     35 ; CHECK-NOT: str
     36 ; CHECK: dmb
     37 ; CHECK-NOT: dmb
     38 ; CHECK: str
     39 
     40 ; CHECK-NOT: str
     41 ; CHECK: dmb
     42 ; CHECK-NOT: dmb
     43 ; CHECK-NOT: str
     44 ; CHECK: %for.end
     45 }
     46 
     47 define void @test2() {
     48   call void @llvm.arm.dmb(i32 11)
     49   tail call void @test()
     50   call void @llvm.arm.dmb(i32 11)
     51   ret void
     52 ; the call should prevent the two dmbs from collapsing
     53 ; CHECK: test2:
     54 ; CHECK: dmb
     55 ; CHECK-NEXT: bl
     56 ; CHECK-NEXT: dmb
     57 }
     58 
     59 define void @test3() {
     60   call void @llvm.arm.dmb(i32 11)
     61   call void @llvm.arm.dsb(i32 9)
     62   call void @llvm.arm.dmb(i32 11)
     63   ret void
     64 ; the call should prevent the two dmbs from collapsing
     65 ; CHECK: test3:
     66 ; CHECK: dmb
     67 ; CHECK-NEXT: dsb
     68 ; CHECK-NEXT: dmb
     69 
     70 }
     71 
     72 
     73 declare void @llvm.arm.dmb(i32)
     74 declare void @llvm.arm.dsb(i32)
     75