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      1 ; RUN: llc < %s -march=r600 -mcpu=SI -verify-machineinstrs | FileCheck %s
      2 
      3 ; In this test both the pointer and the offset operands to the
      4 ; BUFFER_LOAD instructions end up being stored in vgprs.  This
      5 ; requires us to add the pointer and offset together, store the
      6 ; result in the offset operand (vaddr), and then store 0 in an
      7 ; sgpr register pair and use that for the pointer operand
      8 ; (low 64-bits of srsrc).
      9 
     10 ; CHECK-LABEL: @mubuf
     11 
     12 ; Make sure we aren't using VGPRs for the source operand of S_MOV_B64
     13 ; CHECK-NOT: S_MOV_B64 s[{{[0-9]+:[0-9]+}}], v
     14 
     15 ; Make sure we aren't using VGPR's for the srsrc operand of BUFFER_LOAD_*
     16 ; instructions
     17 ; CHECK: BUFFER_LOAD_UBYTE v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}]
     18 ; CHECK: BUFFER_LOAD_UBYTE v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}]
     19 define void @mubuf(i32 addrspace(1)* %out, i8 addrspace(1)* %in) {
     20 entry:
     21   %0 = call i32 @llvm.r600.read.tidig.x() #1
     22   %1 = call i32 @llvm.r600.read.tidig.y() #1
     23   %2 = sext i32 %0 to i64
     24   %3 = sext i32 %1 to i64
     25   br label %loop
     26 
     27 loop:
     28   %4 = phi i64 [0, %entry], [%5, %loop]
     29   %5 = add i64 %2, %4
     30   %6 = getelementptr i8 addrspace(1)* %in, i64 %5
     31   %7 = load i8 addrspace(1)* %6, align 1
     32   %8 = or i64 %5, 1
     33   %9 = getelementptr i8 addrspace(1)* %in, i64 %8
     34   %10 = load i8 addrspace(1)* %9, align 1
     35   %11 = add i8 %7, %10
     36   %12 = sext i8 %11 to i32
     37   store i32 %12, i32 addrspace(1)* %out
     38   %13 = icmp slt i64 %5, 10
     39   br i1 %13, label %loop, label %done
     40 
     41 done:
     42   ret void
     43 }
     44 
     45 declare i32 @llvm.r600.read.tidig.x() #1
     46 declare i32 @llvm.r600.read.tidig.y() #1
     47 
     48 attributes #1 = { nounwind readnone }
     49 
     50 ; Test moving an SMRD instruction to the VALU
     51 
     52 ; CHECK-LABEL: @smrd_valu
     53 ; CHECK: BUFFER_LOAD_DWORD [[OUT:v[0-9]+]]
     54 ; CHECK: BUFFER_STORE_DWORD [[OUT]]
     55 
     56 define void @smrd_valu(i32 addrspace(2)* addrspace(1)* %in, i32 %a, i32 addrspace(1)* %out) {
     57 entry:
     58   %0 = icmp ne i32 %a, 0
     59   br i1 %0, label %if, label %else
     60 
     61 if:
     62   %1 = load i32 addrspace(2)* addrspace(1)* %in
     63   br label %endif
     64 
     65 else:
     66   %2 = getelementptr i32 addrspace(2)* addrspace(1)* %in
     67   %3 = load i32 addrspace(2)* addrspace(1)* %2
     68   br label %endif
     69 
     70 endif:
     71   %4 = phi i32 addrspace(2)*  [%1, %if], [%3, %else]
     72   %5 = getelementptr i32 addrspace(2)* %4, i32 3000
     73   %6 = load i32 addrspace(2)* %5
     74   store i32 %6, i32 addrspace(1)* %out
     75   ret void
     76 }
     77 
     78 ; Test moving ann SMRD with an immediate offset to the VALU
     79 
     80 ; CHECK-LABEL: @smrd_valu2
     81 ; CHECK: BUFFER_LOAD_DWORD
     82 define void @smrd_valu2(i32 addrspace(1)* %out, [8 x i32] addrspace(2)* %in) {
     83 entry:
     84   %0 = call i32 @llvm.r600.read.tidig.x() nounwind readnone
     85   %1 = add i32 %0, 4
     86   %2 = getelementptr [8 x i32] addrspace(2)* %in, i32 %0, i32 4
     87   %3 = load i32 addrspace(2)* %2
     88   store i32 %3, i32 addrspace(1)* %out
     89   ret void
     90 }
     91