Home | History | Annotate | Download | only in ARM
      1 ;; RUN: llc -mtriple=armv7-linux-gnueabi -O3  \
      2 ;; RUN:    -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2  -arm-reserve-r9  \
      3 ;; RUN:    -filetype=obj %s -o - | \
      4 ;; RUN:   llvm-readobj -r | FileCheck -check-prefix=OBJ %s
      5 
      6 ;; FIXME: This file needs to be in .s form!
      7 ;; The args to llc are there to constrain the codegen only.
      8 ;; 
      9 ;; Ensure no regression on ARM/gcc compatibility for 
     10 ;; emitting explicit symbol relocs for nonexternal symbols 
     11 ;; versus section symbol relocs (with offset) - 
     12 ;;
     13 ;; Default llvm behavior is to emit as section symbol relocs nearly
     14 ;; everything that is not an undefined external. Unfortunately, this 
     15 ;; diverges from what codesourcery ARM/gcc does!
     16 ;;
     17 ;; Tests that reloc to _MergedGlobals show up as explicit symbol reloc
     18 
     19 
     20 target triple = "armv7-none-linux-gnueabi"
     21 
     22 @var_tls = thread_local global i32 1
     23 @var_tls_double = thread_local global double 1.000000e+00
     24 @var_static = internal global i32 1
     25 @var_static_double = internal global double 1.000000e+00
     26 @var_global = global i32 1
     27 @var_global_double = global double 1.000000e+00
     28 
     29 declare i32 @mystrlen(i8* nocapture %s) nounwind  
     30 
     31 declare void @myhextochar(i32 %n, i8* nocapture %buffer)
     32 
     33 declare void @__aeabi_read_tp() nounwind 
     34 
     35 declare void @__nacl_read_tp() nounwind  
     36 
     37 define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
     38 entry:
     39   switch i32 %argc, label %bb3 [
     40     i32 555, label %bb
     41     i32 6666, label %bb2
     42   ]
     43 
     44 bb:                                               ; preds = %entry
     45   store volatile i32 11, i32* @var_tls, align 4
     46   store volatile double 2.200000e+01, double* @var_tls_double, align 8
     47   store volatile i32 33, i32* @var_static, align 4
     48   store volatile double 4.400000e+01, double* @var_static_double, align 8
     49   store volatile i32 55, i32* @var_global, align 4
     50   store volatile double 6.600000e+01, double* @var_global_double, align 8
     51   br label %bb3
     52 
     53 bb2:                                              ; preds = %entry
     54   ret i32 add (i32 add (i32 add (i32 ptrtoint (i32* @var_tls to i32), i32 add (i32 ptrtoint (i32* @var_static to i32), i32 ptrtoint (i32* @var_global to i32))), i32 ptrtoint (double* @var_tls_double to i32)), i32 add (i32 ptrtoint (double* @var_static_double to i32), i32 ptrtoint (double* @var_global_double to i32)))
     55 
     56 bb3:                                              ; preds = %bb, %entry
     57   tail call void @exit(i32 55) noreturn nounwind
     58   unreachable
     59 }
     60 
     61 declare void @exit(i32) noreturn nounwind
     62 
     63 ; OBJ: Relocations [
     64 ; OBJ:   Section (2) .rel.text {
     65 ; OBJ:     0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC _MergedGlobals
     66 ; OBJ:   }
     67 ; OBJ: ]
     68