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      1 VIXL Change Log
      2 ===============
      3 
      4 * 1.4
      5     + Added support for `frintm`.
      6     + Fixed simulation of `frintn` and `frinta` for corner cases.
      7     + Added more tests for floating point instruction simulation.
      8     + Modified `CalleeSave()` and `CalleeRestore()` to push general purpose
      9       registers before floating point registers on the stack.
     10     + Fixed Printf for mixed argument types, and use on real hardware.
     11     + Improved compatibility with some 32-bit compilers.
     12 
     13 * 1.3
     14     + Address inaccuracies in the simulated floating point instructions.
     15     + Implement Default-NaN floating point mode.
     16     + Introduce `UseScratchRegisterScope` for controlling the use of temporary
     17       registers.
     18     + Enable building VIXL on 32-bit hosts.
     19     + Other small bug fixes and improvements.
     20 
     21 * 1.2
     22     + Added support for `fmadd`, `fnmadd`, `fnmsub`, `fminnm`, `fmaxnm`,
     23       `frinta`, `fcvtau` and `fcvtas`.
     24     + Added support for assembling and disassembling `isb`, `dsb` and `dmb`.
     25     + Added support for automatic inversion of compare instructions when using
     26       negative immediates.
     27     + Added support for using `movn` when generating immediates.
     28     + Added explicit flag-setting 'S' instructions, and removed
     29       `SetFlags` and `LeaveFlags` arguments.
     30     + Added support for `Movk` in macro assembler.
     31     + Added support for W register parameters to `Tbz` and `Tbnz`.
     32     + Added support for using immediate operands with `Csel`.
     33     + Added new debugger syntax for memory inspection.
     34     + Fixed `smull`, `fmsub` and `sdiv` simulation.
     35     + Fixed sign extension for W->X conversions using `sxtb`, `sxth` and `sxtw`.
     36     + Prevented code generation for certain side-effect free operations,
     37       such as `add r, r, #0`, in the macro assembler.
     38     + Other small bug fixes.
     39 
     40 * 1.1
     41     + Improved robustness of instruction decoder and disassembler.
     42     + Added support for double-to-float conversions using `fcvt`.
     43     + Added support for more fixed-point to floating-point conversions (`ucvtf`
     44       and `scvtf`).
     45     + Added instruction statistics collection class `instrument-a64.cc`.
     46 
     47 * 1.0
     48     + Initial release.
     49