Lines Matching refs:vvvv
1476 insn->vvvv = (Reg)fixupRegValue(insn,
1478 insn->vvvv,
1612 * readVVVV - Consumes vvvv from an instruction if it has a VEX prefix.
1615 * @return - 0 if the vvvv was successfully consumed; nonzero
1621 int vvvv;
1623 vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 |
1626 vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]);
1628 vvvv = vvvvFromVEX2of2(insn->vectorExtensionPrefix[1]);
1630 vvvv = vvvvFromXOP3of3(insn->vectorExtensionPrefix[2]);
1635 vvvv &= 0x7;
1637 insn->vvvv = static_cast<Reg>(vvvv);
1672 /* If non-zero vvvv specified, need to make sure one of the operands
1675 needVVVV = hasVVVV && (insn->vvvv != 0);
1762 needVVVV = 0; /* Mark that we have found a VVVV operand. */
1780 /* If we didn't find ENCODING_VVVV operand, but non-zero vvvv present, fail */
