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    Searched defs:RegClass (Results 1 - 10 of 10) sorted by null

  /external/llvm/lib/Target/R600/MCTargetDesc/
SIMCCodeEmitter.cpp 79 unsigned RegClass = Desc.OpInfo[OpNo].RegClass;
80 return (AMDGPU::SSrc_32RegClassID == RegClass) ||
81 (AMDGPU::SSrc_64RegClassID == RegClass) ||
82 (AMDGPU::VSrc_32RegClassID == RegClass) ||
83 (AMDGPU::VSrc_64RegClassID == RegClass);
  /external/llvm/include/llvm/CodeGen/
RegisterClassInfo.h 45 std::unique_ptr<RCInfo[]> RegClass;
71 const RCInfo &RCI = RegClass[RC->getID()];
  /external/llvm/lib/CodeGen/
TargetInstrInfo.cpp 48 short RegClass = MCID.OpInfo[OpNum].RegClass;
50 return TRI->getPointerRegClass(MF, RegClass);
53 if (RegClass < 0)
57 return TRI->getRegClass(RegClass);
  /external/llvm/lib/Target/R600/
AMDGPUISelDAGToDAG.cpp 132 int RegClass = Desc.OpInfo[OpIdx].RegClass;
133 if (RegClass == -1)
136 return TM.getRegisterInfo()->getRegClass(RegClass);
290 SDValue RegClass = CurDAG->getTargetConstant(RegClassID, MVT::i32);
294 N->getOperand(0), RegClass);
SIISelLowering.cpp     [all...]
SIInstrInfo.cpp 563 int RegClass = Desc.OpInfo[i].RegClass;
564 if (!RI.regClassCanUseImmediate(RegClass) &&
584 int RegClass = Desc.OpInfo[i].RegClass;
585 if (RegClass != -1) {
590 const TargetRegisterClass *RC = RI.getRegClass(RegClass);
739 Desc.OpInfo[OpNo].RegClass == -1)
742 unsigned RCID = Desc.OpInfo[OpNo].RegClass;
762 unsigned RCID = get(MI->getOpcode()).OpInfo[OpIdx].RegClass;
    [all...]
  /external/llvm/include/llvm/MC/
MCInstrDesc.h 60 /// RegClass - This specifies the register class enumeration of the operand
64 int16_t RegClass;
  /external/llvm/lib/CodeGen/SelectionDAG/
FastISel.cpp     [all...]
  /external/llvm/lib/Target/ARM/
ARMISelDAGToDAG.cpp     [all...]
  /external/llvm/utils/TableGen/
CodeGenRegisters.cpp 701 // Verify that all altorder members are regclass members.
    [all...]

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