| /external/llvm/lib/Target/ARM/ |
| Thumb2RegisterInfo.h | 33 ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0,
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| Thumb2ITBlockPass.cpp | 45 ARMCC::CondCodes CC, ARMCC::CondCodes OCC,
107 ARMCC::CondCodes CC, ARMCC::CondCodes OCC,
155 ARMCC::CondCodes NCC = getITInstrPredicate(I, NPredReg);
172 ARMCC::CondCodes CC = getITInstrPredicate(MI, PredReg);
195 ARMCC::CondCodes OCC = ARMCC::getOppositeCondition(CC);
212 ARMCC::CondCodes NCC = getITInstrPredicate(NMI, NPredReg);
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| Thumb1RegisterInfo.h | 41 ARMCC::CondCodes Pred = ARMCC::AL, unsigned PredReg = 0,
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| Thumb2RegisterInfo.cpp | 40 ARMCC::CondCodes Pred, unsigned PredReg,
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| Thumb2InstrInfo.h | 69 ARMCC::CondCodes getITInstrPredicate(const MachineInstr *MI, unsigned &PredReg);
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| ARMBaseInstrInfo.h | 77 ARMCC::CondCodes getPredicate(const MachineInstr *MI) const {
79 return PIdx != -1 ? (ARMCC::CondCodes)MI->getOperand(PIdx).getImm()
382 ARMCC::CondCodes getInstrPredicate(const MachineInstr *MI, unsigned &PredReg);
403 ARMCC::CondCodes Pred, unsigned PredReg,
409 ARMCC::CondCodes Pred, unsigned PredReg,
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| ARMLoadStoreOptimizer.cpp | 103 ARMCC::CondCodes Pred, unsigned PredReg);
106 ARMCC::CondCodes Pred, unsigned PredReg, unsigned Scratch,
119 ARMCC::CondCodes Pred,
126 ARMCC::CondCodes Pred, unsigned PredReg,
336 ARMCC::CondCodes Pred, unsigned PredReg) {
416 int Opcode, ARMCC::CondCodes Pred,
616 ARMCC::CondCodes Pred, unsigned PredReg,
710 ARMCC::CondCodes Pred, unsigned PredReg,
795 ARMCC::CondCodes Pred, unsigned PredReg) {
830 ARMCC::CondCodes Pred, unsigned PredReg)
[all...] |
| ARMBaseRegisterInfo.h | 172 int Val, ARMCC::CondCodes Pred = ARMCC::AL,
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| ARMBaseRegisterInfo.cpp | 402 ARMCC::CondCodes Pred,
758 ARMCC::CondCodes Pred = (PIdx == -1)
759 ? ARMCC::AL : (ARMCC::CondCodes)MI.getOperand(PIdx).getImm();
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| Thumb2InstrInfo.cpp | 62 ARMCC::CondCodes CC = getInstrPredicate(Tail, PredReg);
215 ARMCC::CondCodes Pred, unsigned PredReg,
624 ARMCC::CondCodes
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| /external/llvm/lib/Target/MSP430/ |
| MSP430.h | 23 enum CondCodes {
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| MSP430InstrInfo.cpp | 133 MSP430CC::CondCodes CC = static_cast<MSP430CC::CondCodes>(Cond[0].getImm());
228 MSP430CC::CondCodes BranchCode =
229 static_cast<MSP430CC::CondCodes>(I->getOperand(1).getImm());
251 MSP430CC::CondCodes OldBranchCode = (MSP430CC::CondCodes)Cond[0].getImm();
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| /external/llvm/lib/Target/NVPTX/ |
| NVPTX.h | 34 enum CondCodes {
44 inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) {
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| /external/llvm/lib/Target/Sparc/ |
| Sparc.h | 44 enum CondCodes {
81 inline static const char *SPARCCondCodeToString(SPCC::CondCodes CC) {
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| SparcInstrInfo.cpp | 88 static SPCC::CondCodes GetOppositeBranchCondition(SPCC::CondCodes CC)
182 SPCC::CondCodes BranchCode = (SPCC::CondCodes)I->getOperand(1).getImm();
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| /external/chromium_org/third_party/mesa/src/src/mesa/program/ |
| prog_execute.h | 66 GLuint CondCodes[4]; /**< COND_* value for x/y/z/w */
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| prog_execute.c | 460 if (test_cc(machine->CondCodes[GET_SWZ(swizzle, 0)], condMask) ||
461 test_cc(machine->CondCodes[GET_SWZ(swizzle, 1)], condMask) ||
462 test_cc(machine->CondCodes[GET_SWZ(swizzle, 2)], condMask) ||
463 test_cc(machine->CondCodes[GET_SWZ(swizzle, 3)], condMask)) {
506 if (!test_cc(machine->CondCodes[GET_SWZ(dstReg->CondSwizzle, 0)],
511 if (!test_cc(machine->CondCodes[GET_SWZ(dstReg->CondSwizzle, 1)],
516 if (!test_cc(machine->CondCodes[GET_SWZ(dstReg->CondSwizzle, 2)],
521 if (!test_cc(machine->CondCodes[GET_SWZ(dstReg->CondSwizzle, 3)],
545 machine->CondCodes[0] = generate_cc(value[0]);
547 machine->CondCodes[1] = generate_cc(value[1])
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/swrast/ |
| s_fragprog.c | 198 machine->CondCodes[0] = COND_EQ;
199 machine->CondCodes[1] = COND_EQ;
200 machine->CondCodes[2] = COND_EQ;
201 machine->CondCodes[3] = COND_EQ;
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMBaseInfo.h | 27 // The CondCodes constants map directly to the 4-bit encoding of the
29 enum CondCodes { // Meaning (integer) Meaning (floating-point)
47 inline static CondCodes getOppositeCondition(CondCodes CC) {
68 inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
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| /external/mesa3d/src/mesa/program/ |
| prog_execute.h | 66 GLuint CondCodes[4]; /**< COND_* value for x/y/z/w */
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| prog_execute.c | 460 if (test_cc(machine->CondCodes[GET_SWZ(swizzle, 0)], condMask) ||
461 test_cc(machine->CondCodes[GET_SWZ(swizzle, 1)], condMask) ||
462 test_cc(machine->CondCodes[GET_SWZ(swizzle, 2)], condMask) ||
463 test_cc(machine->CondCodes[GET_SWZ(swizzle, 3)], condMask)) {
506 if (!test_cc(machine->CondCodes[GET_SWZ(dstReg->CondSwizzle, 0)],
511 if (!test_cc(machine->CondCodes[GET_SWZ(dstReg->CondSwizzle, 1)],
516 if (!test_cc(machine->CondCodes[GET_SWZ(dstReg->CondSwizzle, 2)],
521 if (!test_cc(machine->CondCodes[GET_SWZ(dstReg->CondSwizzle, 3)],
545 machine->CondCodes[0] = generate_cc(value[0]);
547 machine->CondCodes[1] = generate_cc(value[1])
[all...] |
| /external/mesa3d/src/mesa/swrast/ |
| s_fragprog.c | 198 machine->CondCodes[0] = COND_EQ;
199 machine->CondCodes[1] = COND_EQ;
200 machine->CondCodes[2] = COND_EQ;
201 machine->CondCodes[3] = COND_EQ;
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| /external/chromium_org/third_party/mesa/src/src/mesa/tnl/ |
| t_vb_program.c | 252 machine->CondCodes[0] = COND_EQ;
253 machine->CondCodes[1] = COND_EQ;
254 machine->CondCodes[2] = COND_EQ;
255 machine->CondCodes[3] = COND_EQ;
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| /external/mesa3d/src/mesa/tnl/ |
| t_vb_program.c | 252 machine->CondCodes[0] = COND_EQ;
253 machine->CondCodes[1] = COND_EQ;
254 machine->CondCodes[2] = COND_EQ;
255 machine->CondCodes[3] = COND_EQ;
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| /external/llvm/lib/Target/Sparc/InstPrinter/ |
| SparcInstPrinter.cpp | 170 O << SPARCCondCodeToString((SPCC::CondCodes)CC);
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