| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 272 /// EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an
275 EXTRACT_SUBVECTOR,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorTypes.cpp | 55 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
567 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
782 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
784 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
[all...] |
| SelectionDAGDumper.cpp | 201 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
|
| SelectionDAGBuilder.cpp | 299 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, ValueVT, Val,
547 Ops[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL,
[all...] |
| SelectionDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 82 case ISD::EXTRACT_SUBVECTOR:
[all...] |
| DAGCombiner.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 513 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT.getSimpleVT(), Custom);
[all...] |
| AArch64ISelDAGToDAG.cpp | 404 if (EV.getOpcode() != ISD::EXTRACT_SUBVECTOR)
[all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 210 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2f32, Custom);
211 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v2i32, Custom);
212 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v4f32, Custom);
213 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v4i32, Custom);
214 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v8f32, Custom);
215 setOperationAction(ISD::EXTRACT_SUBVECTOR, MVT::v8i32, Custom);
531 case ISD::EXTRACT_SUBVECTOR: return LowerEXTRACT_SUBVECTOR(Op, DAG);
[all...] |
| SIISelLowering.cpp | 193 case ISD::EXTRACT_SUBVECTOR:
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 118 setOperationAction(ISD::EXTRACT_SUBVECTOR, VT, Legal);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 91 // Extract the relevant vectorWidth bits. Generate an EXTRACT_SUBVECTOR
106 SDValue Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec,
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | [all...] |
