| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.h | 54 SmallVectorImpl<MCFixup> &Fixups,
60 SmallVectorImpl<MCFixup> &Fixups,
67 SmallVectorImpl<MCFixup> &Fixups,
74 SmallVectorImpl<MCFixup> &Fixups,
81 SmallVectorImpl<MCFixup> &Fixups,
88 SmallVectorImpl<MCFixup> &Fixups,
95 SmallVectorImpl<MCFixup> &Fixups,
102 SmallVectorImpl<MCFixup> &Fixups,
109 SmallVectorImpl<MCFixup> &Fixups,
115 SmallVectorImpl<MCFixup> &Fixups,
[all...] |
| MipsMCCodeEmitter.cpp | 146 SmallVectorImpl<MCFixup> &Fixups,
169 unsigned long N = Fixups.size();
170 uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI);
182 if (Fixups.size() > N)
183 Fixups.pop_back();
186 Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI);
205 SmallVectorImpl<MCFixup> &Fixups,
217 Fixups.push_back(MCFixup::Create(0, Expr,
227 SmallVectorImpl<MCFixup> &Fixups,
239 Fixups.push_back(MCFixup::Create(0, Expr
[all...] |
| MipsFixupKinds.h | 25 enum Fixups {
26 // Branch fixups resulting in R_MIPS_16.
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
| AMDGPUMCCodeEmitter.h | 29 SmallVectorImpl<MCFixup> &Fixups) const;
32 SmallVectorImpl<MCFixup> &Fixups) const {
37 SmallVectorImpl<MCFixup> &Fixups) const {
41 SmallVectorImpl<MCFixup> &Fixups) const {
48 SmallVectorImpl<MCFixup> &Fixups) const {
52 SmallVectorImpl<MCFixup> &Fixups) const {
|
| R600MCCodeEmitter.cpp | 54 SmallVectorImpl<MCFixup> &Fixups) const;
58 SmallVectorImpl<MCFixup> &Fixups) const;
61 void EmitALUInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
66 SmallVectorImpl<MCFixup> &Fixups,
68 void EmitTexInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
151 SmallVectorImpl<MCFixup> &Fixups) const {
153 EmitTexInstr(MI, Fixups, OS);
164 uint64_t inst = getBinaryCodeForInstr(MI, Fixups);
176 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups);
186 EmitALUInstr(MI, Fixups, OS)
[all...] |
| SIMCCodeEmitter.cpp | 75 SmallVectorImpl<MCFixup> &Fixups) const;
79 SmallVectorImpl<MCFixup> &Fixups) const;
132 SmallVectorImpl<MCFixup> &Fixups) const {
133 uint64_t Encoding = getBinaryCodeForInstr(MI, Fixups);
142 SmallVectorImpl<MCFixup> &Fixups) const {
|
| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| AMDGPUMCCodeEmitter.h | 29 SmallVectorImpl<MCFixup> &Fixups) const;
32 SmallVectorImpl<MCFixup> &Fixups) const {
37 SmallVectorImpl<MCFixup> &Fixups) const {
41 SmallVectorImpl<MCFixup> &Fixups) const {
48 SmallVectorImpl<MCFixup> &Fixups) const {
52 SmallVectorImpl<MCFixup> &Fixups) const {
|
| R600MCCodeEmitter.cpp | 54 SmallVectorImpl<MCFixup> &Fixups) const;
58 SmallVectorImpl<MCFixup> &Fixups) const;
61 void EmitALUInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
66 SmallVectorImpl<MCFixup> &Fixups,
68 void EmitTexInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
151 SmallVectorImpl<MCFixup> &Fixups) const {
153 EmitTexInstr(MI, Fixups, OS);
164 uint64_t inst = getBinaryCodeForInstr(MI, Fixups);
176 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups);
186 EmitALUInstr(MI, Fixups, OS)
[all...] |
| SIMCCodeEmitter.cpp | 75 SmallVectorImpl<MCFixup> &Fixups) const;
79 SmallVectorImpl<MCFixup> &Fixups) const;
132 SmallVectorImpl<MCFixup> &Fixups) const {
133 uint64_t Encoding = getBinaryCodeForInstr(MI, Fixups);
142 SmallVectorImpl<MCFixup> &Fixups) const {
|
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCCodeEmitter.cpp | 39 SmallVectorImpl<MCFixup> &Fixups,
45 SmallVectorImpl<MCFixup> &Fixups,
49 // MO in MI. Fixups is the list of fixups against MI.
51 SmallVectorImpl<MCFixup> &Fixups,
59 SmallVectorImpl<MCFixup> &Fixups,
62 SmallVectorImpl<MCFixup> &Fixups,
65 SmallVectorImpl<MCFixup> &Fixups,
68 SmallVectorImpl<MCFixup> &Fixups,
71 SmallVectorImpl<MCFixup> &Fixups,
[all...] |
| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| AMDGPUMCCodeEmitter.h | 32 SmallVectorImpl<MCFixup> &Fixups,
36 SmallVectorImpl<MCFixup> &Fixups,
|
| SIMCCodeEmitter.cpp | 58 SmallVectorImpl<MCFixup> &Fixups,
63 SmallVectorImpl<MCFixup> &Fixups,
130 SmallVectorImpl<MCFixup> &Fixups,
133 uint64_t Encoding = getBinaryCodeForInstr(MI, Fixups, STI);
174 SmallVectorImpl<MCFixup> &Fixups,
182 Fixups.push_back(MCFixup::Create(0, Expr, Kind, MI.getLoc()));
|
| R600MCCodeEmitter.cpp | 45 SmallVectorImpl<MCFixup> &Fixups,
50 SmallVectorImpl<MCFixup> &Fixups,
90 SmallVectorImpl<MCFixup> &Fixups,
100 uint64_t InstWord01 = getBinaryCodeForInstr(MI, Fixups, STI);
124 uint64_t Word01 = getBinaryCodeForInstr(MI, Fixups, STI);
134 uint64_t Inst = getBinaryCodeForInstr(MI, Fixups, STI);
|
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCCodeEmitter.cpp | 49 SmallVectorImpl<MCFixup> &Fixups,
52 SmallVectorImpl<MCFixup> &Fixups,
55 SmallVectorImpl<MCFixup> &Fixups,
58 SmallVectorImpl<MCFixup> &Fixups,
61 SmallVectorImpl<MCFixup> &Fixups,
64 SmallVectorImpl<MCFixup> &Fixups,
67 SmallVectorImpl<MCFixup> &Fixups,
70 SmallVectorImpl<MCFixup> &Fixups,
73 SmallVectorImpl<MCFixup> &Fixups,
76 SmallVectorImpl<MCFixup> &Fixups,
[all...] |
| PPCFixupKinds.h | 19 enum Fixups {
|
| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcMCCodeEmitter.cpp | 44 SmallVectorImpl<MCFixup> &Fixups,
50 SmallVectorImpl<MCFixup> &Fixups,
56 SmallVectorImpl<MCFixup> &Fixups,
60 SmallVectorImpl<MCFixup> &Fixups,
63 SmallVectorImpl<MCFixup> &Fixups,
66 SmallVectorImpl<MCFixup> &Fixups,
69 SmallVectorImpl<MCFixup> &Fixups,
84 SmallVectorImpl<MCFixup> &Fixups,
86 unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI);
104 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI)
[all...] |
| SparcFixupKinds.h | 17 enum Fixups {
70 /// fixups for Thread Local Storage
|
| SparcMCExpr.h | 85 Sparc::Fixups getFixupKind() const { return getFixupKind(Kind); }
106 static Sparc::Fixups getFixupKind(VariantKind Kind);
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86FixupKinds.h | 17 enum Fixups {
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MCCodeEmitter.cpp | 31 STATISTIC(MCNumFixups, "Number of MC fixups created.");
50 SmallVectorImpl<MCFixup> &Fixups,
56 SmallVectorImpl<MCFixup> &Fixups,
64 SmallVectorImpl<MCFixup> &Fixups,
70 SmallVectorImpl<MCFixup> &Fixups,
76 SmallVectorImpl<MCFixup> &Fixups,
82 SmallVectorImpl<MCFixup> &Fixups,
88 SmallVectorImpl<MCFixup> &Fixups,
95 SmallVectorImpl<MCFixup> &Fixups,
101 SmallVectorImpl<MCFixup> &Fixups,
[all...] |
| AArch64FixupKinds.h | 18 enum Fixups {
31 // fixup_aarch64_ldst_imm12_* - unsigned 12-bit fixups for load and
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 69 SmallVectorImpl<MCFixup> &Fixups,
75 SmallVectorImpl<MCFixup> &Fixups,
82 SmallVectorImpl<MCFixup> &Fixups,
87 SmallVectorImpl<MCFixup> &Fixups,
93 SmallVectorImpl<MCFixup> &Fixups,
99 SmallVectorImpl<MCFixup> &Fixups,
104 SmallVectorImpl<MCFixup> &Fixups,
109 SmallVectorImpl<MCFixup> &Fixups,
114 SmallVectorImpl<MCFixup> &Fixups,
120 SmallVectorImpl<MCFixup> &Fixups,
[all...] |
| ARMFixupKinds.h | 17 enum Fixups {
62 // The following fixups handle the ARM BL instructions. These can be
69 // fixup_arm_uncondbl and fixup_arm_condbl as identical fixups.
|
| /external/llvm/include/llvm/MC/ |
| MCCodeEmitter.h | 39 SmallVectorImpl<MCFixup> &Fixups,
|
| /external/llvm/lib/MC/ |
| WinCOFFStreamer.cpp | 49 SmallVector<MCFixup, 4> Fixups;
52 getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups, STI);
55 // Add the fixups and data.
56 for (unsigned i = 0, e = Fixups.size(); i != e; ++i) {
57 Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size());
58 DF->getFixups().push_back(Fixups[i]);
|
