| /art/compiler/dex/quick/x86/ |
| fp_x86.cc | 282 LoadConstantWide(rl_result.reg, 0x7fffffffffffffff);
307 LoadConstantWide(rl_result.reg, 0x7fffffffffffffff);
668 LoadConstantWide(rl_result.reg, 0x7fffffffffffffff);
672 LoadConstantWide(sign_mask, 0x7fffffffffffffff);
732 LoadConstantWide(rl_result.reg, INT64_C(0x7ff8000000000000));
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| int_x86.cc | 463 LoadConstantWide(tmp, val);
501 LoadConstantWide(tmp, val);
[all...] |
| utility_x86.cc | 560 LIR* X86Mir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) {
612 res = LoadConstantWide(r_temp, value);
[all...] |
| codegen_x86.h | 77 LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
[all...] |
| /art/compiler/dex/quick/arm64/ |
| utility_arm64.cc | 400 return LoadConstantWide(r_dest, value);
455 // TODO: clean up the names. LoadConstantWide() should really be LoadConstantNoClobberWide().
456 LIR* Arm64Mir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) {
922 LoadConstantWide(r_scratch, value);
970 res = LoadConstantWide(r_tmp, value);
[all...] |
| codegen_arm64.h | 84 LIR* LoadConstantWide(RegStorage r_dest, int64_t value) OVERRIDE;
|
| int_arm64.cc | 488 LoadConstantWide(r_magic, magic_table[lit].magic64);
[all...] |
| /art/compiler/dex/quick/arm/ |
| fp_arm.cc | 153 LoadConstantWide(tmp2, 0x41f0000000000000LL);
178 LoadConstantWide(const_val, INT64_C(0x41f0000000000000));
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| codegen_arm.h | 40 LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
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| utility_arm.cc | 641 LIR* ArmMir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) {
[all...] |
| /art/compiler/dex/quick/ |
| gen_loadstore.cc | 124 LoadConstantWide(r_dest, mir_graph_->ConstantValueWide(rl_src));
|
| mir_to_lir.cc | 526 LoadConstantWide(rl_result.reg, static_cast<int64_t>(vB) << 48);
[all...] |
| mir_to_lir.h | [all...] |
| gen_common.cc | [all...] |
| /art/compiler/dex/quick/mips/ |
| codegen_mips.h | 40 LIR* LoadConstantWide(RegStorage r_dest, int64_t value);
|
| utility_mips.cc | 344 LIR* MipsMir2Lir::LoadConstantWide(RegStorage r_dest, int64_t value) {
|
