| /external/chromium_org/v8/test/cctest/ |
| test-assembler-arm64.cc | 262 __ Orr(csp, xzr, Operand(0x1fff));
266 __ Orr(wcsp, wzr, Operand(0xfffffff8L));
270 __ Orr(csp, xzr, Operand(0xfffffff8L));
518 TEST(orr) {
526 __ Orr(x2, x0, Operand(x1));
527 __ Orr(w3, w0, Operand(w1, LSL, 28));
528 __ Orr(x4, x0, Operand(x1, LSL, 32));
529 __ Orr(x5, x0, Operand(x1, LSR, 4));
530 __ Orr(w6, w0, Operand(w1, ASR, 4));
531 __ Orr(x7, x0, Operand(x1, ASR, 4))
[all...] |
| test-disasm-arm64.cc | 126 COMPARE(dci(0x2a000020), "orr w0, w1, w0");
641 COMPARE(orr(w7, w8, Operand(0xaaaaaaaa)),
642 "orr w7, w8, #0xaaaaaaaa");
643 COMPARE(orr(x9, x10, Operand(0x5555555555555555L)),
644 "orr x9, x10, #0x5555555555555555");
659 "orr w11, w12, #0xbfffbfff");
661 "orr x13, x14, #0x7e7e7e7e7e7e7e7e");
673 COMPARE(orr(csp, xzr, Operand(15)), "orr csp, xzr, #0xf");
677 COMPARE(orr(w0, wzr, Operand(0x00000780)), "orr w0, wzr, #0x780")
[all...] |
| /external/chromium_org/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | 254 __ Orr(i.OutputRegister(), i.InputRegister(0), i.InputOperand(1));
257 __ Orr(i.OutputRegister32(), i.InputRegister32(0), i.InputOperand32(1));
|
| /external/chromium_org/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 89 void MacroAssembler::Orr(const Register& rd,
94 LogicalMacro(rd, rn, operand, ORR);
[all...] |
| regexp-macro-assembler-arm64.cc | 337 __ Orr(w10, w10, 0x20); // Convert capture character to lower-case.
338 __ Orr(w11, w11, 0x20); // Also convert input character.
769 __ Orr(twice_non_position_value(),
[all...] |
| code-stubs-arm64.cc | 183 __ Orr(mantissa, mantissa, 1UL << HeapNumber::kMantissaBits);
341 __ Orr(scratch, left_type, right_type);
[all...] |
| codegen-arm64.cc | 613 __ Orr(temp1.W(), temp3.W(), Operand(temp1.W(), LSL, 20));
|
| full-codegen-arm64.cc | 69 __ Orr(temp, reg1, reg2);
[all...] |
| macro-assembler-arm64.h | 152 inline void Orr(const Register& rd,
[all...] |
| macro-assembler-arm64.cc | 92 case ORR: // Fall through.
108 case ORR:
175 // 4. 32-bit orr immediate.
176 // 5. 64-bit orr immediate.
260 // could also be achieved using an orr instruction (like orn used by Mvn),
279 // If csp is an operand, add #0 is emitted, otherwise, orr #0.
430 // Immediate can be represented in a logical orr instruction.
431 LogicalImmediate(dst, AppropriateZeroRegFor(dst), n, imm_s, imm_r, ORR);
452 // different immediate that may be encodable using movn or orr-immediate.
[all...] |
| lithium-codegen-arm64.cc | [all...] |
| /external/vixl/test/ |
| test-assembler-a64.cc | 228 __ Orr(sp, xzr, 0x1fff);
232 __ Orr(wsp, wzr, 0xfffffff8);
236 __ Orr(sp, xzr, 0xfffffff8);
479 TEST(orr) {
486 __ Orr(x2, x0, Operand(x1));
487 __ Orr(w3, w0, Operand(w1, LSL, 28));
488 __ Orr(x4, x0, Operand(x1, LSL, 32));
489 __ Orr(x5, x0, Operand(x1, LSR, 4));
490 __ Orr(w6, w0, Operand(w1, ASR, 4));
491 __ Orr(x7, x0, Operand(x1, ASR, 4))
[all...] |
| test-disasm-a64.cc | 102 COMPARE(dci(0x2a000020), "orr w0, w1, w0");
610 COMPARE(orr(w7, w8, Operand(0xaaaaaaaa)),
611 "orr w7, w8, #0xaaaaaaaa");
612 COMPARE(orr(x9, x10, Operand(0x5555555555555555)),
613 "orr x9, x10, #0x5555555555555555");
628 "orr w11, w12, #0xbfffbfff");
630 "orr x13, x14, #0x7e7e7e7e7e7e7e7e");
642 COMPARE(orr(sp, xzr, Operand(15)), "orr sp, xzr, #0xf");
646 COMPARE(orr(w0, wzr, Operand(0x00000780)), "orr w0, wzr, #0x780")
[all...] |
| /external/vixl/src/a64/ |
| macro-assembler-a64.cc | 88 void MacroAssembler::Orr(const Register& rd,
92 LogicalMacro(rd, rn, operand, ORR);
146 case ORR: // Fall through.
162 case ORR:
223 // could also be achieved using an orr instruction (like orn used by Mvn),
240 // If the sp is an operand, add #0 is emitted, otherwise, orr #0.
283 // 4. 32-bit orr immediate.
284 // 5. 64-bit orr immediate.
302 // Immediate can be represented in a logical orr instruction.
304 LogicalImmediate(rd, AppropriateZeroRegFor(rd), n, imm_s, imm_r, ORR);
[all...] |
| macro-assembler-a64.h | 111 void Orr(const Register& rd,
[all...] |
