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      1 /**************************************************************************
      2 
      3 Copyright (C) 2004-2005 Nicolai Haehnle et al.
      4 
      5 Permission is hereby granted, free of charge, to any person obtaining a
      6 copy of this software and associated documentation files (the "Software"),
      7 to deal in the Software without restriction, including without limitation
      8 on the rights to use, copy, modify, merge, publish, distribute, sub
      9 license, and/or sell copies of the Software, and to permit persons to whom
     10 the Software is furnished to do so, subject to the following conditions:
     11 
     12 The above copyright notice and this permission notice (including the next
     13 paragraph) shall be included in all copies or substantial portions of the
     14 Software.
     15 
     16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18 FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
     19 THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
     20 DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
     21 OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
     22 USE OR OTHER DEALINGS IN THE SOFTWARE.
     23 
     24 **************************************************************************/
     25 
     26 /* *INDENT-OFF* */
     27 
     28 #ifndef _R300_REG_H
     29 #define _R300_REG_H
     30 
     31 #define R300_MC_INIT_MISC_LAT_TIMER	0x180
     32 #	define R300_MC_MISC__MC_CPR_INIT_LAT_SHIFT	0
     33 #	define R300_MC_MISC__MC_VF_INIT_LAT_SHIFT	4
     34 #	define R300_MC_MISC__MC_DISP0R_INIT_LAT_SHIFT	8
     35 #	define R300_MC_MISC__MC_DISP1R_INIT_LAT_SHIFT	12
     36 #	define R300_MC_MISC__MC_FIXED_INIT_LAT_SHIFT	16
     37 #	define R300_MC_MISC__MC_E2R_INIT_LAT_SHIFT	20
     38 #	define R300_MC_MISC__MC_SAME_PAGE_PRIO_SHIFT	24
     39 #	define R300_MC_MISC__MC_GLOBW_INIT_LAT_SHIFT	28
     40 
     41 
     42 #define R300_MC_INIT_GFX_LAT_TIMER	0x154
     43 #	define R300_MC_MISC__MC_G3D0R_INIT_LAT_SHIFT	0
     44 #	define R300_MC_MISC__MC_G3D1R_INIT_LAT_SHIFT	4
     45 #	define R300_MC_MISC__MC_G3D2R_INIT_LAT_SHIFT	8
     46 #	define R300_MC_MISC__MC_G3D3R_INIT_LAT_SHIFT	12
     47 #	define R300_MC_MISC__MC_TX0R_INIT_LAT_SHIFT	16
     48 #	define R300_MC_MISC__MC_TX1R_INIT_LAT_SHIFT	20
     49 #	define R300_MC_MISC__MC_GLOBR_INIT_LAT_SHIFT	24
     50 #	define R300_MC_MISC__MC_GLOBW_FULL_LAT_SHIFT	28
     51 
     52 /*
     53  * This file contains registers and constants for the R300. They have been
     54  * found mostly by examining command buffers captured using glxtest, as well
     55  * as by extrapolating some known registers and constants from the R200.
     56  * I am fairly certain that they are correct unless stated otherwise
     57  * in comments.
     58  */
     59 
     60 #define R300_SE_VPORT_XSCALE                0x1D98
     61 #define R300_SE_VPORT_XOFFSET               0x1D9C
     62 #define R300_SE_VPORT_YSCALE                0x1DA0
     63 #define R300_SE_VPORT_YOFFSET               0x1DA4
     64 #define R300_SE_VPORT_ZSCALE                0x1DA8
     65 #define R300_SE_VPORT_ZOFFSET               0x1DAC
     66 
     67 
     68 /*
     69  * Vertex Array Processing (VAP) Control
     70  * Stolen from r200 code from Christoph Brill (It's a guess!)
     71  */
     72 #define R300_VAP_CNTL	0x2080
     73 
     74 /* This register is written directly and also starts data section
     75  * in many 3d CP_PACKET3's
     76  */
     77 #define R300_VAP_VF_CNTL	0x2084
     78 #	define	R300_VAP_VF_CNTL__PRIM_TYPE__SHIFT              0
     79 #	define  R300_VAP_VF_CNTL__PRIM_NONE                     (0<<0)
     80 #	define  R300_VAP_VF_CNTL__PRIM_POINTS                   (1<<0)
     81 #	define  R300_VAP_VF_CNTL__PRIM_LINES                    (2<<0)
     82 #	define  R300_VAP_VF_CNTL__PRIM_LINE_STRIP               (3<<0)
     83 #	define  R300_VAP_VF_CNTL__PRIM_TRIANGLES                (4<<0)
     84 #	define  R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN             (5<<0)
     85 #	define  R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP           (6<<0)
     86 #	define  R300_VAP_VF_CNTL__PRIM_LINE_LOOP                (12<<0)
     87 #	define  R300_VAP_VF_CNTL__PRIM_QUADS                    (13<<0)
     88 #	define  R300_VAP_VF_CNTL__PRIM_QUAD_STRIP               (14<<0)
     89 #	define  R300_VAP_VF_CNTL__PRIM_POLYGON                  (15<<0)
     90 
     91 #	define	R300_VAP_VF_CNTL__PRIM_WALK__SHIFT              4
     92 	/* State based - direct writes to registers trigger vertex
     93            generation */
     94 #	define	R300_VAP_VF_CNTL__PRIM_WALK_STATE_BASED         (0<<4)
     95 #	define	R300_VAP_VF_CNTL__PRIM_WALK_INDICES             (1<<4)
     96 #	define	R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST         (2<<4)
     97 #	define	R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED     (3<<4)
     98 
     99 	/* I don't think I saw these three used.. */
    100 #	define	R300_VAP_VF_CNTL__COLOR_ORDER__SHIFT            6
    101 #	define	R300_VAP_VF_CNTL__TCL_OUTPUT_CTL_ENA__SHIFT     9
    102 #	define	R300_VAP_VF_CNTL__PROG_STREAM_ENA__SHIFT        10
    103 
    104 	/* index size - when not set the indices are assumed to be 16 bit */
    105 #	define	R300_VAP_VF_CNTL__INDEX_SIZE_32bit              (1<<11)
    106 	/* number of vertices */
    107 #	define	R300_VAP_VF_CNTL__NUM_VERTICES__SHIFT           16
    108 
    109 /* BEGIN: Wild guesses */
    110 #define R300_VAP_OUTPUT_VTX_FMT_0           0x2090
    111 #       define R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT     (1<<0)
    112 #       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_PRESENT   (1<<1)
    113 #       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_1_PRESENT (1<<2)  /* GUESS */
    114 #       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_2_PRESENT (1<<3)  /* GUESS */
    115 #       define R300_VAP_OUTPUT_VTX_FMT_0__COLOR_3_PRESENT (1<<4)  /* GUESS */
    116 #       define R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT (1<<16) /* GUESS */
    117 
    118 #define R300_VAP_OUTPUT_VTX_FMT_1           0x2094
    119 	/* each of the following is 3 bits wide, specifies number
    120 	   of components */
    121 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT 0
    122 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT 3
    123 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT 6
    124 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT 9
    125 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT 12
    126 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT 15
    127 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT 18
    128 #       define R300_VAP_OUTPUT_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT 21
    129 /* END: Wild guesses */
    130 
    131 #define R300_SE_VTE_CNTL                  0x20b0
    132 #	define     R300_VPORT_X_SCALE_ENA                0x00000001
    133 #	define     R300_VPORT_X_OFFSET_ENA               0x00000002
    134 #	define     R300_VPORT_Y_SCALE_ENA                0x00000004
    135 #	define     R300_VPORT_Y_OFFSET_ENA               0x00000008
    136 #	define     R300_VPORT_Z_SCALE_ENA                0x00000010
    137 #	define     R300_VPORT_Z_OFFSET_ENA               0x00000020
    138 #	define     R300_VTX_XY_FMT                       0x00000100
    139 #	define     R300_VTX_Z_FMT                        0x00000200
    140 #	define     R300_VTX_W0_FMT                       0x00000400
    141 #	define     R300_VTX_W0_NORMALIZE                 0x00000800
    142 #	define     R300_VTX_ST_DENORMALIZED              0x00001000
    143 
    144 /* BEGIN: Vertex data assembly - lots of uncertainties */
    145 
    146 /* gap */
    147 
    148 #define R300_VAP_CNTL_STATUS              0x2140
    149 #	define R300_VC_NO_SWAP                  (0 << 0)
    150 #	define R300_VC_16BIT_SWAP               (1 << 0)
    151 #	define R300_VC_32BIT_SWAP               (2 << 0)
    152 #	define R300_VAP_TCL_BYPASS		(1 << 8)
    153 
    154 /* gap */
    155 
    156 /* Where do we get our vertex data?
    157  *
    158  * Vertex data either comes either from immediate mode registers or from
    159  * vertex arrays.
    160  * There appears to be no mixed mode (though we can force the pitch of
    161  * vertex arrays to 0, effectively reusing the same element over and over
    162  * again).
    163  *
    164  * Immediate mode is controlled by the INPUT_CNTL registers. I am not sure
    165  * if these registers influence vertex array processing.
    166  *
    167  * Vertex arrays are controlled via the 3D_LOAD_VBPNTR packet3.
    168  *
    169  * In both cases, vertex attributes are then passed through INPUT_ROUTE.
    170  *
    171  * Beginning with INPUT_ROUTE_0_0 is a list of WORDs that route vertex data
    172  * into the vertex processor's input registers.
    173  * The first word routes the first input, the second word the second, etc.
    174  * The corresponding input is routed into the register with the given index.
    175  * The list is ended by a word with INPUT_ROUTE_END set.
    176  *
    177  * Always set COMPONENTS_4 in immediate mode.
    178  */
    179 
    180 #define R300_VAP_INPUT_ROUTE_0_0            0x2150
    181 #       define R300_INPUT_ROUTE_COMPONENTS_1     (0 << 0)
    182 #       define R300_INPUT_ROUTE_COMPONENTS_2     (1 << 0)
    183 #       define R300_INPUT_ROUTE_COMPONENTS_3     (2 << 0)
    184 #       define R300_INPUT_ROUTE_COMPONENTS_4     (3 << 0)
    185 #       define R300_INPUT_ROUTE_COMPONENTS_RGBA  (4 << 0) /* GUESS */
    186 #       define R300_VAP_INPUT_ROUTE_IDX_SHIFT    8
    187 #       define R300_VAP_INPUT_ROUTE_IDX_MASK     (31 << 8) /* GUESS */
    188 #       define R300_VAP_INPUT_ROUTE_END          (1 << 13)
    189 #       define R300_INPUT_ROUTE_IMMEDIATE_MODE   (0 << 14) /* GUESS */
    190 #       define R300_INPUT_ROUTE_FLOAT            (1 << 14) /* GUESS */
    191 #       define R300_INPUT_ROUTE_UNSIGNED_BYTE    (2 << 14) /* GUESS */
    192 #       define R300_INPUT_ROUTE_FLOAT_COLOR      (3 << 14) /* GUESS */
    193 #define R300_VAP_INPUT_ROUTE_0_1            0x2154
    194 #define R300_VAP_INPUT_ROUTE_0_2            0x2158
    195 #define R300_VAP_INPUT_ROUTE_0_3            0x215C
    196 #define R300_VAP_INPUT_ROUTE_0_4            0x2160
    197 #define R300_VAP_INPUT_ROUTE_0_5            0x2164
    198 #define R300_VAP_INPUT_ROUTE_0_6            0x2168
    199 #define R300_VAP_INPUT_ROUTE_0_7            0x216C
    200 
    201 /* gap */
    202 
    203 /* Notes:
    204  *  - always set up to produce at least two attributes:
    205  *    if vertex program uses only position, fglrx will set normal, too
    206  *  - INPUT_CNTL_0_COLOR and INPUT_CNTL_COLOR bits are always equal.
    207  */
    208 #define R300_VAP_INPUT_CNTL_0               0x2180
    209 #       define R300_INPUT_CNTL_0_COLOR           0x00000001
    210 #define R300_VAP_INPUT_CNTL_1               0x2184
    211 #       define R300_INPUT_CNTL_POS               0x00000001
    212 #       define R300_INPUT_CNTL_NORMAL            0x00000002
    213 #       define R300_INPUT_CNTL_COLOR             0x00000004
    214 #       define R300_INPUT_CNTL_TC0               0x00000400
    215 #       define R300_INPUT_CNTL_TC1               0x00000800
    216 #       define R300_INPUT_CNTL_TC2               0x00001000 /* GUESS */
    217 #       define R300_INPUT_CNTL_TC3               0x00002000 /* GUESS */
    218 #       define R300_INPUT_CNTL_TC4               0x00004000 /* GUESS */
    219 #       define R300_INPUT_CNTL_TC5               0x00008000 /* GUESS */
    220 #       define R300_INPUT_CNTL_TC6               0x00010000 /* GUESS */
    221 #       define R300_INPUT_CNTL_TC7               0x00020000 /* GUESS */
    222 
    223 /* gap */
    224 
    225 /* Words parallel to INPUT_ROUTE_0; All words that are active in INPUT_ROUTE_0
    226  * are set to a swizzling bit pattern, other words are 0.
    227  *
    228  * In immediate mode, the pattern is always set to xyzw. In vertex array
    229  * mode, the swizzling pattern is e.g. used to set zw components in texture
    230  * coordinates with only tweo components.
    231  */
    232 #define R300_VAP_INPUT_ROUTE_1_0            0x21E0
    233 #       define R300_INPUT_ROUTE_SELECT_X    0
    234 #       define R300_INPUT_ROUTE_SELECT_Y    1
    235 #       define R300_INPUT_ROUTE_SELECT_Z    2
    236 #       define R300_INPUT_ROUTE_SELECT_W    3
    237 #       define R300_INPUT_ROUTE_SELECT_ZERO 4
    238 #       define R300_INPUT_ROUTE_SELECT_ONE  5
    239 #       define R300_INPUT_ROUTE_SELECT_MASK 7
    240 #       define R300_INPUT_ROUTE_X_SHIFT     0
    241 #       define R300_INPUT_ROUTE_Y_SHIFT     3
    242 #       define R300_INPUT_ROUTE_Z_SHIFT     6
    243 #       define R300_INPUT_ROUTE_W_SHIFT     9
    244 #       define R300_INPUT_ROUTE_ENABLE      (15 << 12)
    245 #define R300_VAP_INPUT_ROUTE_1_1            0x21E4
    246 #define R300_VAP_INPUT_ROUTE_1_2            0x21E8
    247 #define R300_VAP_INPUT_ROUTE_1_3            0x21EC
    248 #define R300_VAP_INPUT_ROUTE_1_4            0x21F0
    249 #define R300_VAP_INPUT_ROUTE_1_5            0x21F4
    250 #define R300_VAP_INPUT_ROUTE_1_6            0x21F8
    251 #define R300_VAP_INPUT_ROUTE_1_7            0x21FC
    252 
    253 /* END: Vertex data assembly */
    254 
    255 /* gap */
    256 
    257 /* BEGIN: Upload vertex program and data */
    258 
    259 /*
    260  * The programmable vertex shader unit has a memory bank of unknown size
    261  * that can be written to in 16 byte units by writing the address into
    262  * UPLOAD_ADDRESS, followed by data in UPLOAD_DATA (multiples of 4 DWORDs).
    263  *
    264  * Pointers into the memory bank are always in multiples of 16 bytes.
    265  *
    266  * The memory bank is divided into areas with fixed meaning.
    267  *
    268  * Starting at address UPLOAD_PROGRAM: Vertex program instructions.
    269  * Native limits reported by drivers from ATI suggest size 256 (i.e. 4KB),
    270  * whereas the difference between known addresses suggests size 512.
    271  *
    272  * Starting at address UPLOAD_PARAMETERS: Vertex program parameters.
    273  * Native reported limits and the VPI layout suggest size 256, whereas
    274  * difference between known addresses suggests size 512.
    275  *
    276  * At address UPLOAD_POINTSIZE is a vector (0, 0, ps, 0), where ps is the
    277  * floating point pointsize. The exact purpose of this state is uncertain,
    278  * as there is also the R300_RE_POINTSIZE register.
    279  *
    280  * Multiple vertex programs and parameter sets can be loaded at once,
    281  * which could explain the size discrepancy.
    282  */
    283 #define R300_VAP_PVS_UPLOAD_ADDRESS         0x2200
    284 #       define R300_PVS_UPLOAD_PROGRAM           0x00000000
    285 #       define R300_PVS_UPLOAD_PARAMETERS        0x00000200
    286 #       define R300_PVS_UPLOAD_POINTSIZE         0x00000406
    287 
    288 /* gap */
    289 
    290 #define R300_VAP_PVS_UPLOAD_DATA            0x2208
    291 
    292 /* END: Upload vertex program and data */
    293 
    294 /* gap */
    295 
    296 /* I do not know the purpose of this register. However, I do know that
    297  * it is set to 221C_CLEAR for clear operations and to 221C_NORMAL
    298  * for normal rendering.
    299  */
    300 #define R300_VAP_UNKNOWN_221C               0x221C
    301 #       define R300_221C_NORMAL                  0x00000000
    302 #       define R300_221C_CLEAR                   0x0001C000
    303 
    304 /* These seem to be per-pixel and per-vertex X and Y clipping planes. The first
    305  * plane is per-pixel and the second plane is per-vertex.
    306  *
    307  * This was determined by experimentation alone but I believe it is correct.
    308  *
    309  * These registers are called X_QUAD0_1_FL to X_QUAD0_4_FL by glxtest.
    310  */
    311 #define R300_VAP_CLIP_X_0                   0x2220
    312 #define R300_VAP_CLIP_X_1                   0x2224
    313 #define R300_VAP_CLIP_Y_0                   0x2228
    314 #define R300_VAP_CLIP_Y_1                   0x2230
    315 
    316 /* gap */
    317 
    318 /* Sometimes, END_OF_PKT and 0x2284=0 are the only commands sent between
    319  * rendering commands and overwriting vertex program parameters.
    320  * Therefore, I suspect writing zero to 0x2284 synchronizes the engine and
    321  * avoids bugs caused by still running shaders reading bad data from memory.
    322  */
    323 #define R300_VAP_PVS_STATE_FLUSH_REG        0x2284
    324 
    325 /* Absolutely no clue what this register is about. */
    326 #define R300_VAP_UNKNOWN_2288               0x2288
    327 #       define R300_2288_R300                    0x00750000 /* -- nh */
    328 #       define R300_2288_RV350                   0x0000FFFF /* -- Vladimir */
    329 
    330 /* gap */
    331 
    332 /* Addresses are relative to the vertex program instruction area of the
    333  * memory bank. PROGRAM_END points to the last instruction of the active
    334  * program
    335  *
    336  * The meaning of the two UNKNOWN fields is obviously not known. However,
    337  * experiments so far have shown that both *must* point to an instruction
    338  * inside the vertex program, otherwise the GPU locks up.
    339  *
    340  * fglrx usually sets CNTL_3_UNKNOWN to the end of the program and
    341  * R300_PVS_CNTL_1_POS_END_SHIFT points to instruction where last write to
    342  * position takes place.
    343  *
    344  * Most likely this is used to ignore rest of the program in cases
    345  * where group of verts arent visible. For some reason this "section"
    346  * is sometimes accepted other instruction that have no relationship with
    347  * position calculations.
    348  */
    349 #define R300_VAP_PVS_CNTL_1                 0x22D0
    350 #       define R300_PVS_CNTL_1_PROGRAM_START_SHIFT   0
    351 #       define R300_PVS_CNTL_1_POS_END_SHIFT         10
    352 #       define R300_PVS_CNTL_1_PROGRAM_END_SHIFT     20
    353 /* Addresses are relative the the vertex program parameters area. */
    354 #define R300_VAP_PVS_CNTL_2                 0x22D4
    355 #       define R300_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0
    356 #       define R300_PVS_CNTL_2_PARAM_COUNT_SHIFT  16
    357 #define R300_VAP_PVS_CNTL_3	           0x22D8
    358 #       define R300_PVS_CNTL_3_PROGRAM_UNKNOWN_SHIFT 10
    359 #       define R300_PVS_CNTL_3_PROGRAM_UNKNOWN2_SHIFT 0
    360 
    361 /* The entire range from 0x2300 to 0x2AC inclusive seems to be used for
    362  * immediate vertices
    363  */
    364 #define R300_VAP_VTX_COLOR_R                0x2464
    365 #define R300_VAP_VTX_COLOR_G                0x2468
    366 #define R300_VAP_VTX_COLOR_B                0x246C
    367 #define R300_VAP_VTX_POS_0_X_1              0x2490 /* used for glVertex2*() */
    368 #define R300_VAP_VTX_POS_0_Y_1              0x2494
    369 #define R300_VAP_VTX_COLOR_PKD              0x249C /* RGBA */
    370 #define R300_VAP_VTX_POS_0_X_2              0x24A0 /* used for glVertex3*() */
    371 #define R300_VAP_VTX_POS_0_Y_2              0x24A4
    372 #define R300_VAP_VTX_POS_0_Z_2              0x24A8
    373 /* write 0 to indicate end of packet? */
    374 #define R300_VAP_VTX_END_OF_PKT             0x24AC
    375 
    376 /* gap */
    377 
    378 /* These are values from r300_reg/r300_reg.h - they are known to be correct
    379  * and are here so we can use one register file instead of several
    380  * - Vladimir
    381  */
    382 #define R300_GB_VAP_RASTER_VTX_FMT_0	0x4000
    383 #	define R300_GB_VAP_RASTER_VTX_FMT_0__POS_PRESENT	(1<<0)
    384 #	define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_0_PRESENT	(1<<1)
    385 #	define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_1_PRESENT	(1<<2)
    386 #	define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_2_PRESENT	(1<<3)
    387 #	define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_3_PRESENT	(1<<4)
    388 #	define R300_GB_VAP_RASTER_VTX_FMT_0__COLOR_SPACE	(0xf<<5)
    389 #	define R300_GB_VAP_RASTER_VTX_FMT_0__PT_SIZE_PRESENT	(0x1<<16)
    390 
    391 #define R300_GB_VAP_RASTER_VTX_FMT_1	0x4004
    392 	/* each of the following is 3 bits wide, specifies number
    393 	   of components */
    394 #	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_0_COMP_CNT_SHIFT	0
    395 #	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_1_COMP_CNT_SHIFT	3
    396 #	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_2_COMP_CNT_SHIFT	6
    397 #	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_3_COMP_CNT_SHIFT	9
    398 #	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_4_COMP_CNT_SHIFT	12
    399 #	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_5_COMP_CNT_SHIFT	15
    400 #	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_6_COMP_CNT_SHIFT	18
    401 #	define R300_GB_VAP_RASTER_VTX_FMT_1__TEX_7_COMP_CNT_SHIFT	21
    402 
    403 /* UNK30 seems to enables point to quad transformation on textures
    404  * (or something closely related to that).
    405  * This bit is rather fatal at the time being due to lackings at pixel
    406  * shader side
    407  */
    408 #define R300_GB_ENABLE	0x4008
    409 #	define R300_GB_POINT_STUFF_ENABLE	(1<<0)
    410 #	define R300_GB_LINE_STUFF_ENABLE	(1<<1)
    411 #	define R300_GB_TRIANGLE_STUFF_ENABLE	(1<<2)
    412 #	define R300_GB_STENCIL_AUTO_ENABLE	(1<<4)
    413 #	define R300_GB_UNK31			(1<<31)
    414 	/* each of the following is 2 bits wide */
    415 #define R300_GB_TEX_REPLICATE	0
    416 #define R300_GB_TEX_ST		1
    417 #define R300_GB_TEX_STR		2
    418 #	define R300_GB_TEX0_SOURCE_SHIFT	16
    419 #	define R300_GB_TEX1_SOURCE_SHIFT	18
    420 #	define R300_GB_TEX2_SOURCE_SHIFT	20
    421 #	define R300_GB_TEX3_SOURCE_SHIFT	22
    422 #	define R300_GB_TEX4_SOURCE_SHIFT	24
    423 #	define R300_GB_TEX5_SOURCE_SHIFT	26
    424 #	define R300_GB_TEX6_SOURCE_SHIFT	28
    425 #	define R300_GB_TEX7_SOURCE_SHIFT	30
    426 
    427 /* MSPOS - positions for multisample antialiasing (?) */
    428 #define R300_GB_MSPOS0	0x4010
    429 	/* shifts - each of the fields is 4 bits */
    430 #	define R300_GB_MSPOS0__MS_X0_SHIFT	0
    431 #	define R300_GB_MSPOS0__MS_Y0_SHIFT	4
    432 #	define R300_GB_MSPOS0__MS_X1_SHIFT	8
    433 #	define R300_GB_MSPOS0__MS_Y1_SHIFT	12
    434 #	define R300_GB_MSPOS0__MS_X2_SHIFT	16
    435 #	define R300_GB_MSPOS0__MS_Y2_SHIFT	20
    436 #	define R300_GB_MSPOS0__MSBD0_Y		24
    437 #	define R300_GB_MSPOS0__MSBD0_X		28
    438 
    439 #define R300_GB_MSPOS1	0x4014
    440 #	define R300_GB_MSPOS1__MS_X3_SHIFT	0
    441 #	define R300_GB_MSPOS1__MS_Y3_SHIFT	4
    442 #	define R300_GB_MSPOS1__MS_X4_SHIFT	8
    443 #	define R300_GB_MSPOS1__MS_Y4_SHIFT	12
    444 #	define R300_GB_MSPOS1__MS_X5_SHIFT	16
    445 #	define R300_GB_MSPOS1__MS_Y5_SHIFT	20
    446 #	define R300_GB_MSPOS1__MSBD1		24
    447 
    448 
    449 #define R300_GB_TILE_CONFIG	0x4018
    450 #	define R300_GB_TILE_ENABLE	(1<<0)
    451 #	define R300_GB_TILE_PIPE_COUNT_RV300	0
    452 #	define R300_GB_TILE_PIPE_COUNT_R300	(3<<1)
    453 #	define R300_GB_TILE_PIPE_COUNT_R420	(7<<1)
    454 #	define R300_GB_TILE_PIPE_COUNT_RV410	(3<<1)
    455 #	define R300_GB_TILE_SIZE_8		0
    456 #	define R300_GB_TILE_SIZE_16		(1<<4)
    457 #	define R300_GB_TILE_SIZE_32		(2<<4)
    458 #	define R300_GB_SUPER_SIZE_1		(0<<6)
    459 #	define R300_GB_SUPER_SIZE_2		(1<<6)
    460 #	define R300_GB_SUPER_SIZE_4		(2<<6)
    461 #	define R300_GB_SUPER_SIZE_8		(3<<6)
    462 #	define R300_GB_SUPER_SIZE_16		(4<<6)
    463 #	define R300_GB_SUPER_SIZE_32		(5<<6)
    464 #	define R300_GB_SUPER_SIZE_64		(6<<6)
    465 #	define R300_GB_SUPER_SIZE_128		(7<<6)
    466 #	define R300_GB_SUPER_X_SHIFT		9	/* 3 bits wide */
    467 #	define R300_GB_SUPER_Y_SHIFT		12	/* 3 bits wide */
    468 #	define R300_GB_SUPER_TILE_A		0
    469 #	define R300_GB_SUPER_TILE_B		(1<<15)
    470 #	define R300_GB_SUBPIXEL_1_12		0
    471 #	define R300_GB_SUBPIXEL_1_16		(1<<16)
    472 
    473 #define R300_GB_FIFO_SIZE	0x4024
    474 	/* each of the following is 2 bits wide */
    475 #define R300_GB_FIFO_SIZE_32	0
    476 #define R300_GB_FIFO_SIZE_64	1
    477 #define R300_GB_FIFO_SIZE_128	2
    478 #define R300_GB_FIFO_SIZE_256	3
    479 #	define R300_SC_IFIFO_SIZE_SHIFT	0
    480 #	define R300_SC_TZFIFO_SIZE_SHIFT	2
    481 #	define R300_SC_BFIFO_SIZE_SHIFT	4
    482 
    483 #	define R300_US_OFIFO_SIZE_SHIFT	12
    484 #	define R300_US_WFIFO_SIZE_SHIFT	14
    485 	/* the following use the same constants as above, but meaning is
    486 	   is times 2 (i.e. instead of 32 words it means 64 */
    487 #	define R300_RS_TFIFO_SIZE_SHIFT	6
    488 #	define R300_RS_CFIFO_SIZE_SHIFT	8
    489 #	define R300_US_RAM_SIZE_SHIFT		10
    490 	/* watermarks, 3 bits wide */
    491 #	define R300_RS_HIGHWATER_COL_SHIFT	16
    492 #	define R300_RS_HIGHWATER_TEX_SHIFT	19
    493 #	define R300_OFIFO_HIGHWATER_SHIFT	22	/* two bits only */
    494 #	define R300_CUBE_FIFO_HIGHWATER_COL_SHIFT	24
    495 
    496 #define R300_GB_SELECT	0x401C
    497 #	define R300_GB_FOG_SELECT_C0A		0
    498 #	define R300_GB_FOG_SELECT_C1A		1
    499 #	define R300_GB_FOG_SELECT_C2A		2
    500 #	define R300_GB_FOG_SELECT_C3A		3
    501 #	define R300_GB_FOG_SELECT_1_1_W	4
    502 #	define R300_GB_FOG_SELECT_Z		5
    503 #	define R300_GB_DEPTH_SELECT_Z		0
    504 #	define R300_GB_DEPTH_SELECT_1_1_W	(1<<3)
    505 #	define R300_GB_W_SELECT_1_W		0
    506 #	define R300_GB_W_SELECT_1		(1<<4)
    507 
    508 #define R300_GB_AA_CONFIG		0x4020
    509 #	define R300_AA_DISABLE			0x00
    510 #	define R300_AA_ENABLE			0x01
    511 #	define R300_AA_SUBSAMPLES_2		0
    512 #	define R300_AA_SUBSAMPLES_3		(1<<1)
    513 #	define R300_AA_SUBSAMPLES_4		(2<<1)
    514 #	define R300_AA_SUBSAMPLES_6		(3<<1)
    515 
    516 /* gap */
    517 
    518 /* Zero to flush caches. */
    519 #define R300_TX_INVALTAGS                   0x4100
    520 #define R300_TX_FLUSH                       0x0
    521 
    522 /* The upper enable bits are guessed, based on fglrx reported limits. */
    523 #define R300_TX_ENABLE                      0x4104
    524 #       define R300_TX_ENABLE_0                  (1 << 0)
    525 #       define R300_TX_ENABLE_1                  (1 << 1)
    526 #       define R300_TX_ENABLE_2                  (1 << 2)
    527 #       define R300_TX_ENABLE_3                  (1 << 3)
    528 #       define R300_TX_ENABLE_4                  (1 << 4)
    529 #       define R300_TX_ENABLE_5                  (1 << 5)
    530 #       define R300_TX_ENABLE_6                  (1 << 6)
    531 #       define R300_TX_ENABLE_7                  (1 << 7)
    532 #       define R300_TX_ENABLE_8                  (1 << 8)
    533 #       define R300_TX_ENABLE_9                  (1 << 9)
    534 #       define R300_TX_ENABLE_10                 (1 << 10)
    535 #       define R300_TX_ENABLE_11                 (1 << 11)
    536 #       define R300_TX_ENABLE_12                 (1 << 12)
    537 #       define R300_TX_ENABLE_13                 (1 << 13)
    538 #       define R300_TX_ENABLE_14                 (1 << 14)
    539 #       define R300_TX_ENABLE_15                 (1 << 15)
    540 
    541 /* The pointsize is given in multiples of 6. The pointsize can be
    542  * enormous: Clear() renders a single point that fills the entire
    543  * framebuffer.
    544  */
    545 #define R300_RE_POINTSIZE                   0x421C
    546 #       define R300_POINTSIZE_Y_SHIFT            0
    547 #       define R300_POINTSIZE_Y_MASK             (0xFFFF << 0) /* GUESS */
    548 #       define R300_POINTSIZE_X_SHIFT            16
    549 #       define R300_POINTSIZE_X_MASK             (0xFFFF << 16) /* GUESS */
    550 #       define R300_POINTSIZE_MAX             (R300_POINTSIZE_Y_MASK / 6)
    551 
    552 /* The line width is given in multiples of 6.
    553  * In default mode lines are classified as vertical lines.
    554  * HO: horizontal
    555  * VE: vertical or horizontal
    556  * HO & VE: no classification
    557  */
    558 #define R300_RE_LINE_CNT                      0x4234
    559 #       define R300_LINESIZE_SHIFT            0
    560 #       define R300_LINESIZE_MASK             (0xFFFF << 0) /* GUESS */
    561 #       define R300_LINESIZE_MAX             (R300_LINESIZE_MASK / 6)
    562 #       define R300_LINE_CNT_HO               (1 << 16)
    563 #       define R300_LINE_CNT_VE               (1 << 17)
    564 
    565 /* Some sort of scale or clamp value for texcoordless textures. */
    566 #define R300_RE_UNK4238                       0x4238
    567 
    568 /* Something shade related */
    569 #define R300_RE_SHADE                         0x4274
    570 
    571 #define R300_RE_SHADE_MODEL                   0x4278
    572 #	define R300_RE_SHADE_MODEL_SMOOTH     0x3aaaa
    573 #	define R300_RE_SHADE_MODEL_FLAT       0x39595
    574 
    575 /* Dangerous */
    576 #define R300_RE_POLYGON_MODE                  0x4288
    577 #	define R300_PM_ENABLED                (1 << 0)
    578 #	define R300_PM_FRONT_POINT            (0 << 0)
    579 #	define R300_PM_BACK_POINT             (0 << 0)
    580 #	define R300_PM_FRONT_LINE             (1 << 4)
    581 #	define R300_PM_FRONT_FILL             (1 << 5)
    582 #	define R300_PM_BACK_LINE              (1 << 7)
    583 #	define R300_PM_BACK_FILL              (1 << 8)
    584 
    585 /* Fog parameters */
    586 #define R300_RE_FOG_SCALE                     0x4294
    587 #define R300_RE_FOG_START                     0x4298
    588 
    589 /* Not sure why there are duplicate of factor and constant values.
    590  * My best guess so far is that there are seperate zbiases for test and write.
    591  * Ordering might be wrong.
    592  * Some of the tests indicate that fgl has a fallback implementation of zbias
    593  * via pixel shaders.
    594  */
    595 #define R300_RE_ZBIAS_CNTL                    0x42A0 /* GUESS */
    596 #define R300_RE_ZBIAS_T_FACTOR                0x42A4
    597 #define R300_RE_ZBIAS_T_CONSTANT              0x42A8
    598 #define R300_RE_ZBIAS_W_FACTOR                0x42AC
    599 #define R300_RE_ZBIAS_W_CONSTANT              0x42B0
    600 
    601 /* This register needs to be set to (1<<1) for RV350 to correctly
    602  * perform depth test (see --vb-triangles in r300_demo)
    603  * Don't know about other chips. - Vladimir
    604  * This is set to 3 when GL_POLYGON_OFFSET_FILL is on.
    605  * My guess is that there are two bits for each zbias primitive
    606  * (FILL, LINE, POINT).
    607  *  One to enable depth test and one for depth write.
    608  * Yet this doesnt explain why depth writes work ...
    609  */
    610 #define R300_RE_OCCLUSION_CNTL		    0x42B4
    611 #	define R300_OCCLUSION_ON		(1<<1)
    612 
    613 #define R300_RE_CULL_CNTL                   0x42B8
    614 #       define R300_CULL_FRONT                   (1 << 0)
    615 #       define R300_CULL_BACK                    (1 << 1)
    616 #       define R300_FRONT_FACE_CCW               (0 << 2)
    617 #       define R300_FRONT_FACE_CW                (1 << 2)
    618 
    619 
    620 /* BEGIN: Rasterization / Interpolators - many guesses */
    621 
    622 /* 0_UNKNOWN_18 has always been set except for clear operations.
    623  * TC_CNT is the number of incoming texture coordinate sets (i.e. it depends
    624  * on the vertex program, *not* the fragment program)
    625  */
    626 #define R300_RS_CNTL_0                      0x4300
    627 #       define R300_RS_CNTL_TC_CNT_SHIFT         2
    628 #       define R300_RS_CNTL_TC_CNT_MASK          (7 << 2)
    629 	/* number of color interpolators used */
    630 #	define R300_RS_CNTL_CI_CNT_SHIFT         7
    631 #       define R300_RS_CNTL_0_UNKNOWN_18         (1 << 18)
    632 	/* Guess: RS_CNTL_1 holds the index of the highest used RS_ROUTE_n
    633 	   register. */
    634 #define R300_RS_CNTL_1                      0x4304
    635 
    636 /* gap */
    637 
    638 /* Only used for texture coordinates.
    639  * Use the source field to route texture coordinate input from the
    640  * vertex program to the desired interpolator. Note that the source
    641  * field is relative to the outputs the vertex program *actually*
    642  * writes. If a vertex program only writes texcoord[1], this will
    643  * be source index 0.
    644  * Set INTERP_USED on all interpolators that produce data used by
    645  * the fragment program. INTERP_USED looks like a swizzling mask,
    646  * but I haven't seen it used that way.
    647  *
    648  * Note: The _UNKNOWN constants are always set in their respective
    649  * register. I don't know if this is necessary.
    650  */
    651 #define R300_RS_INTERP_0                    0x4310
    652 #define R300_RS_INTERP_1                    0x4314
    653 #       define R300_RS_INTERP_1_UNKNOWN          0x40
    654 #define R300_RS_INTERP_2                    0x4318
    655 #       define R300_RS_INTERP_2_UNKNOWN          0x80
    656 #define R300_RS_INTERP_3                    0x431C
    657 #       define R300_RS_INTERP_3_UNKNOWN          0xC0
    658 #define R300_RS_INTERP_4                    0x4320
    659 #define R300_RS_INTERP_5                    0x4324
    660 #define R300_RS_INTERP_6                    0x4328
    661 #define R300_RS_INTERP_7                    0x432C
    662 #       define R300_RS_INTERP_SRC_SHIFT          2
    663 #       define R300_RS_INTERP_SRC_MASK           (7 << 2)
    664 #       define R300_RS_INTERP_USED               0x00D10000
    665 
    666 /* These DWORDs control how vertex data is routed into fragment program
    667  * registers, after interpolators.
    668  */
    669 #define R300_RS_ROUTE_0                     0x4330
    670 #define R300_RS_ROUTE_1                     0x4334
    671 #define R300_RS_ROUTE_2                     0x4338
    672 #define R300_RS_ROUTE_3                     0x433C /* GUESS */
    673 #define R300_RS_ROUTE_4                     0x4340 /* GUESS */
    674 #define R300_RS_ROUTE_5                     0x4344 /* GUESS */
    675 #define R300_RS_ROUTE_6                     0x4348 /* GUESS */
    676 #define R300_RS_ROUTE_7                     0x434C /* GUESS */
    677 #       define R300_RS_ROUTE_SOURCE_INTERP_0     0
    678 #       define R300_RS_ROUTE_SOURCE_INTERP_1     1
    679 #       define R300_RS_ROUTE_SOURCE_INTERP_2     2
    680 #       define R300_RS_ROUTE_SOURCE_INTERP_3     3
    681 #       define R300_RS_ROUTE_SOURCE_INTERP_4     4
    682 #       define R300_RS_ROUTE_SOURCE_INTERP_5     5 /* GUESS */
    683 #       define R300_RS_ROUTE_SOURCE_INTERP_6     6 /* GUESS */
    684 #       define R300_RS_ROUTE_SOURCE_INTERP_7     7 /* GUESS */
    685 #       define R300_RS_ROUTE_ENABLE              (1 << 3) /* GUESS */
    686 #       define R300_RS_ROUTE_DEST_SHIFT          6
    687 #       define R300_RS_ROUTE_DEST_MASK           (31 << 6) /* GUESS */
    688 
    689 /* Special handling for color: When the fragment program uses color,
    690  * the ROUTE_0_COLOR bit is set and ROUTE_0_COLOR_DEST contains the
    691  * color register index.
    692  *
    693  * Apperently you may set the R300_RS_ROUTE_0_COLOR bit, but not provide any
    694  * R300_RS_ROUTE_0_COLOR_DEST value; this setup is used for clearing the state.
    695  * See r300_ioctl.c:r300EmitClearState. I'm not sure if this setup is strictly
    696  * correct or not. - Oliver.
    697  */
    698 #       define R300_RS_ROUTE_0_COLOR             (1 << 14)
    699 #       define R300_RS_ROUTE_0_COLOR_DEST_SHIFT  17
    700 #       define R300_RS_ROUTE_0_COLOR_DEST_MASK   (31 << 17) /* GUESS */
    701 /* As above, but for secondary color */
    702 #		define R300_RS_ROUTE_1_COLOR1            (1 << 14)
    703 #		define R300_RS_ROUTE_1_COLOR1_DEST_SHIFT 17
    704 #		define R300_RS_ROUTE_1_COLOR1_DEST_MASK  (31 << 17)
    705 #		define R300_RS_ROUTE_1_UNKNOWN11         (1 << 11)
    706 /* END: Rasterization / Interpolators - many guesses */
    707 
    708 /* Hierarchical Z Enable */
    709 #define R300_SC_HYPERZ                   0x43a4
    710 #	define R300_SC_HYPERZ_DISABLE     (0 << 0)
    711 #	define R300_SC_HYPERZ_ENABLE      (1 << 0)
    712 #	define R300_SC_HYPERZ_MIN         (0 << 1)
    713 #	define R300_SC_HYPERZ_MAX         (1 << 1)
    714 #	define R300_SC_HYPERZ_ADJ_256     (0 << 2)
    715 #	define R300_SC_HYPERZ_ADJ_128     (1 << 2)
    716 #	define R300_SC_HYPERZ_ADJ_64      (2 << 2)
    717 #	define R300_SC_HYPERZ_ADJ_32      (3 << 2)
    718 #	define R300_SC_HYPERZ_ADJ_16      (4 << 2)
    719 #	define R300_SC_HYPERZ_ADJ_8       (5 << 2)
    720 #	define R300_SC_HYPERZ_ADJ_4       (6 << 2)
    721 #	define R300_SC_HYPERZ_ADJ_2       (7 << 2)
    722 #	define R300_SC_HYPERZ_HZ_Z0MIN_NO (0 << 5)
    723 #	define R300_SC_HYPERZ_HZ_Z0MIN    (1 << 5)
    724 #	define R300_SC_HYPERZ_HZ_Z0MAX_NO (0 << 6)
    725 #	define R300_SC_HYPERZ_HZ_Z0MAX    (1 << 6)
    726 
    727 #define R300_SC_EDGERULE                 0x43a8
    728 
    729 /* BEGIN: Scissors and cliprects */
    730 
    731 /* There are four clipping rectangles. Their corner coordinates are inclusive.
    732  * Every pixel is assigned a number from 0 and 15 by setting bits 0-3 depending
    733  * on whether the pixel is inside cliprects 0-3, respectively. For example,
    734  * if a pixel is inside cliprects 0 and 1, but outside 2 and 3, it is assigned
    735  * the number 3 (binary 0011).
    736  * Iff the bit corresponding to the pixel's number in RE_CLIPRECT_CNTL is set,
    737  * the pixel is rasterized.
    738  *
    739  * In addition to this, there is a scissors rectangle. Only pixels inside the
    740  * scissors rectangle are drawn. (coordinates are inclusive)
    741  *
    742  * For some reason, the top-left corner of the framebuffer is at (1440, 1440)
    743  * for the purpose of clipping and scissors.
    744  */
    745 #define R300_RE_CLIPRECT_TL_0               0x43B0
    746 #define R300_RE_CLIPRECT_BR_0               0x43B4
    747 #define R300_RE_CLIPRECT_TL_1               0x43B8
    748 #define R300_RE_CLIPRECT_BR_1               0x43BC
    749 #define R300_RE_CLIPRECT_TL_2               0x43C0
    750 #define R300_RE_CLIPRECT_BR_2               0x43C4
    751 #define R300_RE_CLIPRECT_TL_3               0x43C8
    752 #define R300_RE_CLIPRECT_BR_3               0x43CC
    753 #       define R300_CLIPRECT_OFFSET              1440
    754 #       define R300_CLIPRECT_MASK                0x1FFF
    755 #       define R300_CLIPRECT_X_SHIFT             0
    756 #       define R300_CLIPRECT_X_MASK              (0x1FFF << 0)
    757 #       define R300_CLIPRECT_Y_SHIFT             13
    758 #       define R300_CLIPRECT_Y_MASK              (0x1FFF << 13)
    759 #define R300_RE_CLIPRECT_CNTL               0x43D0
    760 #       define R300_CLIP_OUT                     (1 << 0)
    761 #       define R300_CLIP_0                       (1 << 1)
    762 #       define R300_CLIP_1                       (1 << 2)
    763 #       define R300_CLIP_10                      (1 << 3)
    764 #       define R300_CLIP_2                       (1 << 4)
    765 #       define R300_CLIP_20                      (1 << 5)
    766 #       define R300_CLIP_21                      (1 << 6)
    767 #       define R300_CLIP_210                     (1 << 7)
    768 #       define R300_CLIP_3                       (1 << 8)
    769 #       define R300_CLIP_30                      (1 << 9)
    770 #       define R300_CLIP_31                      (1 << 10)
    771 #       define R300_CLIP_310                     (1 << 11)
    772 #       define R300_CLIP_32                      (1 << 12)
    773 #       define R300_CLIP_320                     (1 << 13)
    774 #       define R300_CLIP_321                     (1 << 14)
    775 #       define R300_CLIP_3210                    (1 << 15)
    776 
    777 /* gap */
    778 
    779 #define R300_RE_SCISSORS_TL                 0x43E0
    780 #define R300_RE_SCISSORS_BR                 0x43E4
    781 #       define R300_SCISSORS_OFFSET              1440
    782 #       define R300_SCISSORS_X_SHIFT             0
    783 #       define R300_SCISSORS_X_MASK              (0x1FFF << 0)
    784 #       define R300_SCISSORS_Y_SHIFT             13
    785 #       define R300_SCISSORS_Y_MASK              (0x1FFF << 13)
    786 /* END: Scissors and cliprects */
    787 
    788 /* BEGIN: Texture specification */
    789 
    790 /*
    791  * The texture specification dwords are grouped by meaning and not by texture
    792  * unit. This means that e.g. the offset for texture image unit N is found in
    793  * register TX_OFFSET_0 + (4*N)
    794  */
    795 #define R300_TX_FILTER_0                    0x4400
    796 #       define R300_TX_REPEAT                    0
    797 #       define R300_TX_MIRRORED                  1
    798 #       define R300_TX_CLAMP                     4
    799 #       define R300_TX_CLAMP_TO_EDGE             2
    800 #       define R300_TX_CLAMP_TO_BORDER           6
    801 #       define R300_TX_WRAP_S_SHIFT              0
    802 #       define R300_TX_WRAP_S_MASK               (7 << 0)
    803 #       define R300_TX_WRAP_T_SHIFT              3
    804 #       define R300_TX_WRAP_T_MASK               (7 << 3)
    805 #       define R300_TX_WRAP_Q_SHIFT              6
    806 #       define R300_TX_WRAP_Q_MASK               (7 << 6)
    807 #       define R300_TX_MAG_FILTER_NEAREST        (1 << 9)
    808 #       define R300_TX_MAG_FILTER_LINEAR         (2 << 9)
    809 #       define R300_TX_MAG_FILTER_MASK           (3 << 9)
    810 #       define R300_TX_MIN_FILTER_NEAREST        (1 << 11)
    811 #       define R300_TX_MIN_FILTER_LINEAR         (2 << 11)
    812 #	define R300_TX_MIN_FILTER_NEAREST_MIP_NEAREST       (5  <<  11)
    813 #	define R300_TX_MIN_FILTER_NEAREST_MIP_LINEAR        (9  <<  11)
    814 #	define R300_TX_MIN_FILTER_LINEAR_MIP_NEAREST        (6  <<  11)
    815 #	define R300_TX_MIN_FILTER_LINEAR_MIP_LINEAR         (10 <<  11)
    816 
    817 /* NOTE: NEAREST doesnt seem to exist.
    818  * Im not seting MAG_FILTER_MASK and (3 << 11) on for all
    819  * anisotropy modes because that would void selected mag filter
    820  */
    821 #	define R300_TX_MIN_FILTER_ANISO_NEAREST             (0 << 13)
    822 #	define R300_TX_MIN_FILTER_ANISO_LINEAR              (0 << 13)
    823 #	define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST (1 << 13)
    824 #	define R300_TX_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR  (2 << 13)
    825 #       define R300_TX_MIN_FILTER_MASK   ( (15 << 11) | (3 << 13) )
    826 #	define R300_TX_MAX_ANISO_1_TO_1  (0 << 21)
    827 #	define R300_TX_MAX_ANISO_2_TO_1  (2 << 21)
    828 #	define R300_TX_MAX_ANISO_4_TO_1  (4 << 21)
    829 #	define R300_TX_MAX_ANISO_8_TO_1  (6 << 21)
    830 #	define R300_TX_MAX_ANISO_16_TO_1 (8 << 21)
    831 #	define R300_TX_MAX_ANISO_MASK    (14 << 21)
    832 
    833 #define R300_TX_FILTER1_0                      0x4440
    834 #	define R300_CHROMA_KEY_MODE_DISABLE    0
    835 #	define R300_CHROMA_KEY_FORCE	       1
    836 #	define R300_CHROMA_KEY_BLEND           2
    837 #	define R300_MC_ROUND_NORMAL            (0<<2)
    838 #	define R300_MC_ROUND_MPEG4             (1<<2)
    839 #	define R300_LOD_BIAS_MASK	    0x1fff
    840 #	define R300_EDGE_ANISO_EDGE_DIAG       (0<<13)
    841 #	define R300_EDGE_ANISO_EDGE_ONLY       (1<<13)
    842 #	define R300_MC_COORD_TRUNCATE_DISABLE  (0<<14)
    843 #	define R300_MC_COORD_TRUNCATE_MPEG     (1<<14)
    844 #	define R300_TX_TRI_PERF_0_8            (0<<15)
    845 #	define R300_TX_TRI_PERF_1_8            (1<<15)
    846 #	define R300_TX_TRI_PERF_1_4            (2<<15)
    847 #	define R300_TX_TRI_PERF_3_8            (3<<15)
    848 #	define R300_ANISO_THRESHOLD_MASK       (7<<17)
    849 
    850 #define R300_TX_SIZE_0                      0x4480
    851 #       define R300_TX_WIDTHMASK_SHIFT           0
    852 #       define R300_TX_WIDTHMASK_MASK            (2047 << 0)
    853 #       define R300_TX_HEIGHTMASK_SHIFT          11
    854 #       define R300_TX_HEIGHTMASK_MASK           (2047 << 11)
    855 #       define R300_TX_UNK23                     (1 << 23)
    856 #       define R300_TX_MAX_MIP_LEVEL_SHIFT       26
    857 #       define R300_TX_MAX_MIP_LEVEL_MASK        (0xf << 26)
    858 #       define R300_TX_SIZE_PROJECTED            (1<<30)
    859 #       define R300_TX_SIZE_TXPITCH_EN           (1<<31)
    860 #define R300_TX_FORMAT_0                    0x44C0
    861 	/* The interpretation of the format word by Wladimir van der Laan */
    862 	/* The X, Y, Z and W refer to the layout of the components.
    863 	   They are given meanings as R, G, B and Alpha by the swizzle
    864 	   specification */
    865 #	define R300_TX_FORMAT_X8		    0x0
    866 #	define R300_TX_FORMAT_X16		    0x1
    867 #	define R300_TX_FORMAT_Y4X4		    0x2
    868 #	define R300_TX_FORMAT_Y8X8		    0x3
    869 #	define R300_TX_FORMAT_Y16X16		    0x4
    870 #	define R300_TX_FORMAT_Z3Y3X2		    0x5
    871 #	define R300_TX_FORMAT_Z5Y6X5		    0x6
    872 #	define R300_TX_FORMAT_Z6Y5X5		    0x7
    873 #	define R300_TX_FORMAT_Z11Y11X10		    0x8
    874 #	define R300_TX_FORMAT_Z10Y11X11		    0x9
    875 #	define R300_TX_FORMAT_W4Z4Y4X4		    0xA
    876 #	define R300_TX_FORMAT_W1Z5Y5X5		    0xB
    877 #	define R300_TX_FORMAT_W8Z8Y8X8		    0xC
    878 #	define R300_TX_FORMAT_W2Z10Y10X10	    0xD
    879 #	define R300_TX_FORMAT_W16Z16Y16X16	    0xE
    880 #	define R300_TX_FORMAT_DXT1		    0xF
    881 #	define R300_TX_FORMAT_DXT3		    0x10
    882 #	define R300_TX_FORMAT_DXT5		    0x11
    883 #	define R300_TX_FORMAT_D3DMFT_CxV8U8	    0x12     /* no swizzle */
    884 #	define R300_TX_FORMAT_A8R8G8B8		    0x13     /* no swizzle */
    885 #	define R300_TX_FORMAT_B8G8_B8G8		    0x14     /* no swizzle */
    886 #	define R300_TX_FORMAT_G8R8_G8B8		    0x15     /* no swizzle */
    887 	/* 0x16 - some 16 bit green format.. ?? */
    888 #	define R300_TX_FORMAT_UNK25		   (1 << 25) /* no swizzle */
    889 #	define R300_TX_FORMAT_CUBIC_MAP		   (1 << 26)
    890 
    891 	/* gap */
    892 	/* Floating point formats */
    893 	/* Note - hardware supports both 16 and 32 bit floating point */
    894 #	define R300_TX_FORMAT_FL_I16		    0x18
    895 #	define R300_TX_FORMAT_FL_I16A16		    0x19
    896 #	define R300_TX_FORMAT_FL_R16G16B16A16	    0x1A
    897 #	define R300_TX_FORMAT_FL_I32		    0x1B
    898 #	define R300_TX_FORMAT_FL_I32A32		    0x1C
    899 #	define R300_TX_FORMAT_FL_R32G32B32A32	    0x1D
    900 	/* alpha modes, convenience mostly */
    901 	/* if you have alpha, pick constant appropriate to the
    902 	   number of channels (1 for I8, 2 for I8A8, 4 for R8G8B8A8, etc */
    903 #	define R300_TX_FORMAT_ALPHA_1CH		    0x000
    904 #	define R300_TX_FORMAT_ALPHA_2CH		    0x200
    905 #	define R300_TX_FORMAT_ALPHA_4CH		    0x600
    906 #	define R300_TX_FORMAT_ALPHA_NONE	    0xA00
    907 	/* Swizzling */
    908 	/* constants */
    909 #	define R300_TX_FORMAT_X		0
    910 #	define R300_TX_FORMAT_Y		1
    911 #	define R300_TX_FORMAT_Z		2
    912 #	define R300_TX_FORMAT_W		3
    913 #	define R300_TX_FORMAT_ZERO	4
    914 #	define R300_TX_FORMAT_ONE	5
    915 	/* 2.0*Z, everything above 1.0 is set to 0.0 */
    916 #	define R300_TX_FORMAT_CUT_Z	6
    917 	/* 2.0*W, everything above 1.0 is set to 0.0 */
    918 #	define R300_TX_FORMAT_CUT_W	7
    919 
    920 #	define R300_TX_FORMAT_B_SHIFT	18
    921 #	define R300_TX_FORMAT_G_SHIFT	15
    922 #	define R300_TX_FORMAT_R_SHIFT	12
    923 #	define R300_TX_FORMAT_A_SHIFT	9
    924 	/* Convenience macro to take care of layout and swizzling */
    925 #	define R300_EASY_TX_FORMAT(B, G, R, A, FMT)	(		\
    926 		((R300_TX_FORMAT_##B)<<R300_TX_FORMAT_B_SHIFT)		\
    927 		| ((R300_TX_FORMAT_##G)<<R300_TX_FORMAT_G_SHIFT)	\
    928 		| ((R300_TX_FORMAT_##R)<<R300_TX_FORMAT_R_SHIFT)	\
    929 		| ((R300_TX_FORMAT_##A)<<R300_TX_FORMAT_A_SHIFT)	\
    930 		| (R300_TX_FORMAT_##FMT)				\
    931 		)
    932 	/* These can be ORed with result of R300_EASY_TX_FORMAT()
    933 	   We don't really know what they do. Take values from a
    934            constant color ? */
    935 #	define R300_TX_FORMAT_CONST_X		(1<<5)
    936 #	define R300_TX_FORMAT_CONST_Y		(2<<5)
    937 #	define R300_TX_FORMAT_CONST_Z		(4<<5)
    938 #	define R300_TX_FORMAT_CONST_W		(8<<5)
    939 
    940 #	define R300_TX_FORMAT_YUV_MODE		0x00800000
    941 
    942 #define R300_TX_PITCH_0			    0x4500 /* obvious missing in gap */
    943 #define R300_TX_OFFSET_0                    0x4540
    944 	/* BEGIN: Guess from R200 */
    945 #       define R300_TXO_ENDIAN_NO_SWAP           (0 << 0)
    946 #       define R300_TXO_ENDIAN_BYTE_SWAP         (1 << 0)
    947 #       define R300_TXO_ENDIAN_WORD_SWAP         (2 << 0)
    948 #       define R300_TXO_ENDIAN_HALFDW_SWAP       (3 << 0)
    949 #       define R300_TXO_MACRO_TILE               (1 << 2)
    950 #       define R300_TXO_MICRO_TILE               (1 << 3)
    951 #       define R300_TXO_OFFSET_MASK              0xffffffe0
    952 #       define R300_TXO_OFFSET_SHIFT             5
    953 	/* END: Guess from R200 */
    954 
    955 /* 32 bit chroma key */
    956 #define R300_TX_CHROMA_KEY_0                      0x4580
    957 /* ff00ff00 == { 0, 1.0, 0, 1.0 } */
    958 #define R300_TX_BORDER_COLOR_0              0x45C0
    959 
    960 /* END: Texture specification */
    961 
    962 /* BEGIN: Fragment program instruction set */
    963 
    964 /* Fragment programs are written directly into register space.
    965  * There are separate instruction streams for texture instructions and ALU
    966  * instructions.
    967  * In order to synchronize these streams, the program is divided into up
    968  * to 4 nodes. Each node begins with a number of TEX operations, followed
    969  * by a number of ALU operations.
    970  * The first node can have zero TEX ops, all subsequent nodes must have at
    971  * least
    972  * one TEX ops.
    973  * All nodes must have at least one ALU op.
    974  *
    975  * The index of the last node is stored in PFS_CNTL_0: A value of 0 means
    976  * 1 node, a value of 3 means 4 nodes.
    977  * The total amount of instructions is defined in PFS_CNTL_2. The offsets are
    978  * offsets into the respective instruction streams, while *_END points to the
    979  * last instruction relative to this offset.
    980  */
    981 #define R300_PFS_CNTL_0                     0x4600
    982 #       define R300_PFS_CNTL_LAST_NODES_SHIFT    0
    983 #       define R300_PFS_CNTL_LAST_NODES_MASK     (3 << 0)
    984 #       define R300_PFS_CNTL_FIRST_NODE_HAS_TEX  (1 << 3)
    985 #define R300_PFS_CNTL_1                     0x4604
    986 /* There is an unshifted value here which has so far always been equal to the
    987  * index of the highest used temporary register.
    988  */
    989 #define R300_PFS_CNTL_2                     0x4608
    990 #       define R300_PFS_CNTL_ALU_OFFSET_SHIFT    0
    991 #       define R300_PFS_CNTL_ALU_OFFSET_MASK     (63 << 0)
    992 #       define R300_PFS_CNTL_ALU_END_SHIFT       6
    993 #       define R300_PFS_CNTL_ALU_END_MASK        (63 << 6)
    994 #       define R300_PFS_CNTL_TEX_OFFSET_SHIFT    12
    995 #       define R300_PFS_CNTL_TEX_OFFSET_MASK     (31 << 12) /* GUESS */
    996 #       define R300_PFS_CNTL_TEX_END_SHIFT       18
    997 #       define R300_PFS_CNTL_TEX_END_MASK        (31 << 18) /* GUESS */
    998 
    999 /* gap */
   1000 
   1001 /* Nodes are stored backwards. The last active node is always stored in
   1002  * PFS_NODE_3.
   1003  * Example: In a 2-node program, NODE_0 and NODE_1 are set to 0. The
   1004  * first node is stored in NODE_2, the second node is stored in NODE_3.
   1005  *
   1006  * Offsets are relative to the master offset from PFS_CNTL_2.
   1007  */
   1008 #define R300_PFS_NODE_0                     0x4610
   1009 #define R300_PFS_NODE_1                     0x4614
   1010 #define R300_PFS_NODE_2                     0x4618
   1011 #define R300_PFS_NODE_3                     0x461C
   1012 #       define R300_PFS_NODE_ALU_OFFSET_SHIFT    0
   1013 #       define R300_PFS_NODE_ALU_OFFSET_MASK     (63 << 0)
   1014 #       define R300_PFS_NODE_ALU_END_SHIFT       6
   1015 #       define R300_PFS_NODE_ALU_END_MASK        (63 << 6)
   1016 #       define R300_PFS_NODE_TEX_OFFSET_SHIFT    12
   1017 #       define R300_PFS_NODE_TEX_OFFSET_MASK     (31 << 12)
   1018 #       define R300_PFS_NODE_TEX_END_SHIFT       17
   1019 #       define R300_PFS_NODE_TEX_END_MASK        (31 << 17)
   1020 #		define R300_PFS_NODE_OUTPUT_COLOR        (1 << 22)
   1021 #		define R300_PFS_NODE_OUTPUT_DEPTH        (1 << 23)
   1022 
   1023 /* TEX
   1024  * As far as I can tell, texture instructions cannot write into output
   1025  * registers directly. A subsequent ALU instruction is always necessary,
   1026  * even if it's just MAD o0, r0, 1, 0
   1027  */
   1028 #define R300_PFS_TEXI_0                     0x4620
   1029 #	define R300_FPITX_SRC_SHIFT              0
   1030 #	define R300_FPITX_SRC_MASK               (31 << 0)
   1031 	/* GUESS */
   1032 #	define R300_FPITX_SRC_CONST              (1 << 5)
   1033 #	define R300_FPITX_DST_SHIFT              6
   1034 #	define R300_FPITX_DST_MASK               (31 << 6)
   1035 #	define R300_FPITX_IMAGE_SHIFT            11
   1036 	/* GUESS based on layout and native limits */
   1037 #       define R300_FPITX_IMAGE_MASK             (15 << 11)
   1038 /* Unsure if these are opcodes, or some kind of bitfield, but this is how
   1039  * they were set when I checked
   1040  */
   1041 #	define R300_FPITX_OPCODE_SHIFT		15
   1042 #		define R300_FPITX_OP_TEX	1
   1043 #		define R300_FPITX_OP_KIL	2
   1044 #		define R300_FPITX_OP_TXP	3
   1045 #		define R300_FPITX_OP_TXB	4
   1046 #	define R300_FPITX_OPCODE_MASK           (7 << 15)
   1047 
   1048 /* ALU
   1049  * The ALU instructions register blocks are enumerated according to the order
   1050  * in which fglrx. I assume there is space for 64 instructions, since
   1051  * each block has space for a maximum of 64 DWORDs, and this matches reported
   1052  * native limits.
   1053  *
   1054  * The basic functional block seems to be one MAD for each color and alpha,
   1055  * and an adder that adds all components after the MUL.
   1056  *  - ADD, MUL, MAD etc.: use MAD with appropriate neutral operands
   1057  *  - DP4: Use OUTC_DP4, OUTA_DP4
   1058  *  - DP3: Use OUTC_DP3, OUTA_DP4, appropriate alpha operands
   1059  *  - DPH: Use OUTC_DP4, OUTA_DP4, appropriate alpha operands
   1060  *  - CMPH: If ARG2 > 0.5, return ARG0, else return ARG1
   1061  *  - CMP: If ARG2 < 0, return ARG1, else return ARG0
   1062  *  - FLR: use FRC+MAD
   1063  *  - XPD: use MAD+MAD
   1064  *  - SGE, SLT: use MAD+CMP
   1065  *  - RSQ: use ABS modifier for argument
   1066  *  - Use OUTC_REPL_ALPHA to write results of an alpha-only operation
   1067  *    (e.g. RCP) into color register
   1068  *  - apparently, there's no quick DST operation
   1069  *  - fglrx set FPI2_UNKNOWN_31 on a "MAD fragment.color, tmp0, tmp1, tmp2"
   1070  *  - fglrx set FPI2_UNKNOWN_31 on a "MAX r2, r1, c0"
   1071  *  - fglrx once set FPI0_UNKNOWN_31 on a "FRC r1, r1"
   1072  *
   1073  * Operand selection
   1074  * First stage selects three sources from the available registers and
   1075  * constant parameters. This is defined in INSTR1 (color) and INSTR3 (alpha).
   1076  * fglrx sorts the three source fields: Registers before constants,
   1077  * lower indices before higher indices; I do not know whether this is
   1078  * necessary.
   1079  *
   1080  * fglrx fills unused sources with "read constant 0"
   1081  * According to specs, you cannot select more than two different constants.
   1082  *
   1083  * Second stage selects the operands from the sources. This is defined in
   1084  * INSTR0 (color) and INSTR2 (alpha). You can also select the special constants
   1085  * zero and one.
   1086  * Swizzling and negation happens in this stage, as well.
   1087  *
   1088  * Important: Color and alpha seem to be mostly separate, i.e. their sources
   1089  * selection appears to be fully independent (the register storage is probably
   1090  * physically split into a color and an alpha section).
   1091  * However (because of the apparent physical split), there is some interaction
   1092  * WRT swizzling. If, for example, you want to load an R component into an
   1093  * Alpha operand, this R component is taken from a *color* source, not from
   1094  * an alpha source. The corresponding register doesn't even have to appear in
   1095  * the alpha sources list. (I hope this all makes sense to you)
   1096  *
   1097  * Destination selection
   1098  * The destination register index is in FPI1 (color) and FPI3 (alpha)
   1099  * together with enable bits.
   1100  * There are separate enable bits for writing into temporary registers
   1101  * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_*
   1102  * /DSTA_OUTPUT). You can write to both at once, or not write at all (the
   1103  * same index must be used for both).
   1104  *
   1105  * Note: There is a special form for LRP
   1106  *  - Argument order is the same as in ARB_fragment_program.
   1107  *  - Operation is MAD
   1108  *  - ARG1 is set to ARGC_SRC1C_LRP/ARGC_SRC1A_LRP
   1109  *  - Set FPI0/FPI2_SPECIAL_LRP
   1110  * Arbitrary LRP (including support for swizzling) requires vanilla MAD+MAD
   1111  */
   1112 #define R300_PFS_INSTR1_0                   0x46C0
   1113 #       define R300_FPI1_SRC0C_SHIFT             0
   1114 #       define R300_FPI1_SRC0C_MASK              (31 << 0)
   1115 #       define R300_FPI1_SRC0C_CONST             (1 << 5)
   1116 #       define R300_FPI1_SRC1C_SHIFT             6
   1117 #       define R300_FPI1_SRC1C_MASK              (31 << 6)
   1118 #       define R300_FPI1_SRC1C_CONST             (1 << 11)
   1119 #       define R300_FPI1_SRC2C_SHIFT             12
   1120 #       define R300_FPI1_SRC2C_MASK              (31 << 12)
   1121 #       define R300_FPI1_SRC2C_CONST             (1 << 17)
   1122 #       define R300_FPI1_SRC_MASK                0x0003ffff
   1123 #       define R300_FPI1_DSTC_SHIFT              18
   1124 #       define R300_FPI1_DSTC_MASK               (31 << 18)
   1125 #		define R300_FPI1_DSTC_REG_MASK_SHIFT     23
   1126 #       define R300_FPI1_DSTC_REG_X              (1 << 23)
   1127 #       define R300_FPI1_DSTC_REG_Y              (1 << 24)
   1128 #       define R300_FPI1_DSTC_REG_Z              (1 << 25)
   1129 #		define R300_FPI1_DSTC_OUTPUT_MASK_SHIFT  26
   1130 #       define R300_FPI1_DSTC_OUTPUT_X           (1 << 26)
   1131 #       define R300_FPI1_DSTC_OUTPUT_Y           (1 << 27)
   1132 #       define R300_FPI1_DSTC_OUTPUT_Z           (1 << 28)
   1133 
   1134 #define R300_PFS_INSTR3_0                   0x47C0
   1135 #       define R300_FPI3_SRC0A_SHIFT             0
   1136 #       define R300_FPI3_SRC0A_MASK              (31 << 0)
   1137 #       define R300_FPI3_SRC0A_CONST             (1 << 5)
   1138 #       define R300_FPI3_SRC1A_SHIFT             6
   1139 #       define R300_FPI3_SRC1A_MASK              (31 << 6)
   1140 #       define R300_FPI3_SRC1A_CONST             (1 << 11)
   1141 #       define R300_FPI3_SRC2A_SHIFT             12
   1142 #       define R300_FPI3_SRC2A_MASK              (31 << 12)
   1143 #       define R300_FPI3_SRC2A_CONST             (1 << 17)
   1144 #       define R300_FPI3_SRC_MASK                0x0003ffff
   1145 #       define R300_FPI3_DSTA_SHIFT              18
   1146 #       define R300_FPI3_DSTA_MASK               (31 << 18)
   1147 #       define R300_FPI3_DSTA_REG                (1 << 23)
   1148 #       define R300_FPI3_DSTA_OUTPUT             (1 << 24)
   1149 #		define R300_FPI3_DSTA_DEPTH              (1 << 27)
   1150 
   1151 #define R300_PFS_INSTR0_0                   0x48C0
   1152 #       define R300_FPI0_ARGC_SRC0C_XYZ          0
   1153 #       define R300_FPI0_ARGC_SRC0C_XXX          1
   1154 #       define R300_FPI0_ARGC_SRC0C_YYY          2
   1155 #       define R300_FPI0_ARGC_SRC0C_ZZZ          3
   1156 #       define R300_FPI0_ARGC_SRC1C_XYZ          4
   1157 #       define R300_FPI0_ARGC_SRC1C_XXX          5
   1158 #       define R300_FPI0_ARGC_SRC1C_YYY          6
   1159 #       define R300_FPI0_ARGC_SRC1C_ZZZ          7
   1160 #       define R300_FPI0_ARGC_SRC2C_XYZ          8
   1161 #       define R300_FPI0_ARGC_SRC2C_XXX          9
   1162 #       define R300_FPI0_ARGC_SRC2C_YYY          10
   1163 #       define R300_FPI0_ARGC_SRC2C_ZZZ          11
   1164 #       define R300_FPI0_ARGC_SRC0A              12
   1165 #       define R300_FPI0_ARGC_SRC1A              13
   1166 #       define R300_FPI0_ARGC_SRC2A              14
   1167 #       define R300_FPI0_ARGC_SRC1C_LRP          15
   1168 #       define R300_FPI0_ARGC_ZERO               20
   1169 #       define R300_FPI0_ARGC_ONE                21
   1170 	/* GUESS */
   1171 #       define R300_FPI0_ARGC_HALF               22
   1172 #       define R300_FPI0_ARGC_SRC0C_YZX          23
   1173 #       define R300_FPI0_ARGC_SRC1C_YZX          24
   1174 #       define R300_FPI0_ARGC_SRC2C_YZX          25
   1175 #       define R300_FPI0_ARGC_SRC0C_ZXY          26
   1176 #       define R300_FPI0_ARGC_SRC1C_ZXY          27
   1177 #       define R300_FPI0_ARGC_SRC2C_ZXY          28
   1178 #       define R300_FPI0_ARGC_SRC0CA_WZY         29
   1179 #       define R300_FPI0_ARGC_SRC1CA_WZY         30
   1180 #       define R300_FPI0_ARGC_SRC2CA_WZY         31
   1181 
   1182 #       define R300_FPI0_ARG0C_SHIFT             0
   1183 #       define R300_FPI0_ARG0C_MASK              (31 << 0)
   1184 #       define R300_FPI0_ARG0C_NEG               (1 << 5)
   1185 #       define R300_FPI0_ARG0C_ABS               (1 << 6)
   1186 #       define R300_FPI0_ARG1C_SHIFT             7
   1187 #       define R300_FPI0_ARG1C_MASK              (31 << 7)
   1188 #       define R300_FPI0_ARG1C_NEG               (1 << 12)
   1189 #       define R300_FPI0_ARG1C_ABS               (1 << 13)
   1190 #       define R300_FPI0_ARG2C_SHIFT             14
   1191 #       define R300_FPI0_ARG2C_MASK              (31 << 14)
   1192 #       define R300_FPI0_ARG2C_NEG               (1 << 19)
   1193 #       define R300_FPI0_ARG2C_ABS               (1 << 20)
   1194 #       define R300_FPI0_SPECIAL_LRP             (1 << 21)
   1195 #       define R300_FPI0_OUTC_MAD                (0 << 23)
   1196 #       define R300_FPI0_OUTC_DP3                (1 << 23)
   1197 #       define R300_FPI0_OUTC_DP4                (2 << 23)
   1198 #       define R300_FPI0_OUTC_MIN                (4 << 23)
   1199 #       define R300_FPI0_OUTC_MAX                (5 << 23)
   1200 #       define R300_FPI0_OUTC_CMPH               (7 << 23)
   1201 #       define R300_FPI0_OUTC_CMP                (8 << 23)
   1202 #       define R300_FPI0_OUTC_FRC                (9 << 23)
   1203 #       define R300_FPI0_OUTC_REPL_ALPHA         (10 << 23)
   1204 #       define R300_FPI0_OUTC_SAT                (1 << 30)
   1205 #       define R300_FPI0_INSERT_NOP              (1 << 31)
   1206 
   1207 #define R300_PFS_INSTR2_0                   0x49C0
   1208 #       define R300_FPI2_ARGA_SRC0C_X            0
   1209 #       define R300_FPI2_ARGA_SRC0C_Y            1
   1210 #       define R300_FPI2_ARGA_SRC0C_Z            2
   1211 #       define R300_FPI2_ARGA_SRC1C_X            3
   1212 #       define R300_FPI2_ARGA_SRC1C_Y            4
   1213 #       define R300_FPI2_ARGA_SRC1C_Z            5
   1214 #       define R300_FPI2_ARGA_SRC2C_X            6
   1215 #       define R300_FPI2_ARGA_SRC2C_Y            7
   1216 #       define R300_FPI2_ARGA_SRC2C_Z            8
   1217 #       define R300_FPI2_ARGA_SRC0A              9
   1218 #       define R300_FPI2_ARGA_SRC1A              10
   1219 #       define R300_FPI2_ARGA_SRC2A              11
   1220 #       define R300_FPI2_ARGA_SRC1A_LRP          15
   1221 #       define R300_FPI2_ARGA_ZERO               16
   1222 #       define R300_FPI2_ARGA_ONE                17
   1223 	/* GUESS */
   1224 #       define R300_FPI2_ARGA_HALF               18
   1225 #       define R300_FPI2_ARG0A_SHIFT             0
   1226 #       define R300_FPI2_ARG0A_MASK              (31 << 0)
   1227 #       define R300_FPI2_ARG0A_NEG               (1 << 5)
   1228 	/* GUESS */
   1229 #	define R300_FPI2_ARG0A_ABS		 (1 << 6)
   1230 #       define R300_FPI2_ARG1A_SHIFT             7
   1231 #       define R300_FPI2_ARG1A_MASK              (31 << 7)
   1232 #       define R300_FPI2_ARG1A_NEG               (1 << 12)
   1233 	/* GUESS */
   1234 #	define R300_FPI2_ARG1A_ABS		 (1 << 13)
   1235 #       define R300_FPI2_ARG2A_SHIFT             14
   1236 #       define R300_FPI2_ARG2A_MASK              (31 << 14)
   1237 #       define R300_FPI2_ARG2A_NEG               (1 << 19)
   1238 	/* GUESS */
   1239 #	define R300_FPI2_ARG2A_ABS		 (1 << 20)
   1240 #       define R300_FPI2_SPECIAL_LRP             (1 << 21)
   1241 #       define R300_FPI2_OUTA_MAD                (0 << 23)
   1242 #       define R300_FPI2_OUTA_DP4                (1 << 23)
   1243 #       define R300_FPI2_OUTA_MIN                (2 << 23)
   1244 #       define R300_FPI2_OUTA_MAX                (3 << 23)
   1245 #       define R300_FPI2_OUTA_CMP                (6 << 23)
   1246 #       define R300_FPI2_OUTA_FRC                (7 << 23)
   1247 #       define R300_FPI2_OUTA_EX2                (8 << 23)
   1248 #       define R300_FPI2_OUTA_LG2                (9 << 23)
   1249 #       define R300_FPI2_OUTA_RCP                (10 << 23)
   1250 #       define R300_FPI2_OUTA_RSQ                (11 << 23)
   1251 #       define R300_FPI2_OUTA_SAT                (1 << 30)
   1252 #       define R300_FPI2_UNKNOWN_31              (1 << 31)
   1253 /* END: Fragment program instruction set */
   1254 
   1255 /* Fog state and color */
   1256 #define R300_RE_FOG_STATE                   0x4BC0
   1257 #       define R300_FOG_ENABLE                   (1 << 0)
   1258 #	define R300_FOG_MODE_LINEAR              (0 << 1)
   1259 #	define R300_FOG_MODE_EXP                 (1 << 1)
   1260 #	define R300_FOG_MODE_EXP2                (2 << 1)
   1261 #	define R300_FOG_MODE_MASK                (3 << 1)
   1262 #define R300_FOG_COLOR_R                    0x4BC8
   1263 #define R300_FOG_COLOR_G                    0x4BCC
   1264 #define R300_FOG_COLOR_B                    0x4BD0
   1265 
   1266 #define R300_PP_ALPHA_TEST                  0x4BD4
   1267 #       define R300_REF_ALPHA_MASK               0x000000ff
   1268 #       define R300_ALPHA_TEST_FAIL              (0 << 8)
   1269 #       define R300_ALPHA_TEST_LESS              (1 << 8)
   1270 #       define R300_ALPHA_TEST_LEQUAL            (3 << 8)
   1271 #       define R300_ALPHA_TEST_EQUAL             (2 << 8)
   1272 #       define R300_ALPHA_TEST_GEQUAL            (6 << 8)
   1273 #       define R300_ALPHA_TEST_GREATER           (4 << 8)
   1274 #       define R300_ALPHA_TEST_NEQUAL            (5 << 8)
   1275 #       define R300_ALPHA_TEST_PASS              (7 << 8)
   1276 #       define R300_ALPHA_TEST_OP_MASK           (7 << 8)
   1277 #       define R300_ALPHA_TEST_ENABLE            (1 << 11)
   1278 
   1279 /* gap */
   1280 
   1281 /* Fragment program parameters in 7.16 floating point */
   1282 #define R300_PFS_PARAM_0_X                  0x4C00
   1283 #define R300_PFS_PARAM_0_Y                  0x4C04
   1284 #define R300_PFS_PARAM_0_Z                  0x4C08
   1285 #define R300_PFS_PARAM_0_W                  0x4C0C
   1286 /* GUESS: PARAM_31 is last, based on native limits reported by fglrx */
   1287 #define R300_PFS_PARAM_31_X                 0x4DF0
   1288 #define R300_PFS_PARAM_31_Y                 0x4DF4
   1289 #define R300_PFS_PARAM_31_Z                 0x4DF8
   1290 #define R300_PFS_PARAM_31_W                 0x4DFC
   1291 
   1292 /* Notes:
   1293  * - AFAIK fglrx always sets BLEND_UNKNOWN when blending is used in
   1294  *   the application
   1295  * - AFAIK fglrx always sets BLEND_NO_SEPARATE when CBLEND and ABLEND
   1296  *    are set to the same
   1297  *   function (both registers are always set up completely in any case)
   1298  * - Most blend flags are simply copied from R200 and not tested yet
   1299  */
   1300 #define R300_RB3D_CBLEND                    0x4E04
   1301 #define R300_RB3D_ABLEND                    0x4E08
   1302 /* the following only appear in CBLEND */
   1303 #       define R300_BLEND_ENABLE                     (1 << 0)
   1304 #       define R300_BLEND_UNKNOWN                    (3 << 1)
   1305 #       define R300_BLEND_NO_SEPARATE                (1 << 3)
   1306 /* the following are shared between CBLEND and ABLEND */
   1307 #       define R300_FCN_MASK                         (3  << 12)
   1308 #       define R300_COMB_FCN_ADD_CLAMP               (0  << 12)
   1309 #       define R300_COMB_FCN_ADD_NOCLAMP             (1  << 12)
   1310 #       define R300_COMB_FCN_SUB_CLAMP               (2  << 12)
   1311 #       define R300_COMB_FCN_SUB_NOCLAMP             (3  << 12)
   1312 #       define R300_COMB_FCN_MIN                     (4  << 12)
   1313 #       define R300_COMB_FCN_MAX                     (5  << 12)
   1314 #       define R300_COMB_FCN_RSUB_CLAMP              (6  << 12)
   1315 #       define R300_COMB_FCN_RSUB_NOCLAMP            (7  << 12)
   1316 #       define R300_BLEND_GL_ZERO                    (32)
   1317 #       define R300_BLEND_GL_ONE                     (33)
   1318 #       define R300_BLEND_GL_SRC_COLOR               (34)
   1319 #       define R300_BLEND_GL_ONE_MINUS_SRC_COLOR     (35)
   1320 #       define R300_BLEND_GL_DST_COLOR               (36)
   1321 #       define R300_BLEND_GL_ONE_MINUS_DST_COLOR     (37)
   1322 #       define R300_BLEND_GL_SRC_ALPHA               (38)
   1323 #       define R300_BLEND_GL_ONE_MINUS_SRC_ALPHA     (39)
   1324 #       define R300_BLEND_GL_DST_ALPHA               (40)
   1325 #       define R300_BLEND_GL_ONE_MINUS_DST_ALPHA     (41)
   1326 #       define R300_BLEND_GL_SRC_ALPHA_SATURATE      (42)
   1327 #       define R300_BLEND_GL_CONST_COLOR             (43)
   1328 #       define R300_BLEND_GL_ONE_MINUS_CONST_COLOR   (44)
   1329 #       define R300_BLEND_GL_CONST_ALPHA             (45)
   1330 #       define R300_BLEND_GL_ONE_MINUS_CONST_ALPHA   (46)
   1331 #       define R300_BLEND_MASK                       (63)
   1332 #       define R300_SRC_BLEND_SHIFT                  (16)
   1333 #       define R300_DST_BLEND_SHIFT                  (24)
   1334 #define R300_RB3D_BLEND_COLOR               0x4E10
   1335 #define R300_RB3D_COLORMASK                 0x4E0C
   1336 #       define R300_COLORMASK0_B                 (1<<0)
   1337 #       define R300_COLORMASK0_G                 (1<<1)
   1338 #       define R300_COLORMASK0_R                 (1<<2)
   1339 #       define R300_COLORMASK0_A                 (1<<3)
   1340 
   1341 /* gap */
   1342 
   1343 #define R300_RB3D_COLOROFFSET0              0x4E28
   1344 #       define R300_COLOROFFSET_MASK             0xFFFFFFF0 /* GUESS */
   1345 #define R300_RB3D_COLOROFFSET1              0x4E2C /* GUESS */
   1346 #define R300_RB3D_COLOROFFSET2              0x4E30 /* GUESS */
   1347 #define R300_RB3D_COLOROFFSET3              0x4E34 /* GUESS */
   1348 
   1349 /* gap */
   1350 
   1351 /* Bit 16: Larger tiles
   1352  * Bit 17: 4x2 tiles
   1353  * Bit 18: Extremely weird tile like, but some pixels duplicated?
   1354  */
   1355 #define R300_RB3D_COLORPITCH0               0x4E38
   1356 #       define R300_COLORPITCH_MASK              0x00001FF8 /* GUESS */
   1357 #       define R300_COLOR_TILE_ENABLE            (1 << 16) /* GUESS */
   1358 #       define R300_COLOR_MICROTILE_ENABLE       (1 << 17) /* GUESS */
   1359 #       define R300_COLOR_ENDIAN_NO_SWAP         (0 << 18) /* GUESS */
   1360 #       define R300_COLOR_ENDIAN_WORD_SWAP       (1 << 18) /* GUESS */
   1361 #       define R300_COLOR_ENDIAN_DWORD_SWAP      (2 << 18) /* GUESS */
   1362 #       define R300_COLOR_FORMAT_RGB565          (2 << 22)
   1363 #       define R300_COLOR_FORMAT_ARGB8888        (3 << 22)
   1364 #define R300_RB3D_COLORPITCH1               0x4E3C /* GUESS */
   1365 #define R300_RB3D_COLORPITCH2               0x4E40 /* GUESS */
   1366 #define R300_RB3D_COLORPITCH3               0x4E44 /* GUESS */
   1367 
   1368 #define R300_RB3D_AARESOLVE_CTL             0x4E88
   1369 /* gap */
   1370 
   1371 /* Guess by Vladimir.
   1372  * Set to 0A before 3D operations, set to 02 afterwards.
   1373  */
   1374 /*#define R300_RB3D_DSTCACHE_CTLSTAT          0x4E4C*/
   1375 #       define R300_RB3D_DSTCACHE_UNKNOWN_02             0x00000002
   1376 #       define R300_RB3D_DSTCACHE_UNKNOWN_0A             0x0000000A
   1377 
   1378 /* gap */
   1379 /* There seems to be no "write only" setting, so use Z-test = ALWAYS
   1380  * for this.
   1381  * Bit (1<<8) is the "test" bit. so plain write is 6  - vd
   1382  */
   1383 #define R300_ZB_CNTL                             0x4F00
   1384 #	define R300_STENCIL_ENABLE		 (1 << 0)
   1385 #	define R300_Z_ENABLE		         (1 << 1)
   1386 #	define R300_Z_WRITE_ENABLE		 (1 << 2)
   1387 #	define R300_Z_SIGNED_COMPARE		 (1 << 3)
   1388 #	define R300_STENCIL_FRONT_BACK		 (1 << 4)
   1389 
   1390 #define R300_ZB_ZSTENCILCNTL                   0x4f04
   1391 	/* functions */
   1392 #	define R300_ZS_NEVER			0
   1393 #	define R300_ZS_LESS			1
   1394 #	define R300_ZS_LEQUAL			2
   1395 #	define R300_ZS_EQUAL			3
   1396 #	define R300_ZS_GEQUAL			4
   1397 #	define R300_ZS_GREATER			5
   1398 #	define R300_ZS_NOTEQUAL			6
   1399 #	define R300_ZS_ALWAYS			7
   1400 #       define R300_ZS_MASK                     7
   1401 	/* operations */
   1402 #	define R300_ZS_KEEP			0
   1403 #	define R300_ZS_ZERO			1
   1404 #	define R300_ZS_REPLACE			2
   1405 #	define R300_ZS_INCR			3
   1406 #	define R300_ZS_DECR			4
   1407 #	define R300_ZS_INVERT			5
   1408 #	define R300_ZS_INCR_WRAP		6
   1409 #	define R300_ZS_DECR_WRAP		7
   1410 #	define R300_Z_FUNC_SHIFT		0
   1411 	/* front and back refer to operations done for front
   1412 	   and back faces, i.e. separate stencil function support */
   1413 #	define R300_S_FRONT_FUNC_SHIFT	        3
   1414 #	define R300_S_FRONT_SFAIL_OP_SHIFT	6
   1415 #	define R300_S_FRONT_ZPASS_OP_SHIFT	9
   1416 #	define R300_S_FRONT_ZFAIL_OP_SHIFT      12
   1417 #	define R300_S_BACK_FUNC_SHIFT           15
   1418 #	define R300_S_BACK_SFAIL_OP_SHIFT       18
   1419 #	define R300_S_BACK_ZPASS_OP_SHIFT       21
   1420 #	define R300_S_BACK_ZFAIL_OP_SHIFT       24
   1421 
   1422 #define R300_ZB_STENCILREFMASK                        0x4f08
   1423 #	define R300_STENCILREF_SHIFT       0
   1424 #	define R300_STENCILREF_MASK        0x000000ff
   1425 #	define R300_STENCILMASK_SHIFT      8
   1426 #	define R300_STENCILMASK_MASK       0x0000ff00
   1427 #	define R300_STENCILWRITEMASK_SHIFT 16
   1428 #	define R300_STENCILWRITEMASK_MASK  0x00ff0000
   1429 
   1430 /* gap */
   1431 
   1432 #define R300_ZB_FORMAT                             0x4f10
   1433 #	define R300_DEPTHFORMAT_16BIT_INT_Z   (0 << 0)
   1434 #	define R300_DEPTHFORMAT_16BIT_13E3    (1 << 0)
   1435 #	define R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL   (2 << 0)
   1436 /* reserved up to (15 << 0) */
   1437 #	define R300_INVERT_13E3_LEADING_ONES  (0 << 4)
   1438 #	define R300_INVERT_13E3_LEADING_ZEROS (1 << 4)
   1439 
   1440 #define R300_ZB_ZTOP                             0x4F14
   1441 #	define R300_ZTOP_DISABLE                 (0 << 0)
   1442 #	define R300_ZTOP_ENABLE                  (1 << 0)
   1443 
   1444 /* gap */
   1445 
   1446 #define R300_ZB_ZCACHE_CTLSTAT            0x4f18
   1447 #       define R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_NO_EFFECT      (0 << 0)
   1448 #       define R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE (1 << 0)
   1449 #       define R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_NO_EFFECT       (0 << 1)
   1450 #       define R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE            (1 << 1)
   1451 #       define R300_ZB_ZCACHE_CTLSTAT_ZC_BUSY_IDLE            (0 << 31)
   1452 #       define R300_ZB_ZCACHE_CTLSTAT_ZC_BUSY_BUSY            (1 << 31)
   1453 
   1454 #define R300_ZB_BW_CNTL                     0x4f1c
   1455 #	define R300_HIZ_DISABLE                              (0 << 0)
   1456 #	define R300_HIZ_ENABLE                               (1 << 0)
   1457 #	define R300_HIZ_MIN                                  (0 << 1)
   1458 #	define R300_HIZ_MAX                                  (1 << 1)
   1459 #	define R300_FAST_FILL_DISABLE                        (0 << 2)
   1460 #	define R300_FAST_FILL_ENABLE                         (1 << 2)
   1461 #	define R300_RD_COMP_DISABLE                          (0 << 3)
   1462 #	define R300_RD_COMP_ENABLE                           (1 << 3)
   1463 #	define R300_WR_COMP_DISABLE                          (0 << 4)
   1464 #	define R300_WR_COMP_ENABLE                           (1 << 4)
   1465 #	define R300_ZB_CB_CLEAR_RMW                          (0 << 5)
   1466 #	define R300_ZB_CB_CLEAR_CACHE_LINEAR                 (1 << 5)
   1467 #	define R300_FORCE_COMPRESSED_STENCIL_VALUE_DISABLE   (0 << 6)
   1468 #	define R300_FORCE_COMPRESSED_STENCIL_VALUE_ENABLE    (1 << 6)
   1469 
   1470 #	define R500_ZEQUAL_OPTIMIZE_ENABLE                   (0 << 7)
   1471 #	define R500_ZEQUAL_OPTIMIZE_DISABLE                  (1 << 7)
   1472 #	define R500_SEQUAL_OPTIMIZE_ENABLE                   (0 << 8)
   1473 #	define R500_SEQUAL_OPTIMIZE_DISABLE                  (1 << 8)
   1474 
   1475 #	define R500_BMASK_ENABLE                             (0 << 10)
   1476 #	define R500_BMASK_DISABLE                            (1 << 10)
   1477 #	define R500_HIZ_EQUAL_REJECT_DISABLE                 (0 << 11)
   1478 #	define R500_HIZ_EQUAL_REJECT_ENABLE                  (1 << 11)
   1479 #	define R500_HIZ_FP_EXP_BITS_DISABLE                  (0 << 12)
   1480 #	define R500_HIZ_FP_EXP_BITS_1                        (1 << 12)
   1481 #	define R500_HIZ_FP_EXP_BITS_2                        (2 << 12)
   1482 #	define R500_HIZ_FP_EXP_BITS_3                        (3 << 12)
   1483 #	define R500_HIZ_FP_EXP_BITS_4                        (4 << 12)
   1484 #	define R500_HIZ_FP_EXP_BITS_5                        (5 << 12)
   1485 #	define R500_HIZ_FP_INVERT_LEADING_ONES               (0 << 15)
   1486 #	define R500_HIZ_FP_INVERT_LEADING_ZEROS              (1 << 15)
   1487 #	define R500_TILE_OVERWRITE_RECOMPRESSION_ENABLE      (0 << 16)
   1488 #	define R500_TILE_OVERWRITE_RECOMPRESSION_DISABLE     (1 << 16)
   1489 #	define R500_CONTIGUOUS_6XAA_SAMPLES_ENABLE           (0 << 17)
   1490 #	define R500_CONTIGUOUS_6XAA_SAMPLES_DISABLE          (1 << 17)
   1491 #	define R500_PEQ_PACKING_DISABLE                      (0 << 18)
   1492 #	define R500_PEQ_PACKING_ENABLE                       (1 << 18)
   1493 #	define R500_COVERED_PTR_MASKING_DISABLE              (0 << 18)
   1494 #	define R500_COVERED_PTR_MASKING_ENABLE               (1 << 18)
   1495 
   1496 
   1497 /* gap */
   1498 
   1499 /* Z Buffer Address Offset.
   1500  * Bits 31 to 5 are used for aligned Z buffer address offset for macro tiles.
   1501  */
   1502 #define R300_ZB_DEPTHOFFSET               0x4f20
   1503 
   1504 /* Z Buffer Pitch and Endian Control */
   1505 #define R300_ZB_DEPTHPITCH                0x4f24
   1506 #       define R300_DEPTHPITCH_MASK              0x00003FFC
   1507 #       define R300_DEPTHMACROTILE_DISABLE      (0 << 16)
   1508 #       define R300_DEPTHMACROTILE_ENABLE       (1 << 16)
   1509 #       define R300_DEPTHMICROTILE_LINEAR       (0 << 17)
   1510 #       define R300_DEPTHMICROTILE_TILED        (1 << 17)
   1511 #       define R300_DEPTHMICROTILE_TILED_SQUARE (2 << 17)
   1512 #       define R300_DEPTHENDIAN_NO_SWAP         (0 << 18)
   1513 #       define R300_DEPTHENDIAN_WORD_SWAP       (1 << 18)
   1514 #       define R300_DEPTHENDIAN_DWORD_SWAP      (2 << 18)
   1515 #       define R300_DEPTHENDIAN_HALF_DWORD_SWAP (3 << 18)
   1516 
   1517 /* Z Buffer Clear Value */
   1518 #define R300_ZB_DEPTHCLEARVALUE                  0x4f28
   1519 
   1520 #define R300_ZB_ZMASK_OFFSET			 0x4f30
   1521 #define R300_ZB_ZMASK_PITCH			 0x4f34
   1522 #define R300_ZB_ZMASK_WRINDEX			 0x4f38
   1523 #define R300_ZB_ZMASK_DWORD			 0x4f3c
   1524 #define R300_ZB_ZMASK_RDINDEX			 0x4f40
   1525 
   1526 /* Hierarchical Z Memory Offset */
   1527 #define R300_ZB_HIZ_OFFSET                       0x4f44
   1528 
   1529 /* Hierarchical Z Write Index */
   1530 #define R300_ZB_HIZ_WRINDEX                      0x4f48
   1531 
   1532 /* Hierarchical Z Data */
   1533 #define R300_ZB_HIZ_DWORD                        0x4f4c
   1534 
   1535 /* Hierarchical Z Read Index */
   1536 #define R300_ZB_HIZ_RDINDEX                      0x4f50
   1537 
   1538 /* Hierarchical Z Pitch */
   1539 #define R300_ZB_HIZ_PITCH                        0x4f54
   1540 
   1541 /* Z Buffer Z Pass Counter Data */
   1542 #define R300_ZB_ZPASS_DATA                       0x4f58
   1543 
   1544 /* Z Buffer Z Pass Counter Address */
   1545 #define R300_ZB_ZPASS_ADDR                       0x4f5c
   1546 
   1547 /* Depth buffer X and Y coordinate offset */
   1548 #define R300_ZB_DEPTHXY_OFFSET                   0x4f60
   1549 #	define R300_DEPTHX_OFFSET_SHIFT  1
   1550 #	define R300_DEPTHX_OFFSET_MASK   0x000007FE
   1551 #	define R300_DEPTHY_OFFSET_SHIFT  17
   1552 #	define R300_DEPTHY_OFFSET_MASK   0x07FE0000
   1553 
   1554 /* Sets the fifo sizes */
   1555 #define R500_ZB_FIFO_SIZE                        0x4fd0
   1556 #	define R500_OP_FIFO_SIZE_FULL   (0 << 0)
   1557 #	define R500_OP_FIFO_SIZE_HALF   (1 << 0)
   1558 #	define R500_OP_FIFO_SIZE_QUATER (2 << 0)
   1559 #	define R500_OP_FIFO_SIZE_EIGTHS (4 << 0)
   1560 
   1561 /* Stencil Reference Value and Mask for backfacing quads */
   1562 /* R300_ZB_STENCILREFMASK handles front face */
   1563 #define R500_ZB_STENCILREFMASK_BF                0x4fd4
   1564 #	define R500_STENCILREF_SHIFT       0
   1565 #	define R500_STENCILREF_MASK        0x000000ff
   1566 #	define R500_STENCILMASK_SHIFT      8
   1567 #	define R500_STENCILMASK_MASK       0x0000ff00
   1568 #	define R500_STENCILWRITEMASK_SHIFT 16
   1569 #	define R500_STENCILWRITEMASK_MASK  0x00ff0000
   1570 
   1571 /* BEGIN: Vertex program instruction set */
   1572 
   1573 /* Every instruction is four dwords long:
   1574  *  DWORD 0: output and opcode
   1575  *  DWORD 1: first argument
   1576  *  DWORD 2: second argument
   1577  *  DWORD 3: third argument
   1578  *
   1579  * Notes:
   1580  *  - ABS r, a is implemented as MAX r, a, -a
   1581  *  - MOV is implemented as ADD to zero
   1582  *  - XPD is implemented as MUL + MAD
   1583  *  - FLR is implemented as FRC + ADD
   1584  *  - apparently, fglrx tries to schedule instructions so that there is at
   1585  *    least one instruction between the write to a temporary and the first
   1586  *    read from said temporary; however, violations of this scheduling are
   1587  *    allowed
   1588  *  - register indices seem to be unrelated with OpenGL aliasing to
   1589  *    conventional state
   1590  *  - only one attribute and one parameter can be loaded at a time; however,
   1591  *    the same attribute/parameter can be used for more than one argument
   1592  *  - the second software argument for POW is the third hardware argument
   1593  *    (no idea why)
   1594  *  - MAD with only temporaries as input seems to use VPI_OUT_SELECT_MAD_2
   1595  *
   1596  * There is some magic surrounding LIT:
   1597  *   The single argument is replicated across all three inputs, but swizzled:
   1598  *     First argument: xyzy
   1599  *     Second argument: xyzx
   1600  *     Third argument: xyzw
   1601  *   Whenever the result is used later in the fragment program, fglrx forces
   1602  *   x and w to be 1.0 in the input selection; I don't know whether this is
   1603  *   strictly necessary
   1604  */
   1605 #define R300_VPI_OUT_OP_DOT                     (1 << 0)
   1606 #define R300_VPI_OUT_OP_MUL                     (2 << 0)
   1607 #define R300_VPI_OUT_OP_ADD                     (3 << 0)
   1608 #define R300_VPI_OUT_OP_MAD                     (4 << 0)
   1609 #define R300_VPI_OUT_OP_DST                     (5 << 0)
   1610 #define R300_VPI_OUT_OP_FRC                     (6 << 0)
   1611 #define R300_VPI_OUT_OP_MAX                     (7 << 0)
   1612 #define R300_VPI_OUT_OP_MIN                     (8 << 0)
   1613 #define R300_VPI_OUT_OP_SGE                     (9 << 0)
   1614 #define R300_VPI_OUT_OP_SLT                     (10 << 0)
   1615 	/* Used in GL_POINT_DISTANCE_ATTENUATION_ARB, vector(scalar, vector) */
   1616 #define R300_VPI_OUT_OP_UNK12                   (12 << 0)
   1617 #define R300_VPI_OUT_OP_ARL                     (13 << 0)
   1618 #define R300_VPI_OUT_OP_EXP                     (65 << 0)
   1619 #define R300_VPI_OUT_OP_LOG                     (66 << 0)
   1620 	/* Used in fog computations, scalar(scalar) */
   1621 #define R300_VPI_OUT_OP_UNK67                   (67 << 0)
   1622 #define R300_VPI_OUT_OP_LIT                     (68 << 0)
   1623 #define R300_VPI_OUT_OP_POW                     (69 << 0)
   1624 #define R300_VPI_OUT_OP_RCP                     (70 << 0)
   1625 #define R300_VPI_OUT_OP_RSQ                     (72 << 0)
   1626 	/* Used in GL_POINT_DISTANCE_ATTENUATION_ARB, scalar(scalar) */
   1627 #define R300_VPI_OUT_OP_UNK73                   (73 << 0)
   1628 #define R300_VPI_OUT_OP_EX2                     (75 << 0)
   1629 #define R300_VPI_OUT_OP_LG2                     (76 << 0)
   1630 #define R300_VPI_OUT_OP_MAD_2                   (128 << 0)
   1631 	/* all temps, vector(scalar, vector, vector) */
   1632 #define R300_VPI_OUT_OP_UNK129                  (129 << 0)
   1633 
   1634 #define R300_VPI_OUT_REG_CLASS_TEMPORARY        (0 << 8)
   1635 #define R300_VPI_OUT_REG_CLASS_ADDR             (1 << 8)
   1636 #define R300_VPI_OUT_REG_CLASS_RESULT           (2 << 8)
   1637 #define R300_VPI_OUT_REG_CLASS_MASK             (31 << 8)
   1638 
   1639 #define R300_VPI_OUT_REG_INDEX_SHIFT            13
   1640 	/* GUESS based on fglrx native limits */
   1641 #define R300_VPI_OUT_REG_INDEX_MASK             (31 << 13)
   1642 
   1643 #define R300_VPI_OUT_WRITE_X                    (1 << 20)
   1644 #define R300_VPI_OUT_WRITE_Y                    (1 << 21)
   1645 #define R300_VPI_OUT_WRITE_Z                    (1 << 22)
   1646 #define R300_VPI_OUT_WRITE_W                    (1 << 23)
   1647 
   1648 #define R300_VPI_IN_REG_CLASS_TEMPORARY         (0 << 0)
   1649 #define R300_VPI_IN_REG_CLASS_ATTRIBUTE         (1 << 0)
   1650 #define R300_VPI_IN_REG_CLASS_PARAMETER         (2 << 0)
   1651 #define R300_VPI_IN_REG_CLASS_NONE              (9 << 0)
   1652 #define R300_VPI_IN_REG_CLASS_MASK              (31 << 0)
   1653 
   1654 #define R300_VPI_IN_REG_INDEX_SHIFT             5
   1655 	/* GUESS based on fglrx native limits */
   1656 #define R300_VPI_IN_REG_INDEX_MASK              (255 << 5)
   1657 
   1658 /* The R300 can select components from the input register arbitrarily.
   1659  * Use the following constants, shifted by the component shift you
   1660  * want to select
   1661  */
   1662 #define R300_VPI_IN_SELECT_X    0
   1663 #define R300_VPI_IN_SELECT_Y    1
   1664 #define R300_VPI_IN_SELECT_Z    2
   1665 #define R300_VPI_IN_SELECT_W    3
   1666 #define R300_VPI_IN_SELECT_ZERO 4
   1667 #define R300_VPI_IN_SELECT_ONE  5
   1668 #define R300_VPI_IN_SELECT_MASK 7
   1669 
   1670 #define R300_VPI_IN_X_SHIFT                     13
   1671 #define R300_VPI_IN_Y_SHIFT                     16
   1672 #define R300_VPI_IN_Z_SHIFT                     19
   1673 #define R300_VPI_IN_W_SHIFT                     22
   1674 
   1675 #define R300_VPI_IN_NEG_X                       (1 << 25)
   1676 #define R300_VPI_IN_NEG_Y                       (1 << 26)
   1677 #define R300_VPI_IN_NEG_Z                       (1 << 27)
   1678 #define R300_VPI_IN_NEG_W                       (1 << 28)
   1679 /* END: Vertex program instruction set */
   1680 
   1681 /* BEGIN: Packet 3 commands */
   1682 
   1683 /* A primitive emission dword. */
   1684 #define R300_PRIM_TYPE_NONE                     (0 << 0)
   1685 #define R300_PRIM_TYPE_POINT                    (1 << 0)
   1686 #define R300_PRIM_TYPE_LINE                     (2 << 0)
   1687 #define R300_PRIM_TYPE_LINE_STRIP               (3 << 0)
   1688 #define R300_PRIM_TYPE_TRI_LIST                 (4 << 0)
   1689 #define R300_PRIM_TYPE_TRI_FAN                  (5 << 0)
   1690 #define R300_PRIM_TYPE_TRI_STRIP                (6 << 0)
   1691 #define R300_PRIM_TYPE_TRI_TYPE2                (7 << 0)
   1692 #define R300_PRIM_TYPE_RECT_LIST                (8 << 0)
   1693 #define R300_PRIM_TYPE_3VRT_POINT_LIST          (9 << 0)
   1694 #define R300_PRIM_TYPE_3VRT_LINE_LIST           (10 << 0)
   1695 	/* GUESS (based on r200) */
   1696 #define R300_PRIM_TYPE_POINT_SPRITES            (11 << 0)
   1697 #define R300_PRIM_TYPE_LINE_LOOP                (12 << 0)
   1698 #define R300_PRIM_TYPE_QUADS                    (13 << 0)
   1699 #define R300_PRIM_TYPE_QUAD_STRIP               (14 << 0)
   1700 #define R300_PRIM_TYPE_POLYGON                  (15 << 0)
   1701 #define R300_PRIM_TYPE_MASK                     0xF
   1702 #define R300_PRIM_WALK_IND                      (1 << 4)
   1703 #define R300_PRIM_WALK_LIST                     (2 << 4)
   1704 #define R300_PRIM_WALK_RING                     (3 << 4)
   1705 #define R300_PRIM_WALK_MASK                     (3 << 4)
   1706 	/* GUESS (based on r200) */
   1707 #define R300_PRIM_COLOR_ORDER_BGRA              (0 << 6)
   1708 #define R300_PRIM_COLOR_ORDER_RGBA              (1 << 6)
   1709 #define R300_PRIM_NUM_VERTICES_SHIFT            16
   1710 #define R300_PRIM_NUM_VERTICES_MASK             0xffff
   1711 
   1712 /* Draw a primitive from vertex data in arrays loaded via 3D_LOAD_VBPNTR.
   1713  * Two parameter dwords:
   1714  * 0. The first parameter appears to be always 0
   1715  * 1. The second parameter is a standard primitive emission dword.
   1716  */
   1717 #define R300_PACKET3_3D_DRAW_VBUF           0x00002800
   1718 
   1719 /* Specify the full set of vertex arrays as (address, stride).
   1720  * The first parameter is the number of vertex arrays specified.
   1721  * The rest of the command is a variable length list of blocks, where
   1722  * each block is three dwords long and specifies two arrays.
   1723  * The first dword of a block is split into two words, the lower significant
   1724  * word refers to the first array, the more significant word to the second
   1725  * array in the block.
   1726  * The low byte of each word contains the size of an array entry in dwords,
   1727  * the high byte contains the stride of the array.
   1728  * The second dword of a block contains the pointer to the first array,
   1729  * the third dword of a block contains the pointer to the second array.
   1730  * Note that if the total number of arrays is odd, the third dword of
   1731  * the last block is omitted.
   1732  */
   1733 #define R300_PACKET3_3D_LOAD_VBPNTR         0x00002F00
   1734 
   1735 #define R300_PACKET3_INDX_BUFFER            0x00003300
   1736 #    define R300_EB_UNK1_SHIFT                      24
   1737 #    define R300_EB_UNK1                    (0x80<<24)
   1738 #    define R300_EB_UNK2                        0x0810
   1739 #define R300_PACKET3_3D_DRAW_VBUF_2         0x00003400
   1740 #define R300_PACKET3_3D_DRAW_INDX_2         0x00003600
   1741 
   1742 /* END: Packet 3 commands */
   1743 
   1744 
   1745 /* Color formats for 2d packets
   1746  */
   1747 #define R300_CP_COLOR_FORMAT_CI8	2
   1748 #define R300_CP_COLOR_FORMAT_ARGB1555	3
   1749 #define R300_CP_COLOR_FORMAT_RGB565	4
   1750 #define R300_CP_COLOR_FORMAT_ARGB8888	6
   1751 #define R300_CP_COLOR_FORMAT_RGB332	7
   1752 #define R300_CP_COLOR_FORMAT_RGB8	9
   1753 #define R300_CP_COLOR_FORMAT_ARGB4444	15
   1754 
   1755 /*
   1756  * CP type-3 packets
   1757  */
   1758 #define R300_CP_CMD_BITBLT_MULTI	0xC0009B00
   1759 
   1760 #define R500_VAP_INDEX_OFFSET		0x208c
   1761 
   1762 #define R500_GA_US_VECTOR_INDEX         0x4250
   1763 #define R500_GA_US_VECTOR_DATA          0x4254
   1764 
   1765 #define R500_RS_IP_0                    0x4074
   1766 #define R500_RS_INST_0                  0x4320
   1767 
   1768 #define R500_US_CONFIG                  0x4600
   1769 
   1770 #define R500_US_FC_CTRL			0x4624
   1771 #define R500_US_CODE_ADDR		0x4630
   1772 
   1773 #define R500_RB3D_COLOR_CLEAR_VALUE_AR  0x46c0
   1774 #define R500_RB3D_CONSTANT_COLOR_AR     0x4ef8
   1775 
   1776 #endif /* _R300_REG_H */
   1777 
   1778 /* *INDENT-ON* */
   1779