| /external/llvm/include/llvm/CodeGen/ |
| MachineRegisterInfo.h | 76 MachineOperand *&getRegUseDefListHead(unsigned RegNo) {
77 if (TargetRegisterInfo::isVirtualRegister(RegNo))
78 return VRegInfo[RegNo].second;
79 return PhysRegUseDefLists[RegNo];
82 MachineOperand *getRegUseDefListHead(unsigned RegNo) const {
83 if (TargetRegisterInfo::isVirtualRegister(RegNo))
84 return VRegInfo[RegNo].second;
85 return PhysRegUseDefLists[RegNo];
223 reg_iterator reg_begin(unsigned RegNo) const {
224 return reg_iterator(getRegUseDefListHead(RegNo));
[all...] |
| StackMaps.h | 100 unsigned short RegNo;
103 LiveOutReg() : Reg(0), RegNo(0), Size(0) {}
104 LiveOutReg(unsigned short Reg, unsigned short RegNo, unsigned short Size)
105 : Reg(Reg), RegNo(RegNo), Size(Size) {}
110 bool operator< (const LiveOutReg &LO) const { return RegNo < LO.RegNo; }
|
| /art/compiler/utils/arm64/ |
| managed_register_arm64.cc | 47 return (RegNo() == other.RegNo());
52 int Arm64ManagedRegister::RegNo() const {
75 int low = RegNo();
87 int high = RegNo();
|
| /external/llvm/lib/Target/Mips/Disassembler/ |
| MipsDisassembler.cpp | 111 unsigned RegNo,
116 unsigned RegNo,
121 unsigned RegNo,
131 unsigned RegNo,
136 unsigned RegNo,
141 unsigned RegNo,
146 unsigned RegNo,
151 unsigned RegNo,
156 unsigned RegNo,
160 static DecodeStatus DecodeFGRCCRegisterClass(MCInst &Inst, unsigned RegNo,
[all...] |
| /external/llvm/lib/CodeGen/AsmPrinter/ |
| DbgValueHistoryCalculator.cpp | 76 // \brief Claim that @Var is not described by @RegNo anymore.
78 unsigned RegNo, const MDNode *Var) {
79 const auto &I = RegVars.find(RegNo);
80 assert(RegNo != 0U && I != RegVars.end());
90 // \brief Claim that @Var is now described by @RegNo.
92 unsigned RegNo, const MDNode *Var) {
93 assert(RegNo != 0U);
94 auto &VarSet = RegVars[RegNo];
100 // @RegNo by inserting @ClobberingInstr to their history.
101 static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo,
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXRegisterInfo.h | 59 const char *getName(unsigned RegNo) const {
61 O << "reg" << RegNo;
|
| /external/llvm/lib/Target/XCore/InstPrinter/ |
| XCoreInstPrinter.h | 32 static const char *getRegisterName(unsigned RegNo);
34 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
|
| XCoreInstPrinter.cpp | 28 void XCoreInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
29 OS << StringRef(getRegisterName(RegNo)).lower();
|
| /external/llvm/lib/Target/SystemZ/Disassembler/ |
| SystemZDisassembler.cpp | 51 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo,
53 assert(RegNo < 16 && "Invalid register");
54 RegNo = Regs[RegNo];
55 if (RegNo == 0)
57 Inst.addOperand(MCOperand::CreateReg(RegNo));
61 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
64 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs);
67 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo,
70 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs)
[all...] |
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86BaseInfo.h | 721 inline bool isX86_64ExtendedReg(unsigned RegNo) {
722 if ((RegNo > X86::XMM7 && RegNo <= X86::XMM15) ||
723 (RegNo > X86::XMM23 && RegNo <= X86::XMM31) ||
724 (RegNo > X86::YMM7 && RegNo <= X86::YMM15) ||
725 (RegNo > X86::YMM23 && RegNo <= X86::YMM31) ||
726 (RegNo > X86::ZMM7 && RegNo <= X86::ZMM15) |
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsTargetStreamer.h | 54 virtual void emitDirectiveCpload(unsigned RegNo);
55 virtual void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
130 virtual void emitDirectiveCpload(unsigned RegNo);
131 void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
187 virtual void emitDirectiveCpload(unsigned RegNo);
188 void emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
|
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 35 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
36 OS << getRegisterName(RegNo);
270 unsigned RegNo;
273 case PPC::CR0: RegNo = 0; break;
274 case PPC::CR1: RegNo = 1; break;
275 case PPC::CR2: RegNo = 2; break;
276 case PPC::CR3: RegNo = 3; break;
277 case PPC::CR4: RegNo = 4; break;
278 case PPC::CR5: RegNo = 5; break;
279 case PPC::CR6: RegNo = 6; break
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/InstPrinter/ |
| AMDGPUInstPrinter.h | 19 static const char *getRegisterName(unsigned RegNo);
21 // virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonAsmPrinter.h | 50 static const char *getRegisterName(unsigned RegNo);
|
| /external/mesa3d/src/gallium/drivers/radeon/InstPrinter/ |
| AMDGPUInstPrinter.h | 19 static const char *getRegisterName(unsigned RegNo);
21 // virtual void printRegName(raw_ostream &OS, unsigned RegNo) const;
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 172 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo,
174 assert(RegNo < N && "Invalid register number");
175 Inst.addOperand(MCOperand::CreateReg(Regs[RegNo]));
179 static DecodeStatus DecodeCRRCRegisterClass(MCInst &Inst, uint64_t RegNo,
182 return decodeRegisterClass(Inst, RegNo, CRRegs);
185 static DecodeStatus DecodeCRBITRCRegisterClass(MCInst &Inst, uint64_t RegNo,
188 return decodeRegisterClass(Inst, RegNo, CRBITRegs);
191 static DecodeStatus DecodeF4RCRegisterClass(MCInst &Inst, uint64_t RegNo,
194 return decodeRegisterClass(Inst, RegNo, FRegs);
197 static DecodeStatus DecodeF8RCRegisterClass(MCInst &Inst, uint64_t RegNo,
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 314 const MCRegisterDesc &operator[](unsigned RegNo) const {
315 assert(RegNo < NumRegs &&
317 return Desc[RegNo];
322 const MCRegisterDesc &get(unsigned RegNo) const {
323 return operator[](RegNo);
327 /// for physical register RegNo. Return zero if the sub-register does not
339 unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;
353 const char *getName(unsigned RegNo) const {
354 return RegStrings + get(RegNo).Name;
404 /// \brief Returns the encoding for RegNo
[all...] |
| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| NVPTXInstPrinter.h | 30 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
35 static const char *getRegisterName(unsigned RegNo);
|
| /external/llvm/lib/Target/Sparc/InstPrinter/ |
| SparcInstPrinter.h | 33 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
43 static const char *getRegisterName(unsigned RegNo);
|
| /external/llvm/lib/Target/Sparc/Disassembler/ |
| SparcDisassembler.cpp | 117 unsigned RegNo,
120 if (RegNo > 31)
122 unsigned Reg = IntRegDecoderTable[RegNo];
128 unsigned RegNo,
131 if (RegNo > 31)
133 unsigned Reg = IntRegDecoderTable[RegNo];
140 unsigned RegNo,
143 if (RegNo > 31)
145 unsigned Reg = FPRegDecoderTable[RegNo];
152 unsigned RegNo,
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.h | 32 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
39 virtual StringRef getRegName(unsigned RegNo) const {
40 return getRegisterName(RegNo);
42 static const char *getRegisterName(unsigned RegNo,
132 StringRef getRegName(unsigned RegNo) const override {
133 return getRegisterName(RegNo);
135 static const char *getRegisterName(unsigned RegNo,
|
| /external/llvm/lib/Target/Sparc/AsmParser/ |
| SparcAsmParser.cpp | 53 bool ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc) override;
72 // returns true if Tok is matched to a register and returns register in RegNo.
73 bool matchRegisterName(const AsmToken &Tok, unsigned &RegNo,
429 ParseRegister(unsigned &RegNo, SMLoc &StartLoc, SMLoc &EndLoc)
434 RegNo = 0;
439 if (matchRegisterName(Tok, RegNo, regKind)) {
607 unsigned RegNo, RegKind;
608 if (!matchRegisterName(Parser.getTok(), RegNo, RegKind))
613 Operands.push_back(SparcOperand::CreateReg(RegNo, RegKind, S, E));
657 unsigned RegNo;
[all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 35 unsigned RegNo, uint64_t Address,
38 unsigned RegNo,
41 static DecodeStatus DecodeFPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
44 static DecodeStatus DecodeFPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
47 static DecodeStatus DecodeFPR16RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
50 static DecodeStatus DecodeFPR8RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
53 static DecodeStatus DecodeGPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
57 unsigned RegNo, uint64_t Address,
59 static DecodeStatus DecodeGPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
63 unsigned RegNo, uint64_t Address
[all...] |
| /external/llvm/lib/CodeGen/ |
| StackMaps.cpp | 113 // The physical register number will ultimately be encoded as a DWARF regno.
140 int RegNo = TRI->getDwarfRegNum(Reg, false);
141 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNo < 0; ++SR)
142 RegNo = TRI->getDwarfRegNum(*SR, false);
144 assert(RegNo >= 0 && "Invalid Dwarf register number.");
145 return (unsigned) RegNo;
151 unsigned RegNo = getDwarfRegNum(Reg, TRI);
153 return LiveOutReg(Reg, RegNo, Size);
176 if (I->RegNo != II->RegNo) {
[all...] |
| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| MSP430InstPrinter.h | 32 static const char *getRegisterName(unsigned RegNo);
|
