1 //===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This class prints an AArch64 MCInst to a .s file. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef AArch64INSTPRINTER_H 15 #define AArch64INSTPRINTER_H 16 17 #include "MCTargetDesc/AArch64MCTargetDesc.h" 18 #include "llvm/ADT/StringRef.h" 19 #include "llvm/MC/MCInstPrinter.h" 20 #include "llvm/MC/MCSubtargetInfo.h" 21 22 namespace llvm { 23 24 class MCOperand; 25 26 class AArch64InstPrinter : public MCInstPrinter { 27 public: 28 AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, 29 const MCRegisterInfo &MRI, const MCSubtargetInfo &STI); 30 31 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override; 32 void printRegName(raw_ostream &OS, unsigned RegNo) const override; 33 34 // Autogenerated by tblgen. 35 virtual void printInstruction(const MCInst *MI, raw_ostream &O); 36 virtual bool printAliasInstr(const MCInst *MI, raw_ostream &O); 37 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, 38 unsigned PrintMethodIdx, raw_ostream &O); 39 virtual StringRef getRegName(unsigned RegNo) const { 40 return getRegisterName(RegNo); 41 } 42 static const char *getRegisterName(unsigned RegNo, 43 unsigned AltIdx = AArch64::NoRegAltName); 44 45 protected: 46 bool printSysAlias(const MCInst *MI, raw_ostream &O); 47 // Operand printers 48 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 49 void printHexImm(const MCInst *MI, unsigned OpNo, raw_ostream &O); 50 void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm, 51 raw_ostream &O); 52 template<int Amount> 53 void printPostIncOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) { 54 printPostIncOperand(MI, OpNo, Amount, O); 55 } 56 57 void printVRegOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 58 void printSysCROperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); 59 void printAddSubImm(const MCInst *MI, unsigned OpNum, raw_ostream &O); 60 void printLogicalImm32(const MCInst *MI, unsigned OpNum, raw_ostream &O); 61 void printLogicalImm64(const MCInst *MI, unsigned OpNum, raw_ostream &O); 62 void printShifter(const MCInst *MI, unsigned OpNum, raw_ostream &O); 63 void printShiftedRegister(const MCInst *MI, unsigned OpNum, raw_ostream &O); 64 void printExtendedRegister(const MCInst *MI, unsigned OpNum, raw_ostream &O); 65 void printArithExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O); 66 67 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O, 68 char SrcRegKind, unsigned Width); 69 template <char SrcRegKind, unsigned Width> 70 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 71 printMemExtend(MI, OpNum, O, SrcRegKind, Width); 72 } 73 74 void printCondCode(const MCInst *MI, unsigned OpNum, raw_ostream &O); 75 void printInverseCondCode(const MCInst *MI, unsigned OpNum, raw_ostream &O); 76 void printAlignedLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O); 77 void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale, 78 raw_ostream &O); 79 void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale, 80 raw_ostream &O); 81 82 template<int Scale> 83 void printUImm12Offset(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 84 printUImm12Offset(MI, OpNum, Scale, O); 85 } 86 87 template<int BitWidth> 88 void printAMIndexedWB(const MCInst *MI, unsigned OpNum, raw_ostream &O) { 89 printAMIndexedWB(MI, OpNum, BitWidth / 8, O); 90 } 91 92 void printAMNoIndex(const MCInst *MI, unsigned OpNum, raw_ostream &O); 93 94 template<int Scale> 95 void printImmScale(const MCInst *MI, unsigned OpNum, raw_ostream &O); 96 97 void printPrefetchOp(const MCInst *MI, unsigned OpNum, raw_ostream &O); 98 99 void printFPImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 100 101 void printVectorList(const MCInst *MI, unsigned OpNum, raw_ostream &O, 102 StringRef LayoutSuffix); 103 104 /// Print a list of vector registers where the type suffix is implicit 105 /// (i.e. attached to the instruction rather than the registers). 106 void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum, 107 raw_ostream &O); 108 109 template <unsigned NumLanes, char LaneKind> 110 void printTypedVectorList(const MCInst *MI, unsigned OpNum, raw_ostream &O); 111 112 void printVectorIndex(const MCInst *MI, unsigned OpNum, raw_ostream &O); 113 void printAdrpLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O); 114 void printBarrierOption(const MCInst *MI, unsigned OpNum, raw_ostream &O); 115 void printMSRSystemRegister(const MCInst *MI, unsigned OpNum, raw_ostream &O); 116 void printMRSSystemRegister(const MCInst *MI, unsigned OpNum, raw_ostream &O); 117 void printSystemPStateField(const MCInst *MI, unsigned OpNum, raw_ostream &O); 118 void printSIMDType10Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O); 119 }; 120 121 class AArch64AppleInstPrinter : public AArch64InstPrinter { 122 public: 123 AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, 124 const MCRegisterInfo &MRI, const MCSubtargetInfo &STI); 125 126 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override; 127 128 void printInstruction(const MCInst *MI, raw_ostream &O) override; 129 bool printAliasInstr(const MCInst *MI, raw_ostream &O) override; 130 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx, 131 unsigned PrintMethodIdx, raw_ostream &O); 132 StringRef getRegName(unsigned RegNo) const override { 133 return getRegisterName(RegNo); 134 } 135 static const char *getRegisterName(unsigned RegNo, 136 unsigned AltIdx = AArch64::NoRegAltName); 137 }; 138 } 139 140 #endif 141
