| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 45 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
46 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
251 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
342 ISD::SELECT_CC,
403 // We need all the operands of SELECT_CC to have the same value type, so if
406 // SELECT_CC node.
420 assert(!"Unhandled operand type parings in SELECT_CC");
431 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC);
466 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC);
472 // this SELECT_CC, so we must lower it
[all...] |
| SIISelLowering.cpp | 56 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
57 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
59 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
60 setTargetDAGCombine(ISD::SELECT_CC);
267 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
400 case ISD::SELECT_CC: {
|
| AMDILISelLowering.cpp | 170 setOperationAction(ISD::SELECT_CC, VT, Expand);
289 case ISD::SELECT_CC:
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 45 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
46 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
251 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
342 ISD::SELECT_CC,
403 // We need all the operands of SELECT_CC to have the same value type, so if
406 // SELECT_CC node.
420 assert(!"Unhandled operand type parings in SELECT_CC");
431 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC);
466 return DAG.getNode(ISD::SELECT_CC, DL, VT, LHS, RHS, True, False, CC);
472 // this SELECT_CC, so we must lower it
[all...] |
| SIISelLowering.cpp | 56 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
57 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
59 setOperationAction(ISD::SELECT_CC, MVT::Other, Expand);
60 setTargetDAGCombine(ISD::SELECT_CC);
267 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
400 case ISD::SELECT_CC: {
|
| AMDILISelLowering.cpp | 170 setOperationAction(ISD::SELECT_CC, VT, Expand);
289 case ISD::SELECT_CC:
|
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 336 SELECT_CC,
528 /// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 60 /// SELECT_CC - Operand 0 and operand 1 are selection variable, operand 3
62 SELECT_CC,
|
| MSP430ISelLowering.cpp | 113 setOperationAction(ISD::SELECT_CC, MVT::i8, Custom);
114 setOperationAction(ISD::SELECT_CC, MVT::i16, Custom);
195 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600ISelLowering.cpp | 79 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
80 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
153 setTargetDAGCombine(ISD::SELECT_CC);
579 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
[all...] |
| SIISelLowering.cpp | 109 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand);
110 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand);
111 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand);
112 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
221 setTargetDAGCombine(ISD::SELECT_CC);
[all...] |
| AMDGPUISelLowering.cpp | 281 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand);
318 setOperationAction(ISD::SELECT_CC, VT, Expand);
354 setOperationAction(ISD::SELECT_CC, VT, Expand);
363 setTargetDAGCombine(ISD::SELECT_CC);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypesGeneric.cpp | 542 Lo = DAG.getNode(ISD::SELECT_CC, dl, LL.getValueType(), N->getOperand(0),
544 Hi = DAG.getNode(ISD::SELECT_CC, dl, LH.getValueType(), N->getOperand(0),
|
| LegalizeFloatTypes.cpp | 100 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N); break;
553 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
632 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
[all...] |
| SelectionDAGDumper.cpp | 196 case ISD::SELECT_CC: return "select_cc";
|
| LegalizeVectorTypes.cpp | 65 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
318 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), LHS.getValueType(),
562 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
[all...] |
| LegalizeDAG.cpp | [all...] |
| LegalizeIntegerTypes.cpp | 71 case ISD::SELECT_CC: Res = PromoteIntRes_SELECT_CC(N); break;
533 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 135 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand);
136 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
137 setOperationAction(ISD::SELECT_CC, MVT::i1, Expand);
138 setOperationAction(ISD::SELECT_CC, MVT::i8, Expand);
139 setOperationAction(ISD::SELECT_CC, MVT::i16, Expand);
140 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand);
141 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 238 // PowerPC wants to turn select_cc of FP into fsel when possible.
239 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
240 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
656 setTargetDAGCombine(ISD::SELECT_CC);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 177 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand);
181 setOperationAction(ISD::SELECT_CC, MVT::f32, Expand);
186 setOperationAction(ISD::SELECT_CC, MVT::f64, Expand);
222 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand);
[all...] |
| MipsISelLowering.cpp | 249 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
250 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
295 setOperationAction(ISD::SELECT_CC, MVT::i32, Expand);
296 setOperationAction(ISD::SELECT_CC, MVT::i64, Expand);
791 case ISD::SELECT_CC: return lowerSELECT_CC(Op, DAG);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 137 setOperationAction(ISD::SELECT_CC, MVT::i32, Custom);
138 setOperationAction(ISD::SELECT_CC, MVT::i64, Custom);
139 setOperationAction(ISD::SELECT_CC, MVT::f32, Custom);
140 setOperationAction(ISD::SELECT_CC, MVT::f64, Custom);
178 setOperationAction(ISD::SELECT_CC, MVT::f128, Custom);
412 setOperationAction(ISD::SELECT_CC, MVT::v1f64, Expand);
523 setOperationAction(ISD::SELECT_CC, VT.getSimpleVT(), Expand);
[all...] |
