| /art/compiler/dex/quick/ |
| gen_invoke.cc | 107 LoadConstant(TargetReg(kArg0, kNotWide), arg0);
115 OpRegCopy(TargetReg(kArg0, arg0.GetWideKind()), arg0);
124 LoadValueDirectFixed(arg0, TargetReg(arg0.fp ? kFArg0 : kArg0, arg0));
126 LoadValueDirectWideFixed(arg0, TargetReg(arg0.fp ? kFArg0 : kArg0, kWide));
135 LoadConstant(TargetReg(kArg0, kNotWide), arg0);
136 LoadConstant(TargetReg(kArg1, kNotWide), arg1);
145 LoadValueDirectFixed(arg1, TargetReg(kArg1, arg1));
147 RegStorage r_tmp = TargetReg(cu_->instruction_set == kMips ? kArg2 : kArg1, kWide);
150 LoadConstant(TargetReg(kArg0, kNotWide), arg0);
159 LoadValueDirectFixed(arg0, TargetReg(kArg0, arg0))
[all...] |
| gen_common.cc | 121 RegStorage arg1_32 = m2l_->TargetReg(kArg1, kNotWide);
122 RegStorage arg0_32 = m2l_->TargetReg(kArg0, kNotWide);
369 CallRuntimeHelperRegMethodRegLocation(kQuickAllocArrayResolved, TargetReg(kArg0, kNotWide),
404 FreeTemp(TargetReg(kArg2, kNotWide));
405 FreeTemp(TargetReg(kArg1, kNotWide));
413 RegStorage ref_reg = TargetReg(kRet0, kRef);
450 r_val = TargetReg(kLr, kNotWide);
520 m2l_->OpRegCopy(r_base_, m2l_->TargetReg(kRet0, kRef));
556 RegStorage r_method = TargetReg(kArg1, kRef);
559 r_base = TargetReg(kArg0, kRef)
[all...] |
| mir_to_lir.h | [all...] |
| codegen_util.cc | [all...] |
| /art/compiler/dex/quick/mips/ |
| target_mips.cc | 86 RegStorage MipsMir2Lir::TargetReg(SpecialTargetRegister reg) {
420 FreeTemp(TargetReg(kHiddenArg));
500 RegStorage reg_ptr = TargetReg(kArg0);
504 RegStorage reg_ret = RegStorage::MakeRegPair(TargetReg(kRet0), TargetReg(kRet1));
518 RegStorage reg_ptr = TargetReg(kArg0);
520 RegStorage reg_value = RegStorage::MakeRegPair(TargetReg(kArg2), TargetReg(kArg3));
|
| codegen_mips.h | 51 RegStorage TargetReg(SpecialTargetRegister reg);
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsNaClELFStreamer.cpp | 178 unsigned TargetReg = Inst.getOperand(1).getReg();
179 emitMask(TargetReg, IndirectBranchMaskReg, STI);
|
| /art/compiler/dex/quick/arm64/ |
| codegen_arm64.h | 97 RegStorage TargetReg(SpecialTargetRegister reg) OVERRIDE;
98 RegStorage TargetReg(SpecialTargetRegister symbolic_reg, WideKind wide_kind) OVERRIDE {
100 return As64BitReg(TargetReg(symbolic_reg));
102 return Check32BitReg(TargetReg(symbolic_reg));
106 return As64BitReg(TargetReg(symbolic_reg));
|
| target_arm64.cc | 106 RegStorage Arm64Mir2Lir::TargetReg(SpecialTargetRegister reg) {
757 FreeTemp(TargetReg(kHiddenArg));
922 rl_src.reg = TargetReg(kArg0, kRef);
[all...] |
| /art/compiler/dex/quick/x86/ |
| int_x86.cc | [all...] |
| call_x86.cc | 152 RegStorage array_ptr = TargetReg(kArg0, kRef);
|
| codegen_x86.h | 86 RegStorage TargetReg(SpecialTargetRegister reg) OVERRIDE;
87 RegStorage TargetReg(SpecialTargetRegister symbolic_reg, WideKind wide_kind) OVERRIDE {
106 return TargetReg(symbolic_reg, cu_->target64 ? kWide : kNotWide);
315 * @note register will be passed to TargetReg to get physical register.
324 * @note register will be passed to TargetReg to get physical register.
[all...] |
| target_x86.cc | 234 RegStorage X86Mir2Lir::TargetReg(SpecialTargetRegister reg) {
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.cpp | 596 // indirect jump to TargetReg
604 unsigned TargetReg = I->getOperand(1).getReg();
611 .addReg(TargetReg).addReg(ZERO);
613 .addReg(TargetReg).addReg(ZERO);
|
| /art/compiler/dex/quick/arm/ |
| codegen_arm.h | 48 RegStorage TargetReg(SpecialTargetRegister reg);
|
| target_arm.cc | 90 RegStorage ArmMir2Lir::TargetReg(SpecialTargetRegister reg) {
721 FreeTemp(TargetReg(kHiddenArg));
|
